From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> SVE is the next-generation SIMD extension of the ARMv8-A AArch64 instruction set. The related marco definition can be found in linux kernel: arch/arm64/include/uapi/asm/hwcap.h This patch supports getting cpu SVE feature on ARM64 platform. Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> --- v1 -> v2: Adds more sve-related definition to rte_cpu_feature_table, sunch as SVE2, etc. --- lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 + lib/librte_eal/arm/rte_cpuflags.c | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h index 95cc01474..069844ddb 100644 --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h @@ -22,6 +22,7 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_SHA2, RTE_CPUFLAG_CRC32, RTE_CPUFLAG_ATOMICS, + RTE_CPUFLAG_SVE, RTE_CPUFLAG_AARCH64, /* The last item */ RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c index caf3dc83a..97a9fcfd4 100644 --- a/lib/librte_eal/arm/rte_cpuflags.c +++ b/lib/librte_eal/arm/rte_cpuflags.c @@ -95,6 +95,17 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(SHA2, REG_HWCAP, 6) FEAT_DEF(CRC32, REG_HWCAP, 7) FEAT_DEF(ATOMICS, REG_HWCAP, 8) + FEAT_DEF(SVE, REG_HWCAP, 22) + FEAT_DEF(SVE2, REG_HWCAP2, 1) + FEAT_DEF(SVEAES, REG_HWCAP2, 2) + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) + FEAT_DEF(SVESM4, REG_HWCAP2, 6) + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) FEAT_DEF(AARCH64, REG_PLATFORM, 1) }; #endif /* RTE_ARCH */ -- 2.27.0
On Mon, Aug 17, 2020 at 6:17 PM Wei Hu (Xavier) <huwei013@chinasoftinc.com> wrote: > > From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> > > SVE is the next-generation SIMD extension of the ARMv8-A AArch64 > instruction set. > The related marco definition can be found in linux kernel: > arch/arm64/include/uapi/asm/hwcap.h > > This patch supports getting cpu SVE feature on ARM64 platform. > > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> > Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Change the git commit like eal/arm64: update CPU flags > --- > v1 -> v2: > Adds more sve-related definition to rte_cpu_feature_table, > sunch as SVE2, etc. > --- > lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 + > lib/librte_eal/arm/rte_cpuflags.c | 11 +++++++++++ > 2 files changed, 12 insertions(+) > > diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h > index 95cc01474..069844ddb 100644 > --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h > +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h > @@ -22,6 +22,7 @@ enum rte_cpu_flag_t { > RTE_CPUFLAG_SHA2, > RTE_CPUFLAG_CRC32, > RTE_CPUFLAG_ATOMICS, > + RTE_CPUFLAG_SVE, Please intrdouce the flag for all newly added items as well. > RTE_CPUFLAG_AARCH64, > /* The last item */ > RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ > diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c > index caf3dc83a..97a9fcfd4 100644 > --- a/lib/librte_eal/arm/rte_cpuflags.c > +++ b/lib/librte_eal/arm/rte_cpuflags.c > @@ -95,6 +95,17 @@ const struct feature_entry rte_cpu_feature_table[] = { > FEAT_DEF(SHA2, REG_HWCAP, 6) > FEAT_DEF(CRC32, REG_HWCAP, 7) > FEAT_DEF(ATOMICS, REG_HWCAP, 8) > + FEAT_DEF(SVE, REG_HWCAP, 22) > + FEAT_DEF(SVE2, REG_HWCAP2, 1) > + FEAT_DEF(SVEAES, REG_HWCAP2, 2) > + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) > + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) > + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) > + FEAT_DEF(SVESM4, REG_HWCAP2, 6) Following stuff is missing HWCAP2_FLAGM2 (1 << 7) HWCAP2_FRINT (1 << 8) > + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) > + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) > + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) > + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) > FEAT_DEF(AARCH64, REG_PLATFORM, 1) > }; > #endif /* RTE_ARCH */ > -- > 2.27.0 >
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> SVE is the next-generation SIMD extension of the ARMv8-A AArch64 instruction set. The related marco definition can be found in linux kernel: arch/arm64/include/uapi/asm/hwcap.h This patch updates cpu SVE flags on ARM64 platform, such as SVE, etc. Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> --- v2 -> v3: 1. Change commit log. 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[]. 3. Add the flags for newly added items into enum rte_cpu_flag_t. v1 -> v2: Adds more sve-related definition to rte_cpu_feature_table, sunch as SVE2, etc. --- lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++ lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h index 95cc01474..aa7a56d49 100644 --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h @@ -22,6 +22,19 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_SHA2, RTE_CPUFLAG_CRC32, RTE_CPUFLAG_ATOMICS, + RTE_CPUFLAG_SVE, + RTE_CPUFLAG_SVE2, + RTE_CPUFLAG_SVEAES, + RTE_CPUFLAG_SVEPMULL, + RTE_CPUFLAG_SVEBITPERM, + RTE_CPUFLAG_SVESHA3, + RTE_CPUFLAG_SVESM4, + RTE_CPUFLAG_FLAGM2, + RTE_CPUFLAG_FRINT, + RTE_CPUFLAG_SVEI8MM, + RTE_CPUFLAG_SVEF32MM, + RTE_CPUFLAG_SVEF64MM, + RTE_CPUFLAG_SVEBF16, RTE_CPUFLAG_AARCH64, /* The last item */ RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c index caf3dc83a..7b257b787 100644 --- a/lib/librte_eal/arm/rte_cpuflags.c +++ b/lib/librte_eal/arm/rte_cpuflags.c @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(SHA2, REG_HWCAP, 6) FEAT_DEF(CRC32, REG_HWCAP, 7) FEAT_DEF(ATOMICS, REG_HWCAP, 8) + FEAT_DEF(SVE, REG_HWCAP, 22) + FEAT_DEF(SVE2, REG_HWCAP2, 1) + FEAT_DEF(SVEAES, REG_HWCAP2, 2) + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) + FEAT_DEF(SVESM4, REG_HWCAP2, 6) + FEAT_DEF(FLAGM2, REG_HWCAP2, 7) + FEAT_DEF(FRINT, REG_HWCAP2, 8) + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) FEAT_DEF(AARCH64, REG_PLATFORM, 1) }; #endif /* RTE_ARCH */ -- 2.27.0
Hi, Jerin Jacob On 2020/8/17 21:07, Jerin Jacob wrote: > On Mon, Aug 17, 2020 at 6:17 PM Wei Hu (Xavier) > <huwei013@chinasoftinc.com> wrote: >> >> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> >> >> SVE is the next-generation SIMD extension of the ARMv8-A AArch64 >> instruction set. >> The related marco definition can be found in linux kernel: >> arch/arm64/include/uapi/asm/hwcap.h >> >> This patch supports getting cpu SVE feature on ARM64 platform. >> >> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> >> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> > > Change the git commit like > > eal/arm64: update CPU flags OK, I will update it in V3. > > > > >> --- >> v1 -> v2: >> Adds more sve-related definition to rte_cpu_feature_table, >> sunch as SVE2, etc. >> --- >> lib/librte_eal/arm/include/rte_cpuflags_64.h | 1 + >> lib/librte_eal/arm/rte_cpuflags.c | 11 +++++++++++ >> 2 files changed, 12 insertions(+) >> >> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h >> index 95cc01474..069844ddb 100644 >> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h >> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h >> @@ -22,6 +22,7 @@ enum rte_cpu_flag_t { >> RTE_CPUFLAG_SHA2, >> RTE_CPUFLAG_CRC32, >> RTE_CPUFLAG_ATOMICS, >> + RTE_CPUFLAG_SVE, > > Please intrdouce the flag for all newly added items as well. OK, I will update it in V3. > >> RTE_CPUFLAG_AARCH64, >> /* The last item */ >> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ >> diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c >> index caf3dc83a..97a9fcfd4 100644 >> --- a/lib/librte_eal/arm/rte_cpuflags.c >> +++ b/lib/librte_eal/arm/rte_cpuflags.c >> @@ -95,6 +95,17 @@ const struct feature_entry rte_cpu_feature_table[] = { >> FEAT_DEF(SHA2, REG_HWCAP, 6) >> FEAT_DEF(CRC32, REG_HWCAP, 7) >> FEAT_DEF(ATOMICS, REG_HWCAP, 8) >> + FEAT_DEF(SVE, REG_HWCAP, 22) >> + FEAT_DEF(SVE2, REG_HWCAP2, 1) >> + FEAT_DEF(SVEAES, REG_HWCAP2, 2) >> + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) >> + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) >> + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) >> + FEAT_DEF(SVESM4, REG_HWCAP2, 6) > > Following stuff is missing > HWCAP2_FLAGM2 (1 << 7) > HWCAP2_FRINT (1 << 8) OK, I will update it in V3. Thanks, Xavier > >> + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) >> + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) >> + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) >> + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) >> FEAT_DEF(AARCH64, REG_PLATFORM, 1) >> }; >> #endif /* RTE_ARCH */ >> -- >> 2.27.0 >>
Hi, > -----Original Message----- > From: Wei Hu (Xavier) <huwei013@chinasoftinc.com> > Sent: Tuesday, August 18, 2020 10:44 AM > To: dev@dpdk.org > Cc: xavier.huwei@huawei.com; nd <nd@arm.com>; Honnappa Nagarahalli > <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang > <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com > Subject: [PATCH v3] eal/arm64: update CPU flags > > From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> > > SVE is the next-generation SIMD extension of the ARMv8-A AArch64 > instruction set. > The related marco definition can be found in linux kernel: > arch/arm64/include/uapi/asm/hwcap.h > > This patch updates cpu SVE flags on ARM64 platform, such as SVE, etc. > > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> > Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> > --- > v2 -> v3: > 1. Change commit log. > 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to > rte_cpu_feature_table[]. > 3. Add the flags for newly added items into enum rte_cpu_flag_t. > v1 -> v2: > Adds more sve-related definition to rte_cpu_feature_table, > sunch as SVE2, etc. > --- > lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++ > lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++ > 2 files changed, 26 insertions(+) > How about updating test_cpuflags() too to cover these new flags? Thanks. /Ruifeng > diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h > b/lib/librte_eal/arm/include/rte_cpuflags_64.h > index 95cc01474..aa7a56d49 100644 > --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h > +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h > @@ -22,6 +22,19 @@ enum rte_cpu_flag_t { > RTE_CPUFLAG_SHA2, > RTE_CPUFLAG_CRC32, > RTE_CPUFLAG_ATOMICS, > + RTE_CPUFLAG_SVE, > + RTE_CPUFLAG_SVE2, > + RTE_CPUFLAG_SVEAES, > + RTE_CPUFLAG_SVEPMULL, > + RTE_CPUFLAG_SVEBITPERM, > + RTE_CPUFLAG_SVESHA3, > + RTE_CPUFLAG_SVESM4, > + RTE_CPUFLAG_FLAGM2, > + RTE_CPUFLAG_FRINT, > + RTE_CPUFLAG_SVEI8MM, > + RTE_CPUFLAG_SVEF32MM, > + RTE_CPUFLAG_SVEF64MM, > + RTE_CPUFLAG_SVEBF16, > RTE_CPUFLAG_AARCH64, > /* The last item */ > RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ > diff --git a/lib/librte_eal/arm/rte_cpuflags.c > b/lib/librte_eal/arm/rte_cpuflags.c > index caf3dc83a..7b257b787 100644 > --- a/lib/librte_eal/arm/rte_cpuflags.c > +++ b/lib/librte_eal/arm/rte_cpuflags.c > @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = { > FEAT_DEF(SHA2, REG_HWCAP, 6) > FEAT_DEF(CRC32, REG_HWCAP, 7) > FEAT_DEF(ATOMICS, REG_HWCAP, 8) > + FEAT_DEF(SVE, REG_HWCAP, 22) > + FEAT_DEF(SVE2, REG_HWCAP2, 1) > + FEAT_DEF(SVEAES, REG_HWCAP2, 2) > + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) > + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) > + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) > + FEAT_DEF(SVESM4, REG_HWCAP2, 6) > + FEAT_DEF(FLAGM2, REG_HWCAP2, 7) > + FEAT_DEF(FRINT, REG_HWCAP2, 8) > + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) > + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) > + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) > + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) > FEAT_DEF(AARCH64, REG_PLATFORM, 1) > }; > #endif /* RTE_ARCH */ > -- > 2.27.0
On Tue, Aug 18, 2020 at 9:11 AM Ruifeng Wang <Ruifeng.Wang@arm.com> wrote: > > Hi, > > > -----Original Message----- > > From: Wei Hu (Xavier) <huwei013@chinasoftinc.com> > > Sent: Tuesday, August 18, 2020 10:44 AM > > To: dev@dpdk.org > > Cc: xavier.huwei@huawei.com; nd <nd@arm.com>; Honnappa Nagarahalli > > <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang > > <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com > > Subject: [PATCH v3] eal/arm64: update CPU flags > > > > From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> > > > > SVE is the next-generation SIMD extension of the ARMv8-A AArch64 > > instruction set. > > The related marco definition can be found in linux kernel: > > arch/arm64/include/uapi/asm/hwcap.h > > > > This patch updates cpu SVE flags on ARM64 platform, such as SVE, etc. Suggested rewording: ARM64 Linux kernel updated the CPU flags using the HWCAP scheme. This patch incorporates those changes to the eal library. > > > > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> > > Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> > > --- > > v2 -> v3: > > 1. Change commit log. > > 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to > > rte_cpu_feature_table[]. > > 3. Add the flags for newly added items into enum rte_cpu_flag_t. > > v1 -> v2: > > Adds more sve-related definition to rte_cpu_feature_table, > > sunch as SVE2, etc. > > --- > > lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++ > > lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++ > > 2 files changed, 26 insertions(+) > > > How about updating test_cpuflags() too to cover these new flags? +1 . Wei, Please update the test_cpuflags() functions for new flags.
Hi, Jerin Jacob On 2020/8/18 13:07, Jerin Jacob wrote: > On Tue, Aug 18, 2020 at 9:11 AM Ruifeng Wang <Ruifeng.Wang@arm.com> wrote: >> Hi, >> >>> -----Original Message----- >>> From: Wei Hu (Xavier) <huwei013@chinasoftinc.com> >>> Sent: Tuesday, August 18, 2020 10:44 AM >>> To: dev@dpdk.org >>> Cc: xavier.huwei@huawei.com; nd <nd@arm.com>; Honnappa Nagarahalli >>> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang >>> <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com >>> Subject: [PATCH v3] eal/arm64: update CPU flags >>> >>> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> >>> >>> SVE is the next-generation SIMD extension of the ARMv8-A AArch64 >>> instruction set. >>> The related marco definition can be found in linux kernel: >>> arch/arm64/include/uapi/asm/hwcap.h >>> >>> This patch updates cpu SVE flags on ARM64 platform, such as SVE, etc. > Suggested rewording: > > ARM64 Linux kernel updated the CPU flags using the HWCAP scheme. > This patch incorporates those changes to the eal library. > Ok, I will update it in V4. >>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> >>> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> >>> --- >>> v2 -> v3: >>> 1. Change commit log. >>> 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to >>> rte_cpu_feature_table[]. >>> 3. Add the flags for newly added items into enum rte_cpu_flag_t. >>> v1 -> v2: >>> Adds more sve-related definition to rte_cpu_feature_table, >>> sunch as SVE2, etc. >>> --- >>> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++ >>> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++ >>> 2 files changed, 26 insertions(+) >>> >> How about updating test_cpuflags() too to cover these new flags? > +1 . Wei, Please update the test_cpuflags() functions for new flags. OK, I will update this test function in V4. Thanks Xavier
Hi, Ruifeng Wang On 2020/8/18 11:41, Ruifeng Wang wrote: > Hi, > >> -----Original Message----- >> From: Wei Hu (Xavier) <huwei013@chinasoftinc.com> >> Sent: Tuesday, August 18, 2020 10:44 AM >> To: dev@dpdk.org >> Cc: xavier.huwei@huawei.com; nd <nd@arm.com>; Honnappa Nagarahalli >> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang >> <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com >> Subject: [PATCH v3] eal/arm64: update CPU flags >> >> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> >> >> SVE is the next-generation SIMD extension of the ARMv8-A AArch64 >> instruction set. >> The related marco definition can be found in linux kernel: >> arch/arm64/include/uapi/asm/hwcap.h >> >> This patch updates cpu SVE flags on ARM64 platform, such as SVE, etc. >> >> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> >> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> >> --- >> v2 -> v3: >> 1. Change commit log. >> 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to >> rte_cpu_feature_table[]. >> 3. Add the flags for newly added items into enum rte_cpu_flag_t. >> v1 -> v2: >> Adds more sve-related definition to rte_cpu_feature_table, >> sunch as SVE2, etc. >> --- >> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++ >> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++ >> 2 files changed, 26 insertions(+) >> > How about updating test_cpuflags() too to cover these new flags? OK, I will update it in V4. Thanks Xavier > Thanks. > /Ruifeng >> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h >> b/lib/librte_eal/arm/include/rte_cpuflags_64.h >> index 95cc01474..aa7a56d49 100644 >> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h >> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h >> @@ -22,6 +22,19 @@ enum rte_cpu_flag_t { >> RTE_CPUFLAG_SHA2, >> RTE_CPUFLAG_CRC32, >> RTE_CPUFLAG_ATOMICS, >> + RTE_CPUFLAG_SVE, >> + RTE_CPUFLAG_SVE2, >> + RTE_CPUFLAG_SVEAES, >> + RTE_CPUFLAG_SVEPMULL, >> + RTE_CPUFLAG_SVEBITPERM, >> + RTE_CPUFLAG_SVESHA3, >> + RTE_CPUFLAG_SVESM4, >> + RTE_CPUFLAG_FLAGM2, >> + RTE_CPUFLAG_FRINT, >> + RTE_CPUFLAG_SVEI8MM, >> + RTE_CPUFLAG_SVEF32MM, >> + RTE_CPUFLAG_SVEF64MM, >> + RTE_CPUFLAG_SVEBF16, >> RTE_CPUFLAG_AARCH64, >> /* The last item */ >> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ >> diff --git a/lib/librte_eal/arm/rte_cpuflags.c >> b/lib/librte_eal/arm/rte_cpuflags.c >> index caf3dc83a..7b257b787 100644 >> --- a/lib/librte_eal/arm/rte_cpuflags.c >> +++ b/lib/librte_eal/arm/rte_cpuflags.c >> @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = { >> FEAT_DEF(SHA2, REG_HWCAP, 6) >> FEAT_DEF(CRC32, REG_HWCAP, 7) >> FEAT_DEF(ATOMICS, REG_HWCAP, 8) >> + FEAT_DEF(SVE, REG_HWCAP, 22) >> + FEAT_DEF(SVE2, REG_HWCAP2, 1) >> + FEAT_DEF(SVEAES, REG_HWCAP2, 2) >> + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) >> + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) >> + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) >> + FEAT_DEF(SVESM4, REG_HWCAP2, 6) >> + FEAT_DEF(FLAGM2, REG_HWCAP2, 7) >> + FEAT_DEF(FRINT, REG_HWCAP2, 8) >> + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) >> + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) >> + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) >> + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) >> FEAT_DEF(AARCH64, REG_PLATFORM, 1) >> }; >> #endif /* RTE_ARCH */ >> -- >> 2.27.0
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> This series updates CPU flags for arm64 platform. Wei Hu (Xavier) (2): eal/arm64: update CPU flags test/cpuflag: add new flags for ARM64 platform app/test/test_cpuflags.c | 39 ++++++++++++++++++++ lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++ lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++ 3 files changed, 65 insertions(+) -- 2.27.0
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> ARM64 Linux kernel updated the CPU flags using the HWCAP scheme. The related marco definition can be found in linux kernel: arch/arm64/include/uapi/asm/hwcap.h This patch incorporates those changes to the eal library. Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> --- v3 -> v4: Update commit log. v2 -> v3: 1. Change commit log. 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[]. 3. Add the flags for newly added items into enum rte_cpu_flag_t. v1 -> v2: Adds more sve-related definition to rte_cpu_feature_table, sunch as SVE2, etc. --- lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++ lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h index 95cc01474..aa7a56d49 100644 --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h @@ -22,6 +22,19 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_SHA2, RTE_CPUFLAG_CRC32, RTE_CPUFLAG_ATOMICS, + RTE_CPUFLAG_SVE, + RTE_CPUFLAG_SVE2, + RTE_CPUFLAG_SVEAES, + RTE_CPUFLAG_SVEPMULL, + RTE_CPUFLAG_SVEBITPERM, + RTE_CPUFLAG_SVESHA3, + RTE_CPUFLAG_SVESM4, + RTE_CPUFLAG_FLAGM2, + RTE_CPUFLAG_FRINT, + RTE_CPUFLAG_SVEI8MM, + RTE_CPUFLAG_SVEF32MM, + RTE_CPUFLAG_SVEF64MM, + RTE_CPUFLAG_SVEBF16, RTE_CPUFLAG_AARCH64, /* The last item */ RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c index caf3dc83a..7b257b787 100644 --- a/lib/librte_eal/arm/rte_cpuflags.c +++ b/lib/librte_eal/arm/rte_cpuflags.c @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(SHA2, REG_HWCAP, 6) FEAT_DEF(CRC32, REG_HWCAP, 7) FEAT_DEF(ATOMICS, REG_HWCAP, 8) + FEAT_DEF(SVE, REG_HWCAP, 22) + FEAT_DEF(SVE2, REG_HWCAP2, 1) + FEAT_DEF(SVEAES, REG_HWCAP2, 2) + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) + FEAT_DEF(SVESM4, REG_HWCAP2, 6) + FEAT_DEF(FLAGM2, REG_HWCAP2, 7) + FEAT_DEF(FRINT, REG_HWCAP2, 8) + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) FEAT_DEF(AARCH64, REG_PLATFORM, 1) }; #endif /* RTE_ARCH */ -- 2.27.0
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> This patch adds new flags into the test_cpuflags() functions for ARM64 platform, such as RTE_CPUFLAG_SVE, etc. Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> --- app/test/test_cpuflags.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index 06718631f..845564410 100644 --- a/app/test/test_cpuflags.c +++ b/app/test/test_cpuflags.c @@ -118,6 +118,45 @@ test_cpuflags(void) printf("Check for ATOMICS:\t"); CHECK_FOR_FLAG(RTE_CPUFLAG_ATOMICS); + + printf("Check for SVE:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE); + + printf("Check for SVE2:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE2); + + printf("Check for SVEAES:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEAES); + + printf("Check for SVEPMULL:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEPMULL); + + printf("Check for SVEBITPERM:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBITPERM); + + printf("Check for SVESHA3:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESHA3); + + printf("Check for SVESM4:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESM4); + + printf("Check for FLAGM2:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_FLAGM2); + + printf("Check for FRINT:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_FRINT); + + printf("Check for SVEI8MM:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEI8MM); + + printf("Check for SVEF32MM:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF32MM); + + printf("Check for SVEF64MM:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF64MM); + + printf("Check for SVEBF16:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBF16); #endif #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) -- 2.27.0
> -----Original Message----- > From: Wei Hu (Xavier) <huwei013@chinasoftinc.com> > Sent: Tuesday, August 18, 2020 4:09 PM > To: dev@dpdk.org > Cc: nd <nd@arm.com>; Honnappa Nagarahalli > <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang > <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com; > xavier.huwei@huawei.com > Subject: [PATCH v4 2/2] test/cpuflag: add new flags for ARM64 platform > > From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> > > This patch adds new flags into the test_cpuflags() functions for ARM64 > platform, such as RTE_CPUFLAG_SVE, etc. > > Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> > --- > app/test/test_cpuflags.c | 39 > +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index > 06718631f..845564410 100644 > --- a/app/test/test_cpuflags.c > +++ b/app/test/test_cpuflags.c > @@ -118,6 +118,45 @@ test_cpuflags(void) > > printf("Check for ATOMICS:\t"); > CHECK_FOR_FLAG(RTE_CPUFLAG_ATOMICS); > + > + printf("Check for SVE:\t"); Nit. Use double '\t' for better alignment. > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE); > + > + printf("Check for SVE2:\t"); Ditto. With the suggested changes, Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE2); > + > + printf("Check for SVEAES:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEAES); > + > + printf("Check for SVEPMULL:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEPMULL); > + > + printf("Check for SVEBITPERM:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBITPERM); > + > + printf("Check for SVESHA3:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESHA3); > + > + printf("Check for SVESM4:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESM4); > + > + printf("Check for FLAGM2:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_FLAGM2); > + > + printf("Check for FRINT:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_FRINT); > + > + printf("Check for SVEI8MM:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEI8MM); > + > + printf("Check for SVEF32MM:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF32MM); > + > + printf("Check for SVEF64MM:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF64MM); > + > + printf("Check for SVEBF16:\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBF16); > #endif > > #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > -- > 2.27.0
> -----Original Message-----
> From: Wei Hu (Xavier) <huwei013@chinasoftinc.com>
> Sent: Tuesday, August 18, 2020 4:09 PM
> To: dev@dpdk.org
> Cc: nd <nd@arm.com>; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com;
> xavier.huwei@huawei.com
> Subject: [PATCH v4 1/2] eal/arm64: update CPU flags
>
> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>
>
> ARM64 Linux kernel updated the CPU flags using the HWCAP scheme.
> The related marco definition can be found in linux kernel:
> arch/arm64/include/uapi/asm/hwcap.h
>
> This patch incorporates those changes to the eal library.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
> ---
> v3 -> v4:
> Update commit log.
> v2 -> v3:
> 1. Change commit log.
> 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to
> rte_cpu_feature_table[].
> 3. Add the flags for newly added items into enum rte_cpu_flag_t.
> v1 -> v2:
> Adds more sve-related definition to rte_cpu_feature_table,
> sunch as SVE2, etc.
> ---
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++
> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> index 95cc01474..aa7a56d49 100644
> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> @@ -22,6 +22,19 @@ enum rte_cpu_flag_t {
> RTE_CPUFLAG_SHA2,
> RTE_CPUFLAG_CRC32,
> RTE_CPUFLAG_ATOMICS,
> + RTE_CPUFLAG_SVE,
> + RTE_CPUFLAG_SVE2,
> + RTE_CPUFLAG_SVEAES,
> + RTE_CPUFLAG_SVEPMULL,
> + RTE_CPUFLAG_SVEBITPERM,
> + RTE_CPUFLAG_SVESHA3,
> + RTE_CPUFLAG_SVESM4,
> + RTE_CPUFLAG_FLAGM2,
> + RTE_CPUFLAG_FRINT,
> + RTE_CPUFLAG_SVEI8MM,
> + RTE_CPUFLAG_SVEF32MM,
> + RTE_CPUFLAG_SVEF64MM,
> + RTE_CPUFLAG_SVEBF16,
> RTE_CPUFLAG_AARCH64,
> /* The last item */
> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
> diff --git a/lib/librte_eal/arm/rte_cpuflags.c
> b/lib/librte_eal/arm/rte_cpuflags.c
> index caf3dc83a..7b257b787 100644
> --- a/lib/librte_eal/arm/rte_cpuflags.c
> +++ b/lib/librte_eal/arm/rte_cpuflags.c
> @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = {
> FEAT_DEF(SHA2, REG_HWCAP, 6)
> FEAT_DEF(CRC32, REG_HWCAP, 7)
> FEAT_DEF(ATOMICS, REG_HWCAP, 8)
> + FEAT_DEF(SVE, REG_HWCAP, 22)
> + FEAT_DEF(SVE2, REG_HWCAP2, 1)
> + FEAT_DEF(SVEAES, REG_HWCAP2, 2)
> + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
> + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4)
> + FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
> + FEAT_DEF(SVESM4, REG_HWCAP2, 6)
> + FEAT_DEF(FLAGM2, REG_HWCAP2, 7)
> + FEAT_DEF(FRINT, REG_HWCAP2, 8)
> + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
> + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
> + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
> + FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
> FEAT_DEF(AARCH64, REG_PLATFORM, 1)
> };
> #endif /* RTE_ARCH */
> --
> 2.27.0
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
This series updates CPU flags for arm64 platform. Wei Hu (Xavier) (2): eal/arm64: update CPU flags test/cpuflag: add new flags for ARM64 platform app/test/test_cpuflags.c | 39 ++++++++++++++++++++ lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++ lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++ 3 files changed, 65 insertions(+) -- 2.27.0
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> ARM64 Linux kernel updated the CPU flags using the HWCAP scheme. The related marco definition can be found in linux kernel: arch/arm64/include/uapi/asm/hwcap.h This patch incorporates those changes to the eal library. Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> --- v4 -> v5: No change. v3 -> v4: Update commit log. v2 -> v3: 1. Change commit log. 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[]. 3. Add the flags for newly added items into enum rte_cpu_flag_t. v1 -> v2: Adds more sve-related definition to rte_cpu_feature_table, sunch as SVE2, etc. --- lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++ lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h index 95cc01474..aa7a56d49 100644 --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h @@ -22,6 +22,19 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_SHA2, RTE_CPUFLAG_CRC32, RTE_CPUFLAG_ATOMICS, + RTE_CPUFLAG_SVE, + RTE_CPUFLAG_SVE2, + RTE_CPUFLAG_SVEAES, + RTE_CPUFLAG_SVEPMULL, + RTE_CPUFLAG_SVEBITPERM, + RTE_CPUFLAG_SVESHA3, + RTE_CPUFLAG_SVESM4, + RTE_CPUFLAG_FLAGM2, + RTE_CPUFLAG_FRINT, + RTE_CPUFLAG_SVEI8MM, + RTE_CPUFLAG_SVEF32MM, + RTE_CPUFLAG_SVEF64MM, + RTE_CPUFLAG_SVEBF16, RTE_CPUFLAG_AARCH64, /* The last item */ RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c index caf3dc83a..7b257b787 100644 --- a/lib/librte_eal/arm/rte_cpuflags.c +++ b/lib/librte_eal/arm/rte_cpuflags.c @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(SHA2, REG_HWCAP, 6) FEAT_DEF(CRC32, REG_HWCAP, 7) FEAT_DEF(ATOMICS, REG_HWCAP, 8) + FEAT_DEF(SVE, REG_HWCAP, 22) + FEAT_DEF(SVE2, REG_HWCAP2, 1) + FEAT_DEF(SVEAES, REG_HWCAP2, 2) + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) + FEAT_DEF(SVESM4, REG_HWCAP2, 6) + FEAT_DEF(FLAGM2, REG_HWCAP2, 7) + FEAT_DEF(FRINT, REG_HWCAP2, 8) + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) FEAT_DEF(AARCH64, REG_PLATFORM, 1) }; #endif /* RTE_ARCH */ -- 2.27.0
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> This patch adds new flags into the test_cpuflags() functions for ARM64 platform, such as RTE_CPUFLAG_SVE, etc. Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> --- v4 -> v5: Use double '\t' for better alignment. v4: Initial patch. --- app/test/test_cpuflags.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index 06718631f..7c71ffef1 100644 --- a/app/test/test_cpuflags.c +++ b/app/test/test_cpuflags.c @@ -118,6 +118,45 @@ test_cpuflags(void) printf("Check for ATOMICS:\t"); CHECK_FOR_FLAG(RTE_CPUFLAG_ATOMICS); + + printf("Check for SVE:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE); + + printf("Check for SVE2:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE2); + + printf("Check for SVEAES:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEAES); + + printf("Check for SVEPMULL:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEPMULL); + + printf("Check for SVEBITPERM:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBITPERM); + + printf("Check for SVESHA3:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESHA3); + + printf("Check for SVESM4:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESM4); + + printf("Check for FLAGM2:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_FLAGM2); + + printf("Check for FRINT:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_FRINT); + + printf("Check for SVEI8MM:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEI8MM); + + printf("Check for SVEF32MM:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF32MM); + + printf("Check for SVEF64MM:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF64MM); + + printf("Check for SVEBF16:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBF16); #endif #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) -- 2.27.0
Hi, Ruifeng Wang On 2020/8/19 10:26, Ruifeng Wang wrote: > >> -----Original Message----- >> From: Wei Hu (Xavier) <huwei013@chinasoftinc.com> >> Sent: Tuesday, August 18, 2020 4:09 PM >> To: dev@dpdk.org >> Cc: nd <nd@arm.com>; Honnappa Nagarahalli >> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang >> <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com; >> xavier.huwei@huawei.com >> Subject: [PATCH v4 2/2] test/cpuflag: add new flags for ARM64 platform >> >> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> >> >> This patch adds new flags into the test_cpuflags() functions for ARM64 >> platform, such as RTE_CPUFLAG_SVE, etc. >> >> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> >> --- >> app/test/test_cpuflags.c | 39 >> +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 39 insertions(+) >> >> diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index >> 06718631f..845564410 100644 >> --- a/app/test/test_cpuflags.c >> +++ b/app/test/test_cpuflags.c >> @@ -118,6 +118,45 @@ test_cpuflags(void) >> >> printf("Check for ATOMICS:\t"); >> CHECK_FOR_FLAG(RTE_CPUFLAG_ATOMICS); >> + >> + printf("Check for SVE:\t"); > Nit. Use double '\t' for better alignment. > >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE); >> + >> + printf("Check for SVE2:\t"); > Ditto. > > With the suggested changes, > Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> OK, I will update them in V5. Thanks, Xavier > >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE2); >> + >> + printf("Check for SVEAES:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEAES); >> + >> + printf("Check for SVEPMULL:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEPMULL); >> + >> + printf("Check for SVEBITPERM:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBITPERM); >> + >> + printf("Check for SVESHA3:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESHA3); >> + >> + printf("Check for SVESM4:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESM4); >> + >> + printf("Check for FLAGM2:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_FLAGM2); >> + >> + printf("Check for FRINT:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_FRINT); >> + >> + printf("Check for SVEI8MM:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEI8MM); >> + >> + printf("Check for SVEF32MM:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF32MM); >> + >> + printf("Check for SVEF64MM:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF64MM); >> + >> + printf("Check for SVEBF16:\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBF16); >> #endif >> >> #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) >> -- >> 2.27.0
> -----Original Message----- > From: Wei Hu (Xavier) <huwei013@chinasoftinc.com> > Sent: Wednesday, August 19, 2020 3:04 PM > To: dev@dpdk.org > Cc: nd <nd@arm.com>; Honnappa Nagarahalli > <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang > <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com; > xavier.huwei@huawei.com > Subject: [PATCH v5 2/2] test/cpuflag: add new flags for ARM64 platform > > From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> > > This patch adds new flags into the test_cpuflags() functions for ARM64 > platform, such as RTE_CPUFLAG_SVE, etc. > > Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> > Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> > --- > v4 -> v5: Use double '\t' for better alignment. > v4: Initial patch. > --- > app/test/test_cpuflags.c | 39 > +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index > 06718631f..7c71ffef1 100644 > --- a/app/test/test_cpuflags.c > +++ b/app/test/test_cpuflags.c > @@ -118,6 +118,45 @@ test_cpuflags(void) > > printf("Check for ATOMICS:\t"); > CHECK_FOR_FLAG(RTE_CPUFLAG_ATOMICS); > + > + printf("Check for SVE:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE); > + > + printf("Check for SVE2:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE2); > + Sorry if I didn't make it clear. In v4, I meant we need double '\t' when checking for 'SVE' and 'SVE2' to align the check results with that of other flags. You can check this by running cpuflags_autotest. Thanks. /Ruifeng > + printf("Check for SVEAES:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEAES); > + > + printf("Check for SVEPMULL:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEPMULL); > + > + printf("Check for SVEBITPERM:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBITPERM); > + > + printf("Check for SVESHA3:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESHA3); > + > + printf("Check for SVESM4:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESM4); > + > + printf("Check for FLAGM2:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_FLAGM2); > + > + printf("Check for FRINT:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_FRINT); > + > + printf("Check for SVEI8MM:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEI8MM); > + > + printf("Check for SVEF32MM:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF32MM); > + > + printf("Check for SVEF64MM:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF64MM); > + > + printf("Check for SVEBF16:\t\t"); > + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBF16); > #endif > > #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > -- > 2.27.0
This series updates CPU flags for arm64 platform. Wei Hu (Xavier) (2): eal/arm64: update CPU flags test/cpuflag: add new flags for ARM64 platform app/test/test_cpuflags.c | 39 ++++++++++++++++++++ lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++ lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++ 3 files changed, 65 insertions(+) -- 2.27.0
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> ARM64 Linux kernel updated the CPU flags using the HWCAP scheme. The related marco definition can be found in linux kernel: arch/arm64/include/uapi/asm/hwcap.h This patch incorporates those changes to the eal library. Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> --- v4 -> v5: No change. v3 -> v4: Update commit log. v2 -> v3: 1. Change commit log. 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[]. 3. Add the flags for newly added items into enum rte_cpu_flag_t. v1 -> v2: Adds more sve-related definition to rte_cpu_feature_table, sunch as SVE2, etc. --- lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++ lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++ 2 files changed, 26 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h index 95cc01474..aa7a56d49 100644 --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h @@ -22,6 +22,19 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_SHA2, RTE_CPUFLAG_CRC32, RTE_CPUFLAG_ATOMICS, + RTE_CPUFLAG_SVE, + RTE_CPUFLAG_SVE2, + RTE_CPUFLAG_SVEAES, + RTE_CPUFLAG_SVEPMULL, + RTE_CPUFLAG_SVEBITPERM, + RTE_CPUFLAG_SVESHA3, + RTE_CPUFLAG_SVESM4, + RTE_CPUFLAG_FLAGM2, + RTE_CPUFLAG_FRINT, + RTE_CPUFLAG_SVEI8MM, + RTE_CPUFLAG_SVEF32MM, + RTE_CPUFLAG_SVEF64MM, + RTE_CPUFLAG_SVEBF16, RTE_CPUFLAG_AARCH64, /* The last item */ RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c index caf3dc83a..7b257b787 100644 --- a/lib/librte_eal/arm/rte_cpuflags.c +++ b/lib/librte_eal/arm/rte_cpuflags.c @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(SHA2, REG_HWCAP, 6) FEAT_DEF(CRC32, REG_HWCAP, 7) FEAT_DEF(ATOMICS, REG_HWCAP, 8) + FEAT_DEF(SVE, REG_HWCAP, 22) + FEAT_DEF(SVE2, REG_HWCAP2, 1) + FEAT_DEF(SVEAES, REG_HWCAP2, 2) + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3) + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4) + FEAT_DEF(SVESHA3, REG_HWCAP2, 5) + FEAT_DEF(SVESM4, REG_HWCAP2, 6) + FEAT_DEF(FLAGM2, REG_HWCAP2, 7) + FEAT_DEF(FRINT, REG_HWCAP2, 8) + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9) + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) + FEAT_DEF(SVEBF16, REG_HWCAP2, 12) FEAT_DEF(AARCH64, REG_PLATFORM, 1) }; #endif /* RTE_ARCH */ -- 2.27.0
From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> This patch adds new flags into the test_cpuflags() functions for ARM64 platform, such as RTE_CPUFLAG_SVE, etc. Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> --- v5 -> v6: update '\t' for alignment. v4 -> v5: Use double '\t' for better alignment. v4: Initial patch. --- app/test/test_cpuflags.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index 06718631f..0b389d091 100644 --- a/app/test/test_cpuflags.c +++ b/app/test/test_cpuflags.c @@ -118,6 +118,45 @@ test_cpuflags(void) printf("Check for ATOMICS:\t"); CHECK_FOR_FLAG(RTE_CPUFLAG_ATOMICS); + + printf("Check for SVE:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE); + + printf("Check for SVE2:\t\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE2); + + printf("Check for SVEAES:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEAES); + + printf("Check for SVEPMULL:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEPMULL); + + printf("Check for SVEBITPERM:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBITPERM); + + printf("Check for SVESHA3:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESHA3); + + printf("Check for SVESM4:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESM4); + + printf("Check for FLAGM2:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_FLAGM2); + + printf("Check for FRINT:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_FRINT); + + printf("Check for SVEI8MM:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEI8MM); + + printf("Check for SVEF32MM:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF32MM); + + printf("Check for SVEF64MM:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF64MM); + + printf("Check for SVEBF16:\t"); + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBF16); #endif #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) -- 2.27.0
Hi, Ruifeng Wang On 2020/8/19 16:11, Ruifeng Wang wrote: > >> -----Original Message----- >> From: Wei Hu (Xavier) <huwei013@chinasoftinc.com> >> Sent: Wednesday, August 19, 2020 3:04 PM >> To: dev@dpdk.org >> Cc: nd <nd@arm.com>; Honnappa Nagarahalli >> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang >> <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com; >> xavier.huwei@huawei.com >> Subject: [PATCH v5 2/2] test/cpuflag: add new flags for ARM64 platform >> >> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com> >> >> This patch adds new flags into the test_cpuflags() functions for ARM64 >> platform, such as RTE_CPUFLAG_SVE, etc. >> >> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> >> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> >> --- >> v4 -> v5: Use double '\t' for better alignment. >> v4: Initial patch. >> --- >> app/test/test_cpuflags.c | 39 >> +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 39 insertions(+) >> >> diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c index >> 06718631f..7c71ffef1 100644 >> --- a/app/test/test_cpuflags.c >> +++ b/app/test/test_cpuflags.c >> @@ -118,6 +118,45 @@ test_cpuflags(void) >> >> printf("Check for ATOMICS:\t"); >> CHECK_FOR_FLAG(RTE_CPUFLAG_ATOMICS); >> + >> + printf("Check for SVE:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE); >> + >> + printf("Check for SVE2:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVE2); >> + > Sorry if I didn't make it clear. > In v4, I meant we need double '\t' when checking for 'SVE' and 'SVE2' to align the check results with that of other flags. > You can check this by running cpuflags_autotest. > OK, I got it. Thanks for you detail description. Regards Xavier > Thanks. > /Ruifeng >> + printf("Check for SVEAES:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEAES); >> + >> + printf("Check for SVEPMULL:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEPMULL); >> + >> + printf("Check for SVEBITPERM:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBITPERM); >> + >> + printf("Check for SVESHA3:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESHA3); >> + >> + printf("Check for SVESM4:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVESM4); >> + >> + printf("Check for FLAGM2:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_FLAGM2); >> + >> + printf("Check for FRINT:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_FRINT); >> + >> + printf("Check for SVEI8MM:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEI8MM); >> + >> + printf("Check for SVEF32MM:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF32MM); >> + >> + printf("Check for SVEF64MM:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEF64MM); >> + >> + printf("Check for SVEBF16:\t\t"); >> + CHECK_FOR_FLAG(RTE_CPUFLAG_SVEBF16); >> #endif >> >> #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) >> -- >> 2.27.0
Friendly ping
On 2020/8/19 18:56, Wei Hu (Xavier) wrote:
> This series updates CPU flags for arm64 platform.
>
> Wei Hu (Xavier) (2):
> eal/arm64: update CPU flags
> test/cpuflag: add new flags for ARM64 platform
>
> app/test/test_cpuflags.c | 39 ++++++++++++++++++++
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++
> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++
> 3 files changed, 65 insertions(+)
>
Hi, all
Are there any other comments?
Thanks
Xavier
On 2020/8/19 18:56, Wei Hu (Xavier) wrote:
> This series updates CPU flags for arm64 platform.
>
> Wei Hu (Xavier) (2):
> eal/arm64: update CPU flags
> test/cpuflag: add new flags for ARM64 platform
>
> app/test/test_cpuflags.c | 39 ++++++++++++++++++++
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++
> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++
> 3 files changed, 65 insertions(+)
>
Hi, all
Are there any other comments?
Thanks
Xavier
On 2020/8/19 18:56, Wei Hu (Xavier) wrote:
> This series updates CPU flags for arm64 platform.
>
> Wei Hu (Xavier) (2):
> eal/arm64: update CPU flags
> test/cpuflag: add new flags for ARM64 platform
>
> app/test/test_cpuflags.c | 39 ++++++++++++++++++++
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++
> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++
> 3 files changed, 65 insertions(+)
>
Friendly ping.
On 2020/8/19 18:56, Wei Hu (Xavier) wrote:
> This series updates CPU flags for arm64 platform.
>
> Wei Hu (Xavier) (2):
> eal/arm64: update CPU flags
> test/cpuflag: add new flags for ARM64 platform
>
> app/test/test_cpuflags.c | 39 ++++++++++++++++++++
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++
> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++
> 3 files changed, 65 insertions(+)
>
> -----Original Message-----
> From: Wei Hu (Xavier) <huwei013@chinasoftinc.com>
> Sent: Wednesday, August 19, 2020 6:57 PM
> To: dev@dpdk.org
> Cc: nd <nd@arm.com>; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com;
> xavier.huwei@huawei.com
> Subject: [PATCH v6 0/2] update CPU flags for arm64 platform
>
> This series updates CPU flags for arm64 platform.
>
> Wei Hu (Xavier) (2):
> eal/arm64: update CPU flags
> test/cpuflag: add new flags for ARM64 platform
>
> app/test/test_cpuflags.c | 39 ++++++++++++++++++++
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++
> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++
> 3 files changed, 65 insertions(+)
>
> --
> 2.27.0
For the series:
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Hi, Thomas Monjalon
For this series, ARM engineer has already given them backed by. If you
have no other opinion, can we merge them? so we can continue to promote
other patch sets accelerated by using SVE instructions.
Hope for your reply, thanks.
Regards
Xavier
On 2020/9/30 9:44, Ruifeng Wang wrote:
>
>> -----Original Message-----
>> From: Wei Hu (Xavier) <huwei013@chinasoftinc.com>
>> Sent: Wednesday, August 19, 2020 6:57 PM
>> To: dev@dpdk.org
>> Cc: nd <nd@arm.com>; Honnappa Nagarahalli
>> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang
>> <Ruifeng.Wang@arm.com>; jerinjacobk@gmail.com;
>> xavier.huwei@huawei.com
>> Subject: [PATCH v6 0/2] update CPU flags for arm64 platform
>>
>> This series updates CPU flags for arm64 platform.
>>
>> Wei Hu (Xavier) (2):
>> eal/arm64: update CPU flags
>> test/cpuflag: add new flags for ARM64 platform
>>
>> app/test/test_cpuflags.c | 39 ++++++++++++++++++++
>> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++
>> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++
>> 3 files changed, 65 insertions(+)
>>
>> --
>> 2.27.0
>
> For the series:
> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
>
Hi, Thomas Monjalon
For this series, ARM engineer has already given them backed by. If you
have no other opinion, can we merge them? so we can continue to promote
other patch sets accelerated by using SVE instructions.
Hope for your reply, thanks.
Regards
Xavier
On 2020/8/19 18:56, Wei Hu (Xavier) wrote:
> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>
>
> ARM64 Linux kernel updated the CPU flags using the HWCAP scheme.
> The related marco definition can be found in linux kernel:
> arch/arm64/include/uapi/asm/hwcap.h
>
> This patch incorporates those changes to the eal library.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> ---
> v4 -> v5:
> No change.
> v3 -> v4:
> Update commit log.
> v2 -> v3:
> 1. Change commit log.
> 2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[].
> 3. Add the flags for newly added items into enum rte_cpu_flag_t.
> v1 -> v2:
> Adds more sve-related definition to rte_cpu_feature_table,
> sunch as SVE2, etc.
> ---
> lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++
> lib/librte_eal/arm/rte_cpuflags.c | 13 +++++++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> index 95cc01474..aa7a56d49 100644
> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> @@ -22,6 +22,19 @@ enum rte_cpu_flag_t {
> RTE_CPUFLAG_SHA2,
> RTE_CPUFLAG_CRC32,
> RTE_CPUFLAG_ATOMICS,
> + RTE_CPUFLAG_SVE,
> + RTE_CPUFLAG_SVE2,
> + RTE_CPUFLAG_SVEAES,
> + RTE_CPUFLAG_SVEPMULL,
> + RTE_CPUFLAG_SVEBITPERM,
> + RTE_CPUFLAG_SVESHA3,
> + RTE_CPUFLAG_SVESM4,
> + RTE_CPUFLAG_FLAGM2,
> + RTE_CPUFLAG_FRINT,
> + RTE_CPUFLAG_SVEI8MM,
> + RTE_CPUFLAG_SVEF32MM,
> + RTE_CPUFLAG_SVEF64MM,
> + RTE_CPUFLAG_SVEBF16,
> RTE_CPUFLAG_AARCH64,
> /* The last item */
> RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
> diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c
> index caf3dc83a..7b257b787 100644
> --- a/lib/librte_eal/arm/rte_cpuflags.c
> +++ b/lib/librte_eal/arm/rte_cpuflags.c
> @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = {
> FEAT_DEF(SHA2, REG_HWCAP, 6)
> FEAT_DEF(CRC32, REG_HWCAP, 7)
> FEAT_DEF(ATOMICS, REG_HWCAP, 8)
> + FEAT_DEF(SVE, REG_HWCAP, 22)
> + FEAT_DEF(SVE2, REG_HWCAP2, 1)
> + FEAT_DEF(SVEAES, REG_HWCAP2, 2)
> + FEAT_DEF(SVEPMULL, REG_HWCAP2, 3)
> + FEAT_DEF(SVEBITPERM, REG_HWCAP2, 4)
> + FEAT_DEF(SVESHA3, REG_HWCAP2, 5)
> + FEAT_DEF(SVESM4, REG_HWCAP2, 6)
> + FEAT_DEF(FLAGM2, REG_HWCAP2, 7)
> + FEAT_DEF(FRINT, REG_HWCAP2, 8)
> + FEAT_DEF(SVEI8MM, REG_HWCAP2, 9)
> + FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
> + FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
> + FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
> FEAT_DEF(AARCH64, REG_PLATFORM, 1)
> };
> #endif /* RTE_ARCH */
> > This series updates CPU flags for arm64 platform.
> >
> > Wei Hu (Xavier) (2):
> > eal/arm64: update CPU flags
> > test/cpuflag: add new flags for ARM64 platform
>
> For the series:
> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Applied, thanks