From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B5D7BA04AF; Thu, 20 Aug 2020 14:55:56 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 596B21C1C0; Thu, 20 Aug 2020 14:52:24 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 70AAC1C1AA for ; Thu, 20 Aug 2020 14:52:17 +0200 (CEST) IronPort-SDR: xeJ53EB2xlZjFFHisTQMSbEKxfqoVe291HLkD0QGoohwQbsDj8j47OTeRNyzY0m12kxwLUotT6 suPUFaARopig== X-IronPort-AV: E=McAfee;i="6000,8403,9718"; a="219594330" X-IronPort-AV: E=Sophos;i="5.76,332,1592895600"; d="scan'208";a="219594330" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Aug 2020 05:52:17 -0700 IronPort-SDR: cGwDobkn2K0jCTcwpJjVl8CnNshzU3te4jyA32Ab5dMlhDXkeC8HYNjUMIjg+2TuQfSmr4XnAu VT7EX2t2LbSA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,332,1592895600"; d="scan'208";a="498130731" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga005.fm.intel.com with ESMTP; 20 Aug 2020 05:52:15 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Olivier Matz , Andrew Rybchenko , Honnappa Nagarahalli , Konstantin Ananyev Date: Thu, 20 Aug 2020 13:41:20 +0100 Message-Id: <20200820124140.13451-18-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200820124140.13451-1-ciara.power@intel.com> References: <20200807123009.21266-1-ciara.power@intel.com> <20200820124140.13451-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 17/37] lib: remove references to make config options X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Make is no longer supported for compiling DPDK, references are now removed in code comments. Signed-off-by: Ciara Power --- lib/librte_mempool/rte_mempool.h | 2 +- lib/librte_ring/rte_ring_elem.h | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h index 9e0ee052b3..6ad7e31170 100644 --- a/lib/librte_mempool/rte_mempool.h +++ b/lib/librte_mempool/rte_mempool.h @@ -970,7 +970,7 @@ typedef void (rte_mempool_ctor_t)(struct rte_mempool *, void *); * If cache_size is non-zero, the rte_mempool library will try to * limit the accesses to the common lockless pool, by maintaining a * per-lcore object cache. This argument must be lower or equal to - * CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE and n / 1.5. It is advised to choose + * RTE_MEMPOOL_CACHE_MAX_SIZE and n / 1.5. It is advised to choose * cache_size to have "n modulo cache_size == 0": if this is * not the case, some elements will always stay in the pool and will * never be used. The access to the per-lcore table is of course diff --git a/lib/librte_ring/rte_ring_elem.h b/lib/librte_ring/rte_ring_elem.h index 69dc51746c..938b398fc0 100644 --- a/lib/librte_ring/rte_ring_elem.h +++ b/lib/librte_ring/rte_ring_elem.h @@ -373,8 +373,7 @@ __rte_ring_dequeue_elems(struct rte_ring *r, uint32_t cons_head, * (powerpc/arm). * There are 2 choices for the users * 1.use rmb() memory barrier - * 2.use one-direction load_acquire/store_release barrier,defined by - * CONFIG_RTE_USE_C11_MEM_MODEL=y + * 2.use one-direction load_acquire/store_release barrier * It depends on performance test results. * By default, move common functions to rte_ring_generic.h */ -- 2.17.1