From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 90FBEA04AF; Fri, 21 Aug 2020 13:07:02 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 23D541C0B4; Fri, 21 Aug 2020 13:07:02 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 698E81C0B0 for ; Fri, 21 Aug 2020 13:07:00 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 07LB0kvL010430; Fri, 21 Aug 2020 04:04:01 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=CD/i923NnAG+x/YPt7rJlB2UWc0V/lh5vzhtb/rpSmI=; b=IgiwFGLn6Uo4rCjDXhes72JQJfId9pxpY1acVOZRn5vg5EzX1knpJmO4+5H18hnHSRrJ P8oYbvQWhcxHTlcjxqKO/a1/FEyJEFffQPDoVJkh+JDCUACQIcuGvL79PV+45Re0naa8 8FhJDZMLqhiVkdMYTOLAWfY6QGdbWpgMA0I4yoWps6pg+QqQHX3rL0XDtYnv0Ccs2lmx bMGZUQpqC5Zj4lPraidrsaklU3pv5176/BXJb+d5kRTEJIILmXsGqLVgAmrqm/S7nfJg UCgH3EpKCBYw7sFvrIS1mjW1kZWbRh6fi0J6khQS3vBcyFMbF80PCrTPlpsfTU2t0H5c yQ== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 3304hj1y66-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 21 Aug 2020 04:04:01 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 21 Aug 2020 04:03:59 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 21 Aug 2020 04:03:58 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 21 Aug 2020 04:03:58 -0700 Received: from localhost.localdomain (unknown [10.28.34.15]) by maili.marvell.com (Postfix) with ESMTP id A89973F703F; Fri, 21 Aug 2020 04:03:47 -0700 (PDT) From: To: Thomas Monjalon , Ferruh Yigit , Andrew Rybchenko CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Kiran Kumar K Date: Fri, 21 Aug 2020 16:33:28 +0530 Message-ID: <20200821110330.214931-1-kirankumark@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200819060446.2264111-1-kirankumark@marvell.com> References: <20200819060446.2264111-1-kirankumark@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-08-21_06:2020-08-21, 2020-08-21 signatures=0 Subject: [dpdk-dev] [PATCH v6 1/3] ethdev: add level support for RSS offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K This patch reserves 2 bits as input selection to select Inner and outer layers for RSS computation. It is combined with existing ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4. This functionality already exists in rte_flow through level parameter in RSS action configuration rte_flow_action_rss. Signed-off-by: Kiran Kumar K --- V7 Changes: * Split ethdev and testpmd changes into seperate patches. lib/librte_ethdev/rte_ethdev.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h index 70295d7ab..2a3a76d37 100644 --- a/lib/librte_ethdev/rte_ethdev.h +++ b/lib/librte_ethdev/rte_ethdev.h @@ -552,6 +552,33 @@ struct rte_eth_rss_conf { #define RTE_ETH_RSS_L3_PRE64 (1ULL << 53) #define RTE_ETH_RSS_L3_PRE96 (1ULL << 52) +/* + * We use the following macros to combine with the above layers to choose + * inner and outer layers or both for RSS computation. + * Note: Default is 0: inner layers, 1: outer layers, 2: both + * bit 50 and 51 are reserved for this. + */ + +/** + * Level 0, It basically stands for the innermost encapsulation level RSS + * can be performed on according to PMD and device capabilities. + */ +#define ETH_RSS_LEVEL_INNER (0ULL << 50) +/** + * Level 1, It basically stands for the outermost encapsulation level RSS + * can be performed on according to PMD and device capabilities. + */ +#define ETH_RSS_LEVEL_OUTER (1ULL << 50) +/** + * Level 2, It basically stands for the both inner and outermost + * encapsulation level RSS can be performed on according to PMD and + * device capabilities. + */ +#define ETH_RSS_LEVEL_INNER_OUTER (2ULL << 50) +#define ETH_RSS_LEVEL_MASK (3ULL << 50) + +#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50) + /** * For input set change of hash filter, if SRC_ONLY and DST_ONLY of * the same level are used simultaneously, it is the same case as -- 2.25.1