From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8A96BA04B1; Thu, 27 Aug 2020 18:15:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5FD6E1C119; Thu, 27 Aug 2020 18:13:52 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 198121C0AF for ; Thu, 27 Aug 2020 18:13:40 +0200 (CEST) IronPort-SDR: 64tDxak4JnvRc1T2+C1ElJk1nS2Yx+hNRLI6vxgjq/Y/sdquyQZRR6RWtxlO6+CZJN7GZ8Qite Sop2S9XMO4DQ== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767028" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767028" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:30 -0700 IronPort-SDR: xdJL+DWlxWKXeO8z0Mnsz0DMJj0d27brkpfLocA5L7FdMgXRsyPkQ6V/HHbPiGFYX1L6bq3Hf+ z3oBgcajoB2w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681524" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:29 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Qiming Yang , Qi Zhang Date: Thu, 27 Aug 2020 17:12:57 +0100 Message-Id: <20200827161304.32300-11-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 10/17] net/ice: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Qiming Yang Cc: Qi Zhang Signed-off-by: Ciara Power --- drivers/net/ice/ice_rxtx.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index 2e1f06d2c0..eda2d9a8c7 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -2889,7 +2889,9 @@ ice_set_rx_function(struct rte_eth_dev *dev) bool use_avx2 = false; if (rte_eal_process_type() == RTE_PROC_PRIMARY) { - if (!ice_rx_vec_dev_check(dev) && ad->rx_bulk_alloc_allowed) { + if (!ice_rx_vec_dev_check(dev) && ad->rx_bulk_alloc_allowed && + rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { ad->rx_vec_allowed = true; for (i = 0; i < dev->data->nb_rx_queues; i++) { rxq = dev->data->rx_queues[i]; @@ -2899,8 +2901,10 @@ ice_set_rx_function(struct rte_eth_dev *dev) } } - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) && + rte_get_max_simd_bitwidth() + >= RTE_MAX_256_SIMD) use_avx2 = true; } else { @@ -3067,7 +3071,9 @@ ice_set_tx_function(struct rte_eth_dev *dev) bool use_avx2 = false; if (rte_eal_process_type() == RTE_PROC_PRIMARY) { - if (!ice_tx_vec_dev_check(dev)) { + if (!ice_tx_vec_dev_check(dev) && + rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { ad->tx_vec_allowed = true; for (i = 0; i < dev->data->nb_tx_queues; i++) { txq = dev->data->tx_queues[i]; @@ -3077,8 +3083,10 @@ ice_set_tx_function(struct rte_eth_dev *dev) } } - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 || + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) && + rte_get_max_simd_bitwidth() + >= RTE_MAX_256_SIMD) use_avx2 = true; } else { -- 2.17.1