From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EF1A1A04B1; Thu, 27 Aug 2020 18:14:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BF0881C0D0; Thu, 27 Aug 2020 18:13:48 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 511121C0AF for ; Thu, 27 Aug 2020 18:13:40 +0200 (CEST) IronPort-SDR: FCCP92z1l9Y9Osp39/qxeV28q4f2f6DZByKnOeMOy5mH0k7/20+RrXo3ds3lfdkHzJ957+2UK/ Pn5LIITTQTnQ== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220767016" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220767016" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:26 -0700 IronPort-SDR: 2C7ijnTAPK7wg55al4rV+Q5XKG7oe3PpqBcP1VNAjqIQJB05lRgN7dw20bBURmm8dupQu1eD0+ Vp3M3og0HdrQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681495" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:25 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , John Daley , Hyong Youb Kim Date: Thu, 27 Aug 2020 17:12:54 +0100 Message-Id: <20200827161304.32300-8-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200827161304.32300-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 07/17] net/enic: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: John Daley Cc: Hyong Youb Kim Acked-by: Hyong Youb Kim Signed-off-by: Ciara Power --- drivers/net/enic/enic_rxtx_vec_avx2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/enic/enic_rxtx_vec_avx2.c b/drivers/net/enic/enic_rxtx_vec_avx2.c index 676b9f5fdb..5db43bdbb8 100644 --- a/drivers/net/enic/enic_rxtx_vec_avx2.c +++ b/drivers/net/enic/enic_rxtx_vec_avx2.c @@ -821,7 +821,8 @@ enic_use_vector_rx_handler(struct rte_eth_dev *eth_dev) fconf = ð_dev->data->dev_conf.fdir_conf; if (fconf->mode != RTE_FDIR_MODE_NONE) return false; - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) { + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && + rte_get_max_simd_bitwidth() >= RTE_MAX_256_SIMD) { ENICPMD_LOG(DEBUG, " use the non-scatter avx2 Rx handler"); eth_dev->rx_pkt_burst = &enic_noscatter_vec_recv_pkts; enic->use_noscatter_vec_rx_handler = 1; -- 2.17.1