From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5E480A04B5; Wed, 23 Sep 2020 03:56:01 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3F7411DB66; Wed, 23 Sep 2020 03:56:01 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id EE1111DAD5 for ; Wed, 23 Sep 2020 03:55:59 +0200 (CEST) IronPort-SDR: ocq+vBdlPDYWj1GQ/PyZ2dpZrgFeJW++nMKhaxX8SQB7EO9ryuIOA2Q32xbvs/rQbA4N14lsL7 PKb7mJQv1Y8Q== X-IronPort-AV: E=McAfee;i="6000,8403,9752"; a="161689406" X-IronPort-AV: E=Sophos;i="5.77,292,1596524400"; d="scan'208";a="161689406" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Sep 2020 18:55:58 -0700 IronPort-SDR: jyPVL/D/zubPMqtibNIGX58+roFWtyOK4Q6wJjf2JbbdbA68sO3ZQZRlUPzA3JHM5L9Ou7r1di Fcmcke3xXKdQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,292,1596524400"; d="scan'208";a="486221555" Received: from npg-dpdk-virtual-marvin-dev.sh.intel.com ([10.67.119.56]) by orsmga005.jf.intel.com with ESMTP; 22 Sep 2020 18:55:57 -0700 From: Marvin Liu To: bruce.richardson@intel.com, stephen@networkplumber.org Cc: dev@dpdk.org, Marvin Liu Date: Wed, 23 Sep 2020 09:51:31 +0800 Message-Id: <20200923015131.101203-1-yong.liu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200922082135.62240-1-yong.liu@intel.com> References: <20200922082135.62240-1-yong.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2] config: enable packet data prefetch X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Data prefetch instruction can preload data into cpu’s hierarchical cache before data access. Virtualized data paths like virtio utilized this feature for acceleration. Since most modern cpus have support prefetch function, we can enable packet data prefetch as default. Signed-off-by: Marvin Liu --- v2: move define from meson.build to rte_config.h --- config/rte_config.h | 1 + 1 file changed, 1 insertion(+) diff --git a/config/rte_config.h b/config/rte_config.h index 0bae630fd9..8b007c4c31 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -101,6 +101,7 @@ #define RTE_LIBRTE_GRAPH_STATS 1 /****** driver defines ********/ +#define RTE_PMD_PACKET_PREFETCH 1 /* QuickAssist device */ /* Max. number of QuickAssist devices which can be attached */ -- 2.17.1