From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0A1B3A04B5; Wed, 30 Sep 2020 15:12:37 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9C0A01DB83; Wed, 30 Sep 2020 15:08:40 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 0AE831DB44 for ; Wed, 30 Sep 2020 15:08:24 +0200 (CEST) IronPort-SDR: kQa7KCYebNYTwsViF9Oz6XIO15xGL/9lvo6HDU+IN1JSvP4hLN6/O58kSirBcrcCvtlbHBqt2N QpIJDB5EMCtQ== X-IronPort-AV: E=McAfee;i="6000,8403,9759"; a="150223489" X-IronPort-AV: E=Sophos;i="5.77,322,1596524400"; d="scan'208";a="150223489" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2020 06:08:23 -0700 IronPort-SDR: oibkUHzkZC9DqYke/Qa1mm/zKiFHhUSdJ9bdtIVkjFypAGFAT5aJ3pMxviCFoOW82ScujHfvrX jK3bfcPVZAnA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,322,1596524400"; d="scan'208";a="294603259" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga008.fm.intel.com with ESMTP; 30 Sep 2020 06:08:21 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Maxime Coquelin , Chenbo Xia , Zhihong Wang Date: Wed, 30 Sep 2020 14:04:09 +0100 Message-Id: <20200930130415.11211-14-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200930130415.11211-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200930130415.11211-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v3 13/18] net/virtio: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Archived-At: List-Archive: When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Maxime Coquelin Cc: Chenbo Xia Cc: Zhihong Wang Signed-off-by: Ciara Power --- v3: Moved max SIMD bitwidth check to configure function with other vec support checks. --- drivers/net/virtio/virtio_ethdev.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/net/virtio/virtio_ethdev.c b/drivers/net/virtio/virtio_ethdev.c index 013a2904e6..f749e81405 100644 --- a/drivers/net/virtio/virtio_ethdev.c +++ b/drivers/net/virtio/virtio_ethdev.c @@ -2306,7 +2306,8 @@ virtio_dev_configure(struct rte_eth_dev *dev) if ((hw->use_vec_rx || hw->use_vec_tx) && (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) || !vtpci_with_feature(hw, VIRTIO_F_IN_ORDER) || - !vtpci_with_feature(hw, VIRTIO_F_VERSION_1))) { + !vtpci_with_feature(hw, VIRTIO_F_VERSION_1) || + rte_get_max_simd_bitwidth() < RTE_MAX_512_SIMD)) { PMD_DRV_LOG(INFO, "disabled packed ring vectorized path for requirements not met"); hw->use_vec_rx = 0; @@ -2359,6 +2360,12 @@ virtio_dev_configure(struct rte_eth_dev *dev) "disabled split ring vectorized rx for offloading enabled"); hw->use_vec_rx = 0; } + + if (rte_get_max_simd_bitwidth() < RTE_MAX_128_SIMD) { + PMD_DRV_LOG(INFO, + "disabled split ring vectorized rx, max SIMD bitwidth too low"); + hw->use_vec_rx = 0; + } } } -- 2.17.1