From: Jiawen Wu <jiawenwu@trustnetic.com>
To: dev@dpdk.org
Cc: jiawenwu <jiawenwu@trustnetic.com>
Subject: [dpdk-dev] [PATCH v2 37/56] net/txgbe: add SWFW semaphore and lock
Date: Mon, 5 Oct 2020 20:08:51 +0800 [thread overview]
Message-ID: <20201005120910.189343-38-jiawenwu@trustnetic.com> (raw)
In-Reply-To: <20201005120910.189343-1-jiawenwu@trustnetic.com>
From: jiawenwu <jiawenwu@trustnetic.com>
Add semaphore between software and firmware.
Signed-off-by: jiawenwu <jiawenwu@trustnetic.com>
---
drivers/net/txgbe/base/txgbe_eeprom.h | 8 ++
drivers/net/txgbe/base/txgbe_hw.c | 132 ++++++++++++++++++++++++++
drivers/net/txgbe/base/txgbe_hw.h | 5 +
drivers/net/txgbe/txgbe_ethdev.c | 30 ++++++
4 files changed, 175 insertions(+)
diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h b/drivers/net/txgbe/base/txgbe_eeprom.h
index 44f555bbc..34bcb3feb 100644
--- a/drivers/net/txgbe/base/txgbe_eeprom.h
+++ b/drivers/net/txgbe/base/txgbe_eeprom.h
@@ -30,6 +30,14 @@
#define TXGBE_FW_LESM_PARAMETERS_PTR 0x2
#define TXGBE_FW_LESM_STATE_1 0x1
#define TXGBE_FW_LESM_STATE_ENABLED 0x8000 /* LESM Enable bit */
+#define TXGBE_ALT_SAN_MAC_ADDR_BLK_PTR 0x27 /* Alt. SAN MAC block */
+#define TXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET 0x0 /* Alt SAN MAC capability */
+#define TXGBE_ALT_SAN_MAC_ADDR_PORT0_OFFSET 0x1 /* Alt SAN MAC 0 offset */
+#define TXGBE_ALT_SAN_MAC_ADDR_PORT1_OFFSET 0x4 /* Alt SAN MAC 1 offset */
+#define TXGBE_ALT_SAN_MAC_ADDR_WWNN_OFFSET 0x7 /* Alt WWNN prefix offset */
+#define TXGBE_ALT_SAN_MAC_ADDR_WWPN_OFFSET 0x8 /* Alt WWPN prefix offset */
+#define TXGBE_ALT_SAN_MAC_ADDR_CAPS_SANMAC 0x0 /* Alt SAN MAC exists */
+#define TXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN 0x1 /* Alt WWN base exists */
s32 txgbe_init_eeprom_params(struct txgbe_hw *hw);
s32 txgbe_calc_eeprom_checksum(struct txgbe_hw *hw);
diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c
index b38394e11..0bd8e072e 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -12,6 +12,7 @@
#define TXGBE_RAPTOR_MAX_RX_QUEUES 128
#define TXGBE_RAPTOR_RAR_ENTRIES 128
#define TXGBE_RAPTOR_MC_TBL_SIZE 128
+#define TXGBE_RAPTOR_VFT_TBL_SIZE 128
STATIC s32 txgbe_setup_copper_link_raptor(struct txgbe_hw *hw,
u32 speed,
@@ -672,6 +673,77 @@ s32 txgbe_update_mc_addr_list(struct txgbe_hw *hw, u8 *mc_addr_list,
return 0;
}
+/**
+ * txgbe_acquire_swfw_sync - Acquire SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to acquire
+ *
+ * Acquires the SWFW semaphore through the MNGSEM register for the specified
+ * function (CSR, PHY0, PHY1, EEPROM, Flash)
+ **/
+s32 txgbe_acquire_swfw_sync(struct txgbe_hw *hw, u32 mask)
+{
+ u32 mngsem = 0;
+ u32 swmask = TXGBE_MNGSEM_SW(mask);
+ u32 fwmask = TXGBE_MNGSEM_FW(mask);
+ u32 timeout = 200;
+ u32 i;
+
+ DEBUGFUNC("txgbe_acquire_swfw_sync");
+
+ for (i = 0; i < timeout; i++) {
+ /*
+ * SW NVM semaphore bit is used for access to all
+ * SW_FW_SYNC bits (not just NVM)
+ */
+ if (txgbe_get_eeprom_semaphore(hw))
+ return TXGBE_ERR_SWFW_SYNC;
+
+ mngsem = rd32(hw, TXGBE_MNGSEM);
+ if (!(mngsem & (fwmask | swmask))) {
+ mngsem |= swmask;
+ wr32(hw, TXGBE_MNGSEM, mngsem);
+ txgbe_release_eeprom_semaphore(hw);
+ return 0;
+ } else {
+ /* Resource is currently in use by FW or SW */
+ txgbe_release_eeprom_semaphore(hw);
+ msec_delay(5);
+ }
+ }
+
+ /* If time expired clear the bits holding the lock and retry */
+ if (mngsem & (fwmask | swmask))
+ txgbe_release_swfw_sync(hw, mngsem & (fwmask | swmask));
+
+ msec_delay(5);
+ return TXGBE_ERR_SWFW_SYNC;
+}
+
+/**
+ * txgbe_release_swfw_sync - Release SWFW semaphore
+ * @hw: pointer to hardware structure
+ * @mask: Mask to specify which semaphore to release
+ *
+ * Releases the SWFW semaphore through the MNGSEM register for the specified
+ * function (CSR, PHY0, PHY1, EEPROM, Flash)
+ **/
+void txgbe_release_swfw_sync(struct txgbe_hw *hw, u32 mask)
+{
+ u32 mngsem;
+ u32 swmask = mask;
+
+ DEBUGFUNC("txgbe_release_swfw_sync");
+
+ txgbe_get_eeprom_semaphore(hw);
+
+ mngsem = rd32(hw, TXGBE_MNGSEM);
+ mngsem &= ~swmask;
+ wr32(hw, TXGBE_MNGSEM, mngsem);
+
+ txgbe_release_eeprom_semaphore(hw);
+}
+
/**
* txgbe_disable_sec_rx_path - Stops the receive data path
* @hw: pointer to hardware structure
@@ -1050,6 +1122,62 @@ s32 txgbe_check_mac_link(struct txgbe_hw *hw, u32 *speed,
return 0;
}
+/**
+ * txgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from
+ * the EEPROM
+ * @hw: pointer to hardware structure
+ * @wwnn_prefix: the alternative WWNN prefix
+ * @wwpn_prefix: the alternative WWPN prefix
+ *
+ * This function will read the EEPROM from the alternative SAN MAC address
+ * block to check the support for the alternative WWNN/WWPN prefix support.
+ **/
+s32 txgbe_get_wwn_prefix(struct txgbe_hw *hw, u16 *wwnn_prefix,
+ u16 *wwpn_prefix)
+{
+ u16 offset, caps;
+ u16 alt_san_mac_blk_offset;
+
+ DEBUGFUNC("txgbe_get_wwn_prefix");
+
+ /* clear output first */
+ *wwnn_prefix = 0xFFFF;
+ *wwpn_prefix = 0xFFFF;
+
+ /* check if alternative SAN MAC is supported */
+ offset = TXGBE_ALT_SAN_MAC_ADDR_BLK_PTR;
+ if (hw->rom.readw_sw(hw, offset, &alt_san_mac_blk_offset))
+ goto wwn_prefix_err;
+
+ if ((alt_san_mac_blk_offset == 0) ||
+ (alt_san_mac_blk_offset == 0xFFFF))
+ goto wwn_prefix_out;
+
+ /* check capability in alternative san mac address block */
+ offset = alt_san_mac_blk_offset + TXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET;
+ if (hw->rom.read16(hw, offset, &caps))
+ goto wwn_prefix_err;
+ if (!(caps & TXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN))
+ goto wwn_prefix_out;
+
+ /* get the corresponding prefix for WWNN/WWPN */
+ offset = alt_san_mac_blk_offset + TXGBE_ALT_SAN_MAC_ADDR_WWNN_OFFSET;
+ if (hw->rom.read16(hw, offset, wwnn_prefix)) {
+ DEBUGOUT("eeprom read at offset %d failed", offset);
+ }
+
+ offset = alt_san_mac_blk_offset + TXGBE_ALT_SAN_MAC_ADDR_WWPN_OFFSET;
+ if (hw->rom.read16(hw, offset, wwpn_prefix))
+ goto wwn_prefix_err;
+
+wwn_prefix_out:
+ return 0;
+
+wwn_prefix_err:
+ DEBUGOUT("eeprom read at offset %d failed", offset);
+ return 0;
+}
+
/**
* txgbe_get_device_caps - Get additional device capabilities
* @hw: pointer to hardware structure
@@ -1609,6 +1737,8 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
mac->enable_rx_dma = txgbe_enable_rx_dma_raptor;
mac->get_mac_addr = txgbe_get_mac_addr;
mac->stop_hw = txgbe_stop_hw;
+ mac->acquire_swfw_sync = txgbe_acquire_swfw_sync;
+ mac->release_swfw_sync = txgbe_release_swfw_sync;
mac->reset_hw = txgbe_reset_hw;
mac->disable_sec_rx_path = txgbe_disable_sec_rx_path;
@@ -1618,6 +1748,7 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
mac->get_san_mac_addr = txgbe_get_san_mac_addr;
mac->set_san_mac_addr = txgbe_set_san_mac_addr;
mac->get_device_caps = txgbe_get_device_caps;
+ mac->get_wwn_prefix = txgbe_get_wwn_prefix;
mac->autoc_read = txgbe_autoc_read;
mac->autoc_write = txgbe_autoc_write;
@@ -1634,6 +1765,7 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
mac->check_link = txgbe_check_mac_link;
/* Manageability interface */
+ mac->set_fw_drv_ver = txgbe_hic_set_drv_ver;
mac->get_thermal_sensor_data = txgbe_get_thermal_sensor_data;
mac->init_thermal_sensor_thresh = txgbe_init_thermal_sensor_thresh;
diff --git a/drivers/net/txgbe/base/txgbe_hw.h b/drivers/net/txgbe/base/txgbe_hw.h
index dc62c8122..60e02f5e7 100644
--- a/drivers/net/txgbe/base/txgbe_hw.h
+++ b/drivers/net/txgbe/base/txgbe_hw.h
@@ -29,6 +29,8 @@ s32 txgbe_disable_sec_tx_path(struct txgbe_hw *hw);
s32 txgbe_enable_sec_tx_path(struct txgbe_hw *hw);
s32 txgbe_validate_mac_addr(u8 *mac_addr);
+s32 txgbe_acquire_swfw_sync(struct txgbe_hw *hw, u32 mask);
+void txgbe_release_swfw_sync(struct txgbe_hw *hw, u32 mask);
s32 txgbe_get_san_mac_addr(struct txgbe_hw *hw, u8 *san_mac_addr);
s32 txgbe_set_san_mac_addr(struct txgbe_hw *hw, u8 *san_mac_addr);
@@ -39,6 +41,9 @@ s32 txgbe_check_mac_link(struct txgbe_hw *hw,
u32 *speed,
bool *link_up, bool link_up_wait_to_complete);
+s32 txgbe_get_wwn_prefix(struct txgbe_hw *hw, u16 *wwnn_prefix,
+ u16 *wwpn_prefix);
+
s32 txgbe_get_device_caps(struct txgbe_hw *hw, u16 *device_caps);
void txgbe_clear_tx_pending(struct txgbe_hw *hw);
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 4df794468..b82fe062f 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -335,6 +335,29 @@ txgbe_dev_queue_stats_mapping_set(struct rte_eth_dev *eth_dev,
return 0;
}
+/*
+ * Ensure that all locks are released before first NVM or PHY access
+ */
+static void
+txgbe_swfw_lock_reset(struct txgbe_hw *hw)
+{
+ uint16_t mask;
+
+ /*
+ * These ones are more tricky since they are common to all ports; but
+ * swfw_sync retries last long enough (1s) to be almost sure that if
+ * lock can not be taken it is due to an improper lock of the
+ * semaphore.
+ */
+ mask = TXGBE_MNGSEM_SWPHY |
+ TXGBE_MNGSEM_SWMBX |
+ TXGBE_MNGSEM_SWFLASH;
+ if (hw->mac.acquire_swfw_sync(hw, mask) < 0) {
+ PMD_DRV_LOG(DEBUG, "SWFW common locks released");
+ }
+ hw->mac.release_swfw_sync(hw, mask);
+}
+
static int
eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
{
@@ -402,6 +425,9 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
return -EIO;
}
+ /* Unlock any pending hardware semaphore */
+ txgbe_swfw_lock_reset(hw);
+
err = hw->rom.init_params(hw);
if (err != 0) {
PMD_INIT_LOG(ERR, "The EEPROM init failed: %d", err);
@@ -1130,6 +1156,7 @@ txgbe_dev_start(struct rte_eth_dev *dev)
bool link_up = false, negotiate = 0;
uint32_t speed = 0;
uint32_t allowed_speeds = 0;
+ int mask = 0;
int status;
uint32_t *link_speeds;
@@ -1454,6 +1481,9 @@ txgbe_dev_close(struct rte_eth_dev *dev)
dev->rx_pkt_burst = NULL;
dev->tx_pkt_burst = NULL;
+ /* Unlock any pending hardware semaphore */
+ txgbe_swfw_lock_reset(hw);
+
/* disable uio intr before callback unregister */
rte_intr_disable(intr_handle);
--
2.18.4
next prev parent reply other threads:[~2020-10-05 12:24 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-05 12:08 [dpdk-dev] [PATCH v2 00/56] net: txgbe PMD Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 01/56] net/txgbe: add build and doc infrastructure Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 02/56] net/txgbe: add ethdev probe and remove Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 03/56] net/txgbe: add device init and uninit Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 04/56] net/txgbe: add error types and registers Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 05/56] net/txgbe: add mac type and bus lan id Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 06/56] net/txgbe: add HW infrastructure and dummy function Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 07/56] net/txgbe: add EEPROM functions Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 08/56] net/txgbe: add HW init and reset operation Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 09/56] net/txgbe: add PHY init Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 10/56] net/txgbe: add module identify Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 11/56] net/txgbe: add PHY reset Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 12/56] net/txgbe: add info get operation Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 13/56] net/txgbe: add interrupt operation Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 14/56] net/txgbe: add device configure operation Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 15/56] net/txgbe: add link status change Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 16/56] net/txgbe: add multi-speed link setup Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 17/56] net/txgbe: add autoc read and write Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 18/56] net/txgbe: add MAC address operations Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 19/56] net/txgbe: add unicast hash bitmap Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 20/56] net/txgbe: add RX and TX init Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 21/56] net/txgbe: add RX and TX queues setup and release Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 22/56] net/txgbe: add RX and TX start and stop Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 23/56] net/txgbe: add packet type Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 24/56] net/txgbe: fill simple transmit function Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 25/56] net/txgbe: fill transmit function with hardware offload Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 26/56] net/txgbe: fill TX prepare funtion Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 27/56] net/txgbe: fill receive functions Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 28/56] net/txgbe: add device start operation Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 29/56] net/txgbe: add RX and TX data path start and stop Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 30/56] net/txgbe: add device stop and close operations Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 31/56] net/txgbe: support RX interrupt Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 32/56] net/txgbe: add RX and TX queue info get Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 33/56] net/txgbe: add device stats get Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 34/56] net/txgbe: add device xstats get Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 35/56] net/txgbe: add queue stats mapping Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 36/56] net/txgbe: add VLAN handle support Jiawen Wu
2020-10-05 12:08 ` Jiawen Wu [this message]
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 38/56] net/txgbe: add PF module init and uninit for SRIOV Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 39/56] net/txgbe: add process mailbox operation Jiawen Wu
2020-10-06 11:05 ` Ferruh Yigit
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 40/56] net/txgbe: add PF module configure for SRIOV Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 41/56] net/txgbe: add VMDq configure Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 42/56] net/txgbe: add RSS support Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 43/56] net/txgbe: add DCB support Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 44/56] net/txgbe: add flow control support Jiawen Wu
2020-10-05 12:08 ` [dpdk-dev] [PATCH v2 45/56] net/txgbe: add FC auto negotiation support Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 46/56] net/txgbe: add priority flow control support Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 47/56] net/txgbe: add device promiscuous and allmulticast mode Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 48/56] net/txgbe: add MTU set operation Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 49/56] net/txgbe: add FW version get operation Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 50/56] net/txgbe: add EEPROM info " Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 51/56] net/txgbe: add register dump support Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 52/56] net/txgbe: support device LED on and off Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 53/56] net/txgbe: add mirror rule operations Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 54/56] net/txgbe: add PTP support Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 55/56] net/txgbe: add DCB info get operation Jiawen Wu
2020-10-05 12:09 ` [dpdk-dev] [PATCH v2 56/56] net/txgbe: add Rx and Tx descriptor status Jiawen Wu
2020-10-06 11:02 ` [dpdk-dev] [PATCH v2 00/56] net: txgbe PMD Ferruh Yigit
2020-10-09 3:03 ` jiawenwu
2020-10-09 9:47 ` Ferruh Yigit
2020-10-10 9:45 ` Jiawen Wu
2020-10-12 8:37 ` Ferruh Yigit
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