From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id CED89A04B7; Tue, 13 Oct 2020 12:27:43 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2BE4E1D6F8; Tue, 13 Oct 2020 12:27:42 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 314681D6DB for ; Tue, 13 Oct 2020 12:27:40 +0200 (CEST) IronPort-SDR: 2TGbYXGkiJwSrTze86CjbEcsZQSKbLDmQmGIDNIL8EqW+izGjuWx+uLsI5x5pm/hHPIqPiX+nF vJL0RJqHmkgw== X-IronPort-AV: E=McAfee;i="6000,8403,9772"; a="152818086" X-IronPort-AV: E=Sophos;i="5.77,370,1596524400"; d="scan'208";a="152818086" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2020 03:27:32 -0700 IronPort-SDR: /e2twWp6VFJyqMsVjrLg5hhcZl7rbcthfuwvkpUYkeG98p1uNiPjaFVf865/Mox9qDc7sdF/NA Tchj2gxjj4ZA== X-IronPort-AV: E=Sophos;i="5.77,370,1596524400"; d="scan'208";a="520989420" Received: from bricha3-mobl.ger.corp.intel.com ([10.213.245.209]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 13 Oct 2020 03:27:30 -0700 Date: Tue, 13 Oct 2020 11:27:26 +0100 From: Bruce Richardson To: Vladimir Medvedkin Cc: dev@dpdk.org, david.marchand@redhat.com, jerinj@marvell.com, mdr@ashroe.eu, thomas@monjalon.net, konstantin.ananyev@intel.com, ciara.power@intel.com Message-ID: <20201013102726.GB1496@bricha3-MOBL.ger.corp.intel.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [dpdk-dev] [PATCH v9 4/8] fib: introduce AVX512 lookup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Wed, Oct 07, 2020 at 05:10:38PM +0100, Vladimir Medvedkin wrote: > Add new lookup implementation for DIR24_8 algorithm using > AVX512 instruction set > > Signed-off-by: Vladimir Medvedkin > Acked-by: Konstantin Ananyev > --- > doc/guides/rel_notes/release_20_11.rst | 3 + > lib/librte_fib/dir24_8.c | 36 +++++++ > lib/librte_fib/dir24_8_avx512.c | 165 +++++++++++++++++++++++++++++++++ > lib/librte_fib/dir24_8_avx512.h | 24 +++++ > lib/librte_fib/meson.build | 34 +++++++ > lib/librte_fib/rte_fib.c | 2 +- > lib/librte_fib/rte_fib.h | 4 +- > 7 files changed, 266 insertions(+), 2 deletions(-) > create mode 100644 lib/librte_fib/dir24_8_avx512.c > create mode 100644 lib/librte_fib/dir24_8_avx512.h > > diff --git a/lib/librte_fib/meson.build b/lib/librte_fib/meson.build > index 771828f..0a8adef 100644 > --- a/lib/librte_fib/meson.build > +++ b/lib/librte_fib/meson.build > @@ -5,3 +5,37 @@ > sources = files('rte_fib.c', 'rte_fib6.c', 'dir24_8.c', 'trie.c') > headers = files('rte_fib.h', 'rte_fib6.h') > deps += ['rib'] > + > +# compile AVX512 version if: > +# we are building 64-bit binary AND binutils can generate proper code > +if dpdk_conf.has('RTE_ARCH_X86_64') and binutils_ok.returncode() == 0 > + # compile AVX512 version if either: > + # a. we have AVX512F supported in minimum instruction set baseline > + # b. it's not minimum instruction set, but supported by compiler > + # > + # in former case, just add avx512 C file to files list > + # in latter case, compile c file to static lib, using correct > + # compiler flags, and then have the .o file from static lib > + # linked into main lib. > + > + # check if all required flags already enabled (variant a). > + acl_avx512_flags = ['__AVX512F__','__AVX512DQ__'] > + acl_avx512_on = true > + foreach f:acl_avx512_flags > + if cc.get_define(f, args: machine_args) == '' > + acl_avx512_on = false > + endif > + endforeach > + > + if acl_avx512_on == true > + cflags += ['-DCC_DIR24_8_AVX512_SUPPORT'] > + sources += files('dir24_8_avx512.c') > + elif cc.has_multi_arguments('-mavx512f', '-mavx512dq') > + dir24_8_avx512_tmp = static_library('dir24_8_avx512_tmp', > + 'dir24_8_avx512.c', > + dependencies: static_rte_eal, > + c_args: cflags + ['-mavx512f', '-mavx512dq']) > + objs += dir24_8_avx512_tmp.extract_objects('dir24_8_avx512.c') > + cflags += '-DCC_DIR24_8_AVX512_SUPPORT' > + endif > +endif This meson change looks ok to me. For the build-system part: Acked-by: Bruce Richardson