From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 73856A04B7; Wed, 14 Oct 2020 14:02:37 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C07CB1DE22; Wed, 14 Oct 2020 14:02:35 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 8AB431BAA0 for ; Wed, 14 Oct 2020 08:19:22 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from elibr@nvidia.com) with SMTP; 14 Oct 2020 09:19:18 +0300 Received: from nvidia.com (dev-r-vrt-214.mtr.labs.mlnx [10.212.214.1]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09E6JIrm016271; Wed, 14 Oct 2020 09:19:18 +0300 From: Eli Britstein To: dev@dpdk.org Cc: Eli Britstein Date: Wed, 14 Oct 2020 06:19:09 +0000 Message-Id: <20201014061909.9957-1-elibr@nvidia.com> X-Mailer: git-send-email 2.28.0.546.g385c171 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Wed, 14 Oct 2020 14:02:34 +0200 Subject: [dpdk-dev] [PATCH] eal: fix build with conflicting libc variable memory_order X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The cited commit introduced functions with 'int memory_order' argument. The C11 standard section 7.17.1.4 defines 'memory_order' as the "enumerated type whose enumerators identify memory ordering constraints". Applications that use the standard enum (includes stdatomic.h), will fail compilation with: error: declaration of 'memory_order' shadows a global declaration [-Werror=shadow] rte_atomic_thread_fence(int memory_order) Fix it by changing the argument name 'memory_order' to 'memorder'. Fixes: 672a15056380 ("eal: add wrapper for C11 atomic thread fence") Signed-off-by: Eli Britstein --- lib/librte_eal/arm/include/rte_atomic_32.h | 4 ++-- lib/librte_eal/arm/include/rte_atomic_64.h | 4 ++-- lib/librte_eal/include/generic/rte_atomic.h | 2 +- lib/librte_eal/ppc/include/rte_atomic.h | 4 ++-- lib/librte_eal/x86/include/rte_atomic.h | 6 +++--- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/lib/librte_eal/arm/include/rte_atomic_32.h b/lib/librte_eal/arm/include/rte_atomic_32.h index 9d0568d497..fe48ab428e 100644 --- a/lib/librte_eal/arm/include/rte_atomic_32.h +++ b/lib/librte_eal/arm/include/rte_atomic_32.h @@ -34,9 +34,9 @@ extern "C" { #define rte_io_rmb() rte_rmb() static __rte_always_inline void -rte_atomic_thread_fence(int memory_order) +rte_atomic_thread_fence(int memorder) { - __atomic_thread_fence(memory_order); + __atomic_thread_fence(memorder); } #ifdef __cplusplus diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h b/lib/librte_eal/arm/include/rte_atomic_64.h index c518559bc9..20dd6c75dd 100644 --- a/lib/librte_eal/arm/include/rte_atomic_64.h +++ b/lib/librte_eal/arm/include/rte_atomic_64.h @@ -38,9 +38,9 @@ extern "C" { #define rte_io_rmb() rte_rmb() static __rte_always_inline void -rte_atomic_thread_fence(int memory_order) +rte_atomic_thread_fence(int memorder) { - __atomic_thread_fence(memory_order); + __atomic_thread_fence(memorder); } /*------------------------ 128 bit atomic operations -------------------------*/ diff --git a/lib/librte_eal/include/generic/rte_atomic.h b/lib/librte_eal/include/generic/rte_atomic.h index d1255b2d8c..276272f40b 100644 --- a/lib/librte_eal/include/generic/rte_atomic.h +++ b/lib/librte_eal/include/generic/rte_atomic.h @@ -122,7 +122,7 @@ static inline void rte_io_rmb(void); /** * Synchronization fence between threads based on the specified memory order. */ -static inline void rte_atomic_thread_fence(int memory_order); +static inline void rte_atomic_thread_fence(int memorder); /*------------------------- 16 bit atomic operations -------------------------*/ diff --git a/lib/librte_eal/ppc/include/rte_atomic.h b/lib/librte_eal/ppc/include/rte_atomic.h index a91989930b..6a7e65210c 100644 --- a/lib/librte_eal/ppc/include/rte_atomic.h +++ b/lib/librte_eal/ppc/include/rte_atomic.h @@ -37,9 +37,9 @@ extern "C" { #define rte_io_rmb() rte_rmb() static __rte_always_inline void -rte_atomic_thread_fence(int memory_order) +rte_atomic_thread_fence(int memorder) { - __atomic_thread_fence(memory_order); + __atomic_thread_fence(memorder); } /*------------------------- 16 bit atomic operations -------------------------*/ diff --git a/lib/librte_eal/x86/include/rte_atomic.h b/lib/librte_eal/x86/include/rte_atomic.h index b7d6b06ddf..915afd9d27 100644 --- a/lib/librte_eal/x86/include/rte_atomic.h +++ b/lib/librte_eal/x86/include/rte_atomic.h @@ -87,12 +87,12 @@ rte_smp_mb(void) * used instead. */ static __rte_always_inline void -rte_atomic_thread_fence(int memory_order) +rte_atomic_thread_fence(int memorder) { - if (memory_order == __ATOMIC_SEQ_CST) + if (memorder == __ATOMIC_SEQ_CST) rte_smp_mb(); else - __atomic_thread_fence(memory_order); + __atomic_thread_fence(memorder); } /*------------------------- 16 bit atomic operations -------------------------*/ -- 2.28.0.546.g385c171