From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 173FAA04B7; Wed, 14 Oct 2020 10:44:11 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 758321DCFF; Wed, 14 Oct 2020 10:43:17 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 5C1C81DCFF for ; Wed, 14 Oct 2020 10:43:15 +0200 (CEST) IronPort-SDR: gXS4uXZMRdxOeMHBKaxjSe5G8RhukpMG/h3D/pUzjYVyi1DLwvvlHiIgV3cleh8KxeWU2RIo4Z KfkomEyfXq0w== X-IronPort-AV: E=McAfee;i="6000,8403,9773"; a="163432206" X-IronPort-AV: E=Sophos;i="5.77,374,1596524400"; d="scan'208";a="163432206" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2020 01:43:15 -0700 IronPort-SDR: Zjmlm67Ug2s8U3cnAxmom8C4j61BNDIU9wJDEjH+yv2akWzIWnOk0Pv2CJJ7aP/eQdLnaWDjrN 5CKWjfUaghyw== X-IronPort-AV: E=Sophos;i="5.77,374,1596524400"; d="scan'208";a="299864547" Received: from intel-npg-odc-srv01.cd.intel.com ([10.240.178.136]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2020 01:43:11 -0700 From: SimonX Lu To: dev@dpdk.org Cc: jia.guo@intel.com, haiyue.wang@intel.com, qiming.yang@intel.com, beilei.xing@intel.com, orika@nvidia.com, Simon Lu Date: Wed, 14 Oct 2020 08:41:26 +0000 Message-Id: <20201014084131.72035-4-simonx.lu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201014084131.72035-1-simonx.lu@intel.com> References: <20201014084131.72035-1-simonx.lu@intel.com> Subject: [dpdk-dev] [PATCH v1 3/8] net/ixgbe: add mirror rule config and extend flow filter type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Simon Lu define ixgbe_flow_mirror_conf structure that is used for set mirror flow rule to ixgbe register, and relocate the mirror related MACORs to header file. Add base flow filter insert & remove for mirror filter. Signed-off-by: Simon Lu --- drivers/net/ixgbe/ixgbe_ethdev.c | 8 ----- drivers/net/ixgbe/ixgbe_ethdev.h | 53 ++++++++++++++++++++++++++++++-- 2 files changed, 51 insertions(+), 10 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 0b98e210e..10bbc4670 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -5744,14 +5744,6 @@ ixgbe_convert_vm_rx_mask_to_val(uint16_t rx_mask, uint32_t orig_val) return new_val; } -#define IXGBE_MRCTL_VPME 0x01 /* Virtual Pool Mirroring. */ -#define IXGBE_MRCTL_UPME 0x02 /* Uplink Port Mirroring. */ -#define IXGBE_MRCTL_DPME 0x04 /* Downlink Port Mirroring. */ -#define IXGBE_MRCTL_VLME 0x08 /* VLAN Mirroring. */ -#define IXGBE_INVALID_MIRROR_TYPE(mirror_type) \ - ((mirror_type) & ~(uint8_t)(ETH_MIRROR_VIRTUAL_POOL_UP | \ - ETH_MIRROR_UPLINK_PORT | ETH_MIRROR_DOWNLINK_PORT | ETH_MIRROR_VLAN)) - static int ixgbe_mirror_rule_set(struct rte_eth_dev *dev, struct rte_eth_mirror_conf *mirror_conf, diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h index 9bdef87fb..060946b08 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.h +++ b/drivers/net/ixgbe/ixgbe_ethdev.h @@ -216,6 +216,27 @@ struct ixgbe_rte_flow_rss_conf { uint16_t queue[IXGBE_MAX_RX_QUEUE_NUM]; /**< Queues indices to use. */ }; +#define IXGBE_MAX_MIRROR_RULES 4 /* Maximum nb. of mirror rules. */ +#define IXGBE_MRCTL_VPME 0x01 /* Virtual Pool Mirroring. */ +#define IXGBE_MRCTL_UPME 0x02 /* Uplink Port Mirroring. */ +#define IXGBE_MRCTL_DPME 0x04 /* Downlink Port Mirroring. */ +#define IXGBE_MRCTL_VLME 0x08 /* VLAN Mirroring. */ +#define IXGBE_INVALID_MIRROR_TYPE(mirror_type) \ + ((mirror_type) & ~(uint8_t)(ETH_MIRROR_VIRTUAL_POOL_UP |\ + ETH_MIRROR_UPLINK_PORT | \ + ETH_MIRROR_DOWNLINK_PORT | \ + ETH_MIRROR_VLAN)) + +struct ixgbe_flow_mirror_conf { + uint8_t rule_type; + uint16_t rule_id; + uint8_t dst_pool; /* Destination pool for this mirror rule. */ + uint64_t pool_mask; /* Bitmap of pool for virtual pool mirroring */ + uint64_t vlan_mask; /* mask for valid VLAN ID. */ + /* VLAN ID list for vlan mirroring. */ + uint16_t vlan_id[ETH_MIRROR_MAX_VLANS]; +}; + /* structure for interrupt relative data */ struct ixgbe_interrupt { uint32_t flags; @@ -250,8 +271,6 @@ struct ixgbe_uta_info { uint32_t uta_shadow[IXGBE_MAX_UTA]; }; -#define IXGBE_MAX_MIRROR_RULES 4 /* Maximum nb. of mirror rules. */ - struct ixgbe_mirror_info { struct rte_eth_mirror_conf mr_conf[IXGBE_MAX_MIRROR_RULES]; /**< store PF mirror rules configuration*/ @@ -337,6 +356,8 @@ struct ixgbe_filter_info { uint32_t syn_info; /* store the rss filter info */ struct ixgbe_rte_flow_rss_conf rss_info; + uint8_t mirror_mask; /* Bit mask for every used mirror filter */ + struct ixgbe_flow_mirror_conf mirror_filters[IXGBE_MAX_MIRROR_RULES]; }; struct ixgbe_l2_tn_key { @@ -820,4 +841,32 @@ ixgbe_ethertype_filter_remove(struct ixgbe_filter_info *filter_info, return idx; } +static inline int8_t +ixgbe_mirror_filter_insert(struct ixgbe_filter_info *filter_info, + struct ixgbe_flow_mirror_conf *mirror_conf) +{ + int i; + + for (i = 0; i < IXGBE_MAX_MIRROR_RULES; i++) { + if (!(filter_info->mirror_mask & (1 << i))) { + filter_info->mirror_mask |= 1 << i; + mirror_conf->rule_id = i; + filter_info->mirror_filters[i] = *mirror_conf; + return i; + } + } + return -1; +} + +static inline int +ixgbe_mirror_filter_remove(struct ixgbe_filter_info *filter_info, + uint8_t idx) +{ + if (idx >= IXGBE_MAX_MIRROR_RULES) + return -1; + filter_info->mirror_mask &= ~(1 << idx); + memset(&filter_info->mirror_filters[idx], 0, + sizeof(filter_info->mirror_filters[0])); + return idx; +} #endif /* _IXGBE_ETHDEV_H_ */ -- 2.17.1