From: Ciara Power <ciara.power@intel.com> To: dev@dpdk.org Cc: viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com, drc@linux.vnet.ibm.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, Ciara Power <ciara.power@intel.com>, Jasvinder Singh <jasvinder.singh@intel.com>, Olivier Matz <olivier.matz@6wind.com> Subject: [dpdk-dev] [PATCH v6 16/18] net: add checks for max SIMD bitwidth Date: Thu, 15 Oct 2020 11:38:12 +0100 Message-ID: <20201015103814.253636-17-ciara.power@intel.com> (raw) In-Reply-To: <20201015103814.253636-1-ciara.power@intel.com> When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. The vector path was initially chosen in RTE_INIT, however this is no longer suitable as we cannot check the max SIMD bitwidth at that time. Default handlers are now chosen on initialisation, these default handlers are used the first time the crc calc is called, and they set the suitable handlers to be used going forward. Suggested-by: Jasvinder Singh <jasvinder.singh@intel.com> Suggested-by: Olivier Matz <olivier.matz@6wind.com> Signed-off-by: Ciara Power <ciara.power@intel.com> --- v6: - Moved log variable and macro to c file instead of public header. - Added the max_simd_bitwidth condition check to the recently added handler helper functions. - Modified default handlers to follow the approach of the set alg function. v4: - Added default handlers to be set at RTE_INIT time, rather than choosing scalar handlers. - Modified logging. - Updated enum name. v3: - Moved choosing vector paths out of RTE_INIT. - Moved checking max_simd_bitwidth into the set_alg function. --- lib/librte_net/rte_net_crc.c | 117 +++++++++++++++++++++++++---------- 1 file changed, 86 insertions(+), 31 deletions(-) diff --git a/lib/librte_net/rte_net_crc.c b/lib/librte_net/rte_net_crc.c index 32a3665908..bce5f5f15b 100644 --- a/lib/librte_net/rte_net_crc.c +++ b/lib/librte_net/rte_net_crc.c @@ -9,6 +9,8 @@ #include <rte_cpuflags.h> #include <rte_common.h> #include <rte_net_crc.h> +#include <rte_eal.h> +#include <rte_log.h> #include "net_crc.h" @@ -22,6 +24,12 @@ static uint32_t crc32_eth_lut[CRC_LUT_SIZE]; static uint32_t crc16_ccitt_lut[CRC_LUT_SIZE]; +static uint32_t +rte_crc16_ccitt_default_handler(const uint8_t *data, uint32_t data_len); + +static uint32_t +rte_crc32_eth_default_handler(const uint8_t *data, uint32_t data_len); + static uint32_t rte_crc16_ccitt_handler(const uint8_t *data, uint32_t data_len); @@ -31,7 +39,12 @@ rte_crc32_eth_handler(const uint8_t *data, uint32_t data_len); typedef uint32_t (*rte_net_crc_handler)(const uint8_t *data, uint32_t data_len); -static const rte_net_crc_handler *handlers; +static rte_net_crc_handler handlers_default[] = { + [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_default_handler, + [RTE_NET_CRC32_ETH] = rte_crc32_eth_default_handler, +}; + +static const rte_net_crc_handler *handlers = handlers_default; static const rte_net_crc_handler handlers_scalar[] = { [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_handler, @@ -56,6 +69,15 @@ static const rte_net_crc_handler handlers_neon[] = { }; #endif +static uint16_t max_simd_bitwidth; +extern int libnet_logtype; + +#define NET_LOG(level, fmt, args...) \ + rte_log(RTE_LOG_ ## level, libnet_logtype, "%s(): " fmt "\n", \ + __func__, ## args) + +RTE_LOG_REGISTER(libnet_logtype, lib.net, INFO); + /* Scalar handling */ /** @@ -155,22 +177,21 @@ static const rte_net_crc_handler * avx512_vpclmulqdq_get_handlers(void) { #ifdef CC_X86_64_AVX512_VPCLMULQDQ_SUPPORT - if (AVX512_VPCLMULQDQ_CPU_SUPPORTED) + if (AVX512_VPCLMULQDQ_CPU_SUPPORTED && + max_simd_bitwidth >= RTE_SIMD_512) return handlers_avx512; #endif + NET_LOG(INFO, "Requirements not met, can't use AVX512\n"); return NULL; } -static uint8_t +static void avx512_vpclmulqdq_init(void) { #ifdef CC_X86_64_AVX512_VPCLMULQDQ_SUPPORT - if (AVX512_VPCLMULQDQ_CPU_SUPPORTED) { + if (AVX512_VPCLMULQDQ_CPU_SUPPORTED) rte_net_crc_avx512_init(); - return 1; - } #endif - return 0; } /* SSE4.2/PCLMULQDQ handling */ @@ -182,22 +203,21 @@ static const rte_net_crc_handler * sse42_pclmulqdq_get_handlers(void) { #ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT - if (SSE42_PCLMULQDQ_CPU_SUPPORTED) + if (SSE42_PCLMULQDQ_CPU_SUPPORTED && + max_simd_bitwidth >= RTE_SIMD_128) return handlers_sse42; #endif + NET_LOG(INFO, "Requirements not met, can't use SSE\n"); return NULL; } -static uint8_t +static void sse42_pclmulqdq_init(void) { #ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT - if (SSE42_PCLMULQDQ_CPU_SUPPORTED) { + if (SSE42_PCLMULQDQ_CPU_SUPPORTED) rte_net_crc_sse42_init(); - return 1; - } #endif - return 0; } /* NEON/PMULL handling */ @@ -209,22 +229,63 @@ static const rte_net_crc_handler * neon_pmull_get_handlers(void) { #ifdef CC_ARM64_NEON_PMULL_SUPPORT - if (NEON_PMULL_CPU_SUPPORTED) + if (NEON_PMULL_CPU_SUPPORTED && + max_simd_bitwidth >= RTE_SIMD_128) return handlers_neon; #endif + NET_LOG(INFO, "Requirements not met, can't use NEON\n"); return NULL; } -static uint8_t +static void neon_pmull_init(void) { #ifdef CC_ARM64_NEON_PMULL_SUPPORT - if (NEON_PMULL_CPU_SUPPORTED) { + if (NEON_PMULL_CPU_SUPPORTED) rte_net_crc_neon_init(); - return 1; - } #endif - return 0; +} + +/* Default handling */ + +static uint32_t +rte_crc16_ccitt_default_handler(const uint8_t *data, uint32_t data_len) +{ + handlers = NULL; + if (max_simd_bitwidth == 0) + max_simd_bitwidth = rte_get_max_simd_bitwidth(); + + handlers = avx512_vpclmulqdq_get_handlers(); + if (handlers != NULL) + return handlers[RTE_NET_CRC16_CCITT](data, data_len); + handlers = sse42_pclmulqdq_get_handlers(); + if (handlers != NULL) + return handlers[RTE_NET_CRC16_CCITT](data, data_len); + handlers = neon_pmull_get_handlers(); + if (handlers != NULL) + return handlers[RTE_NET_CRC16_CCITT](data, data_len); + handlers = handlers_scalar; + return handlers[RTE_NET_CRC16_CCITT](data, data_len); +} + +static uint32_t +rte_crc32_eth_default_handler(const uint8_t *data, uint32_t data_len) +{ + handlers = NULL; + if (max_simd_bitwidth == 0) + max_simd_bitwidth = rte_get_max_simd_bitwidth(); + + handlers = avx512_vpclmulqdq_get_handlers(); + if (handlers != NULL) + return handlers[RTE_NET_CRC32_ETH](data, data_len); + handlers = sse42_pclmulqdq_get_handlers(); + if (handlers != NULL) + return handlers[RTE_NET_CRC32_ETH](data, data_len); + handlers = neon_pmull_get_handlers(); + if (handlers != NULL) + return handlers[RTE_NET_CRC32_ETH](data, data_len); + handlers = handlers_scalar; + return handlers[RTE_NET_CRC32_ETH](data, data_len); } /* Public API */ @@ -233,6 +294,8 @@ void rte_net_crc_set_alg(enum rte_net_crc_alg alg) { handlers = NULL; + if (max_simd_bitwidth == 0) + max_simd_bitwidth = rte_get_max_simd_bitwidth(); switch (alg) { case RTE_NET_CRC_AVX512: @@ -270,19 +333,11 @@ rte_net_crc_calc(const void *data, return ret; } -/* Select highest available crc algorithm as default one */ +/* Call initialisation helpers for all crc algorithm handlers */ RTE_INIT(rte_net_crc_init) { - enum rte_net_crc_alg alg = RTE_NET_CRC_SCALAR; - rte_net_crc_scalar_init(); - - if (sse42_pclmulqdq_init()) - alg = RTE_NET_CRC_SSE42; - if (avx512_vpclmulqdq_init()) - alg = RTE_NET_CRC_AVX512; - if (neon_pmull_init()) - alg = RTE_NET_CRC_NEON; - - rte_net_crc_set_alg(alg); + sse42_pclmulqdq_init(); + avx512_vpclmulqdq_init(); + neon_pmull_init(); } -- 2.22.0
next prev parent reply other threads:[~2020-10-15 10:43 UTC|newest] Thread overview: 276+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-08-07 15:58 [dpdk-dev] [PATCH 20.11 00/12] add max SIMD bitwidth to EAL Ciara Power 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 01/12] eal: add max SIMD bitwidth Ciara Power 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 02/12] eal: add default SIMD bitwidth values Ciara Power 2020-08-07 16:31 ` David Christensen 2020-08-07 16:59 ` David Christensen 2020-08-12 11:28 ` Power, Ciara 2020-08-10 5:22 ` Ruifeng Wang 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 03/12] net/i40e: add checks for max SIMD bitwidth Ciara Power 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 04/12] net/axgbe: " Ciara Power 2020-08-07 17:49 ` Somalapuram, Amaranath 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 05/12] net/bnxt: " Ciara Power 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 06/12] net/enic: " Ciara Power 2020-08-10 4:50 ` Hyong Youb Kim (hyonkim) 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 07/12] net/fm10k: " Ciara Power 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 08/12] net/iavf: " Ciara Power 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 09/12] net/ice: " Ciara Power 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 10/12] net/ixgbe: " Ciara Power 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 11/12] net/mlx5: " Ciara Power 2020-08-10 17:26 ` Alexander Kozyrev 2020-08-07 15:58 ` [dpdk-dev] [PATCH 20.11 12/12] net/virtio: " Ciara Power 2020-08-07 16:19 ` [dpdk-dev] [PATCH 20.11 00/12] add max SIMD bitwidth to EAL Stephen Hemminger 2020-08-10 9:52 ` Power, Ciara 2020-08-11 5:36 ` Honnappa Nagarahalli 2020-08-12 11:39 ` Power, Ciara 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 00/17] " Ciara Power 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 01/17] eal: add max SIMD bitwidth Ciara Power 2020-09-04 5:30 ` Honnappa Nagarahalli 2020-09-04 8:45 ` Bruce Richardson 2020-09-09 19:30 ` Honnappa Nagarahalli 2020-09-17 16:31 ` Kinsella, Ray 2020-09-17 16:43 ` Bruce Richardson 2020-09-18 2:13 ` Honnappa Nagarahalli 2020-09-18 8:35 ` Bruce Richardson 2020-09-06 22:01 ` Ananyev, Konstantin 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 02/17] eal: add default SIMD bitwidth values Ciara Power 2020-09-04 5:30 ` Honnappa Nagarahalli 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 03/17] doc: add detail on using max SIMD bitwidth Ciara Power 2020-09-06 22:20 ` Ananyev, Konstantin 2020-09-07 8:44 ` Bruce Richardson 2020-09-07 12:01 ` Ananyev, Konstantin 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 04/17] net/i40e: add checks for " Ciara Power 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 05/17] net/axgbe: " Ciara Power 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 06/17] net/bnxt: " Ciara Power 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 07/17] net/enic: " Ciara Power 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 08/17] net/fm10k: " Ciara Power 2020-10-07 5:01 ` Wang, Xiao W 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 09/17] net/iavf: " Ciara Power 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 10/17] net/ice: " Ciara Power 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 11/17] net/ixgbe: " Ciara Power 2020-08-27 16:12 ` [dpdk-dev] [PATCH v2 12/17] net/mlx5: " Ciara Power 2020-08-27 16:13 ` [dpdk-dev] [PATCH v2 13/17] net/virtio: " Ciara Power 2020-08-31 2:39 ` Xia, Chenbo 2020-08-27 16:13 ` [dpdk-dev] [PATCH v2 14/17] distributor: " Ciara Power 2020-08-27 16:13 ` [dpdk-dev] [PATCH v2 15/17] member: " Ciara Power 2020-08-27 16:13 ` [dpdk-dev] [PATCH v2 16/17] efd: " Ciara Power 2020-08-27 16:13 ` [dpdk-dev] [PATCH v2 17/17] net: " Ciara Power 2020-09-02 11:02 ` Singh, Jasvinder 2020-09-30 13:03 ` [dpdk-dev] [PATCH v3 00/18] add max SIMD bitwidth to EAL Ciara Power 2020-09-30 13:03 ` [dpdk-dev] [PATCH v3 01/18] eal: add max SIMD bitwidth Ciara Power 2020-10-01 14:49 ` Coyle, David 2020-10-06 9:32 ` Olivier Matz 2020-10-07 10:47 ` Power, Ciara 2020-10-07 10:52 ` Bruce Richardson 2020-10-07 11:10 ` Power, Ciara 2020-10-07 11:18 ` Olivier Matz 2020-10-08 9:25 ` Power, Ciara 2020-10-08 10:04 ` Olivier Matz 2020-10-08 10:58 ` Power, Ciara 2020-10-08 11:48 ` Bruce Richardson 2020-10-08 13:03 ` Olivier Matz 2020-10-06 11:50 ` Maxime Coquelin 2020-10-07 10:58 ` Power, Ciara 2020-10-08 13:07 ` Ananyev, Konstantin 2020-10-08 13:14 ` Bruce Richardson 2020-10-08 14:07 ` Ananyev, Konstantin 2020-10-08 14:18 ` Bruce Richardson 2020-10-08 14:26 ` Power, Ciara 2020-10-08 13:19 ` Ananyev, Konstantin 2020-10-08 15:28 ` David Marchand 2020-09-30 13:03 ` [dpdk-dev] [PATCH v3 02/18] eal: add default SIMD bitwidth values Ciara Power 2020-10-05 19:35 ` David Christensen 2020-10-08 13:17 ` Ananyev, Konstantin 2020-10-08 16:45 ` David Marchand 2020-09-30 13:03 ` [dpdk-dev] [PATCH v3 03/18] doc: add detail on using max SIMD bitwidth Ciara Power 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 04/18] net/i40e: add checks for " Ciara Power 2020-10-08 15:21 ` Ananyev, Konstantin 2020-10-08 16:05 ` Power, Ciara 2020-10-08 16:14 ` Ananyev, Konstantin 2020-10-09 3:02 ` Guo, Jia 2020-10-09 14:02 ` Power, Ciara 2020-10-10 2:07 ` Guo, Jia 2020-10-12 9:37 ` Bruce Richardson 2020-10-13 2:15 ` Guo, Jia 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 05/18] net/axgbe: " Ciara Power 2020-09-30 13:29 ` Somalapuram, Amaranath 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 06/18] net/bnxt: " Ciara Power 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 07/18] net/enic: " Ciara Power 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 08/18] net/fm10k: " Ciara Power 2020-10-09 0:18 ` Zhang, Qi Z 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 09/18] net/iavf: " Ciara Power 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 10/18] net/ice: " Ciara Power 2020-10-09 0:04 ` Zhang, Qi Z 2020-10-09 1:05 ` Zhang, Qi Z 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 11/18] net/ixgbe: " Ciara Power 2020-10-08 15:05 ` Ananyev, Konstantin 2020-10-10 13:13 ` Wang, Haiyue 2020-10-11 22:31 ` Ananyev, Konstantin 2020-10-12 1:29 ` Wang, Haiyue 2020-10-12 9:09 ` Ananyev, Konstantin 2020-10-12 16:04 ` Wang, Haiyue 2020-10-12 16:24 ` Ananyev, Konstantin 2020-10-13 1:12 ` Wang, Haiyue 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 12/18] net/mlx5: " Ciara Power 2020-10-05 6:30 ` Slava Ovsiienko 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 13/18] net/virtio: " Ciara Power 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 14/18] distributor: " Ciara Power 2020-10-06 12:17 ` David Hunt 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 15/18] member: " Ciara Power 2020-10-07 0:51 ` Wang, Yipeng1 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 16/18] efd: " Ciara Power 2020-10-07 0:51 ` Wang, Yipeng1 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 17/18] net: " Ciara Power 2020-09-30 15:03 ` Coyle, David 2020-09-30 15:49 ` Singh, Jasvinder 2020-10-01 14:16 ` Coyle, David 2020-10-01 14:19 ` Power, Ciara 2020-10-06 10:00 ` Olivier Matz 2020-10-07 11:16 ` Power, Ciara 2020-10-08 14:55 ` Ananyev, Konstantin 2020-10-13 11:27 ` Power, Ciara 2020-10-06 9:58 ` Olivier Matz 2020-09-30 13:04 ` [dpdk-dev] [PATCH v3 18/18] lpm: choose vector path at runtime Ciara Power 2020-09-30 13:54 ` Medvedkin, Vladimir 2020-10-08 14:40 ` Ananyev, Konstantin 2020-10-09 14:31 ` Power, Ciara 2020-10-11 22:49 ` Ananyev, Konstantin 2020-10-08 15:19 ` David Marchand 2020-10-09 12:37 ` David Marchand 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 00/17] add max SIMD bitwidth to EAL Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 01/17] eal: add max SIMD bitwidth Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 02/17] doc: add detail on using " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 03/17] net/i40e: add checks for " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 04/17] net/axgbe: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 05/17] net/bnxt: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 06/17] net/enic: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 07/17] net/fm10k: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 08/17] net/iavf: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 09/17] net/ice: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 10/17] net/ixgbe: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 11/17] net/mlx5: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 12/17] net/virtio: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 13/17] distributor: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 14/17] member: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 15/17] efd: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 16/17] net: " Ciara Power 2020-10-13 10:38 ` [dpdk-dev] [PATCH v4 17/17] node: choose vector path at runtime Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 00/17] add max SIMD bitwidth to EAL Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 01/17] eal: add max SIMD bitwidth Ciara Power 2020-10-13 11:58 ` Ananyev, Konstantin 2020-10-14 8:50 ` Ruifeng Wang 2020-10-14 14:19 ` Honnappa Nagarahalli 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 02/17] doc: add detail on using " Ciara Power 2020-10-14 8:24 ` Ruifeng Wang 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 03/17] net/i40e: add checks for " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 04/17] net/axgbe: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 05/17] net/bnxt: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 06/17] net/enic: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 07/17] net/fm10k: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 08/17] net/iavf: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 09/17] net/ice: " Ciara Power 2020-10-13 12:11 ` Zhang, Qi Z 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 10/17] net/ixgbe: " Ciara Power 2020-10-13 11:20 ` Wang, Haiyue 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 11/17] net/mlx5: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 12/17] net/virtio: " Ciara Power 2020-10-14 2:02 ` Xia, Chenbo 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 13/17] distributor: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 14/17] member: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 15/17] efd: " Ciara Power 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 16/17] net: " Ciara Power 2020-10-13 11:32 ` Olivier Matz 2020-10-13 13:07 ` Ananyev, Konstantin 2020-10-13 13:25 ` Ananyev, Konstantin 2020-10-13 13:57 ` Ananyev, Konstantin 2020-10-13 11:04 ` [dpdk-dev] [PATCH v5 17/17] node: choose vector path at runtime Ciara Power 2020-10-13 13:42 ` Ananyev, Konstantin 2020-10-14 10:05 ` Jerin Jacob 2020-10-14 8:28 ` Ruifeng Wang 2020-10-15 10:37 ` [dpdk-dev] [PATCH v6 00/18] add max SIMD bitwidth to EAL Ciara Power 2020-10-15 10:37 ` [dpdk-dev] [PATCH v6 01/18] eal: add max SIMD bitwidth Ciara Power 2020-10-15 10:37 ` [dpdk-dev] [PATCH v6 02/18] doc: add detail on using " Ciara Power 2020-10-15 13:12 ` Kevin Laatz 2020-10-15 10:37 ` [dpdk-dev] [PATCH v6 03/18] net/i40e: add checks for " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 04/18] net/axgbe: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 05/18] net/bnxt: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 06/18] net/enic: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 07/18] net/fm10k: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 08/18] net/iavf: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 09/18] net/ice: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 10/18] net/ixgbe: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 11/18] net/mlx5: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 12/18] net/virtio: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 13/18] distributor: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 14/18] member: " Ciara Power 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 15/18] efd: " Ciara Power 2020-10-15 10:38 ` Ciara Power [this message] 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 17/18] node: choose vector path at runtime Ciara Power 2020-10-15 11:18 ` [dpdk-dev] [EXT] " Nithin Dabilpuram 2020-10-15 10:38 ` [dpdk-dev] [PATCH v6 18/18] acl: add checks for max SIMD bitwidth Ciara Power 2020-10-15 12:31 ` Ananyev, Konstantin 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 00/18] add max SIMD bitwidth to EAL Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 01/18] eal: add max SIMD bitwidth Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 02/18] doc: add detail on using " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 03/18] net/i40e: add checks for " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 04/18] net/axgbe: " Ciara Power 2020-10-15 15:27 ` Somalapuram, Amaranath 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 05/18] net/bnxt: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 06/18] net/enic: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 07/18] net/fm10k: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 08/18] net/iavf: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 09/18] net/ice: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 10/18] net/ixgbe: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 11/18] net/mlx5: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 12/18] net/virtio: " Ciara Power 2020-10-15 15:30 ` Maxime Coquelin 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 13/18] distributor: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 14/18] member: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 15/18] efd: " Ciara Power 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 16/18] net: " Ciara Power 2020-10-15 17:20 ` Singh, Jasvinder 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 17/18] node: choose vector path at runtime Ciara Power 2020-10-15 15:32 ` Power, Ciara 2020-10-15 15:22 ` [dpdk-dev] [PATCH v7 18/18] acl: add checks for max SIMD bitwidth Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 00/18] add max SIMD bitwidth to EAL Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 01/18] eal: add max SIMD bitwidth Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 02/18] doc: add detail on using " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 03/18] net/i40e: add checks for " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 04/18] net/axgbe: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 05/18] net/bnxt: " Ciara Power 2020-10-16 9:06 ` Somnath Kotur 2020-10-16 9:10 ` David Marchand 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 06/18] net/enic: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 07/18] net/fm10k: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 08/18] net/iavf: " Ciara Power 2020-10-16 10:16 ` Bruce Richardson 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 09/18] net/ice: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 10/18] net/ixgbe: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 11/18] net/mlx5: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 12/18] net/virtio: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 13/18] distributor: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 14/18] member: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 15/18] efd: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 16/18] net: " Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 17/18] node: choose vector path at runtime Ciara Power 2020-10-16 8:13 ` [dpdk-dev] [PATCH v8 18/18] acl: add checks for max SIMD bitwidth Ciara Power 2020-10-16 8:54 ` Ananyev, Konstantin 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 00/18] add max SIMD bitwidth to EAL Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 01/18] eal: add max SIMD bitwidth Ciara Power 2020-10-16 15:45 ` Kinsella, Ray 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 02/18] doc: add detail on using " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 03/18] net/i40e: add checks for " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 04/18] net/axgbe: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 05/18] net/bnxt: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 06/18] net/enic: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 07/18] net/fm10k: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 08/18] net/iavf: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 09/18] net/ice: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 10/18] net/ixgbe: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 11/18] net/mlx5: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 12/18] net/virtio: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 13/18] distributor: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 14/18] member: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 15/18] efd: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 16/18] net: " Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 17/18] node: choose vector path at runtime Ciara Power 2020-10-16 14:27 ` [dpdk-dev] [PATCH v9 18/18] acl: add checks for max SIMD bitwidth Ciara Power
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