From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0BC38A04DD; Wed, 28 Oct 2020 11:00:07 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3B86FC954; Wed, 28 Oct 2020 11:00:05 +0100 (CET) Received: from hqnvemgate24.nvidia.com (hqnvemgate24.nvidia.com [216.228.121.143]) by dpdk.org (Postfix) with ESMTP id F07C4C92C for ; Wed, 28 Oct 2020 11:00:01 +0100 (CET) Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Wed, 28 Oct 2020 03:00:07 -0700 Received: from nvidia.com (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 28 Oct 2020 09:59:51 +0000 From: Gregory Etelson To: CC: , , , Viacheslav Ovsiienko , Shahaf Shuler , Adrien Mazarguil , "Xueming Li" Date: Wed, 28 Oct 2020 11:59:34 +0200 Message-ID: <20201028095935.27855-1-getelson@nvidia.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1603879207; bh=S5/HHly3ORR0/HwxVeAGkAQhZIIGTSoyMVGMxiOQ9O0=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:MIME-Version: Content-Transfer-Encoding:Content-Type:X-Originating-IP: X-ClientProxiedBy; b=JUoMWOM0LbOTCgW8sNwzmqAF6PJ8F1ZDmdkYSEY2dk/OZeF8LEIMl7PLIAIPUVFxD gX8wz07k//NMRfHt0u2XApKqGYtDsmDv46ktJ9jeJP6Z7+3UPBnNGl6XlLOawikC6y /YG98HA0xAVajWul88moETznTwSm5ac9QHOq2tckN1HluoXtu83NgWRzE/8WstfbLo o+le/larJD3CBrHBy3VHjqDMpfeVLqTR/BypDsOaN6qq8KJncAhrQQGuua7gZ8PG/i WqZ2eTez9+0FHlLI13rh949prHzuqC+W2Moe/qSS2B9hO4y7UyTEdKIlA1dyZbJ67A QQ/XCjLGCgJAw== Subject: [dpdk-dev] [PATCH 1/2] drivers/net/mlx5: fix representor interrupts handler X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Representor is a port in DPDK that is connected to a VF in such a way that assuming there are no offload flows, each packet that is sent from the VF will be received by the corresponding representor. While each packet that is sent to a representor will be received by the VF. This is very useful in case of SRIOV mode, where the first packet that is sent by the VF will be received by the DPDK application which will decide if this flow should be offloaded to the E-Switch. Representor shares interrupts handler with host PF over the PCI address. Therefore after PF completes it's interrupts handler initialization no additional actions required for representor. Fixes: 26c08b979d26 ("net/mlx5: add port representor awareness") Signed-off-by: Gregory Etelson Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_rxq.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 8d05315e61..df8542f7db 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -902,6 +902,11 @@ mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev) unsigned int count =3D 0; struct rte_intr_handle *intr_handle =3D dev->intr_handle; =20 + /** + * representor shares dev->intr_handle with PF + */ + if (priv->representor) + return 0; if (!dev->data->dev_conf.intr_conf.rxq) return 0; mlx5_rx_intr_vec_disable(dev); @@ -982,6 +987,11 @@ mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev) unsigned int rxqs_n =3D priv->rxqs_n; unsigned int n =3D RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID); =20 + /** + * representor shares dev->intr_handle with PF + */ + if (priv->representor) + return; if (!dev->data->dev_conf.intr_conf.rxq) return; if (!intr_handle->intr_vec) --=20 2.28.0