From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 76C20A04B1; Thu, 5 Nov 2020 11:41:17 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CAD68BE45; Thu, 5 Nov 2020 11:41:15 +0100 (CET) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 77D3DBE3F for ; Thu, 5 Nov 2020 11:41:13 +0100 (CET) IronPort-SDR: OlBw1YilrnfHHxfbc+IgYPYt5WKYqX0v7+PIrucs7yQYSnM4dRFopneUd8tA2k7ADtO/S8Ws5G XeQtFcW18SrQ== X-IronPort-AV: E=McAfee;i="6000,8403,9795"; a="165852526" X-IronPort-AV: E=Sophos;i="5.77,453,1596524400"; d="scan'208";a="165852526" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Nov 2020 02:41:11 -0800 IronPort-SDR: ENIawvy6mKVvYbUxTRnBaXXQqwhLzvNB5OqkfiGeWEP7bjciN3pr9G5J6VD4wKFBJGoawBCc/r jLiZkCfUxjAw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,453,1596524400"; d="scan'208";a="471596148" Received: from silpixa00399126.ir.intel.com ([10.237.222.4]) by orsmga004.jf.intel.com with ESMTP; 05 Nov 2020 02:41:10 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: Bruce Richardson Date: Thu, 5 Nov 2020 10:41:04 +0000 Message-Id: <20201105104104.219599-1-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201103144858.1317742-1-bruce.richardson@intel.com> References: <20201103144858.1317742-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2] raw/ioat: fix queue index calculation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Coverity flags a possible problem where the 8-bit wq_idx value may have errors when shifted and sign-extended to pointer size. Since this can only occur if the shift index is larger than any expected value from hardware, it's unlikely to cause any real problems, but we can eliminate any possible errors, and the coverity issue, by explicitly typecasting the uint8_t value to uintptr_t before any shift operations occur. Coverity issue: 363695 Fixes: a33969462135 ("raw/ioat: fix work-queue config size") Signed-off-by: Bruce Richardson --- V2: Change uint64_t cast to uintptr_t to prevent 32-bit build issues --- drivers/raw/ioat/idxd_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index 99ecfbbb4..01623f33f 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -47,7 +47,8 @@ idxd_pci_dev_command(struct idxd_rawdev *idxd, enum rte_idxd_cmds command) static uint32_t * idxd_get_wq_cfg(struct idxd_pci_common *pci, uint8_t wq_idx) { - return RTE_PTR_ADD(pci->wq_regs_base, wq_idx << (5 + pci->wq_cfg_sz)); + return RTE_PTR_ADD(pci->wq_regs_base, + (uintptr_t)wq_idx << (5 + pci->wq_cfg_sz)); } static int -- 2.25.1