From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 53AC4A04DD; Thu, 19 Nov 2020 09:54:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E9A0DF90; Thu, 19 Nov 2020 09:54:54 +0100 (CET) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id C5364DED; Thu, 19 Nov 2020 09:54:51 +0100 (CET) IronPort-SDR: NGOm5JsjZfatJ0NJCljnvBuVMxtylneH+rn45IX4STWb7v9d8NVawzjPxVSYNmcAtkAtkjaAC+ 8uzc7FYvdSNw== X-IronPort-AV: E=McAfee;i="6000,8403,9809"; a="170474656" X-IronPort-AV: E=Sophos;i="5.77,490,1596524400"; d="scan'208";a="170474656" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Nov 2020 00:54:49 -0800 IronPort-SDR: XNoVCNYLjuSLtoF/at2CyDMJawDIDYaGiVCSuLWedvylAA6jwnClQpBYQgi96WiK1T4jBIj6FR S5NNPnehnMoA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,490,1596524400"; d="scan'208";a="544929609" Received: from dpdk-beileix-3.sh.intel.com ([10.67.110.213]) by orsmga005.jf.intel.com with ESMTP; 19 Nov 2020 00:54:48 -0800 From: beilei.xing@intel.com To: dev@dpdk.org Cc: jia.guo@intel.com, Beilei Xing , stable@dpdk.org Date: Fri, 20 Nov 2020 16:49:47 +0800 Message-Id: <20201120084947.40064-1-beilei.xing@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201119061616.37482-1-beilei.xing@intel.com> References: <20201119061616.37482-1-beilei.xing@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2] net/i40e: fix global register recovery X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Beilei Xing PMD configures the global register I40E_GLINT_CTL during device initialization to work around the Rx write back issue. But when a device is bound from DPDK to kernel, the global register is not recovered to the original state, it will cause kernel driver performance drop issue. This patch fixes this issue. Fixes: be6c228d4da3 ("i40e: support Rx interrupt") Fixes: 4ab831449a1c ("net/i40e: fix interrupt conflict with multi-driver") Cc: stable@dpdk.org Signed-off-by: Beilei Xing --- v2 change: - refine commit log drivers/net/i40e/i40e_ethdev.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index f54769c29d..2cb18ecc03 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -763,6 +763,21 @@ static inline void i40e_config_automask(struct i40e_pf *pf) I40E_WRITE_REG(hw, I40E_GLINT_CTL, val); } +static inline void i40e_clear_automask(struct i40e_pf *pf) +{ + struct i40e_hw *hw = I40E_PF_TO_HW(pf); + uint32_t val; + + val = I40E_READ_REG(hw, I40E_GLINT_CTL); + val &= ~(I40E_GLINT_CTL_DIS_AUTOMASK_PF0_MASK | + I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK); + + if (!pf->support_multi_driver) + val &= ~I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK; + + I40E_WRITE_REG(hw, I40E_GLINT_CTL, val); +} + #define I40E_FLOW_CONTROL_ETHERTYPE 0x8808 /* @@ -2741,6 +2756,8 @@ i40e_dev_close(struct rte_eth_dev *dev) /* Remove all Traffic Manager configuration */ i40e_tm_conf_uninit(dev); + i40e_clear_automask(pf); + hw->adapter_closed = 1; return ret; } -- 2.26.2