From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 002B5A09F0; Thu, 17 Dec 2020 09:53:25 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9F48DCA34; Thu, 17 Dec 2020 09:52:31 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 7F065CA0A for ; Thu, 17 Dec 2020 09:52:26 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@nvidia.com) with SMTP; 17 Dec 2020 10:52:22 +0200 Received: from MTL-ORIKA.mtl.com ([172.27.14.211]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BH8qHp5015085; Thu, 17 Dec 2020 10:52:22 +0200 From: Ori Kam To: thomas@monjalon.net Cc: orika@mellanox.com, dev@dpdk.org, stable@dpdk.org Date: Thu, 17 Dec 2020 10:51:57 +0200 Message-Id: <20201217085158.28367-4-orika@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201217085158.28367-1-orika@nvidia.com> References: <20201217085158.28367-1-orika@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH 3/4] regex/mlx5: fix support for group id X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In order to know which groups in the RegEx engine should be used there is a need to check the req_flags. This commit adds the missing check. Cc: stable@dpdk.org Fixes: 4d4e245ad637 ("regex/mlx5: support enqueue") Signed-off-by: Ori Kam --- drivers/regex/mlx5/mlx5_regex_fastpath.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/regex/mlx5/mlx5_regex_fastpath.c b/drivers/regex/mlx5/mlx5_regex_fastpath.c index 5857617282..8d134ac98e 100644 --- a/drivers/regex/mlx5/mlx5_regex_fastpath.c +++ b/drivers/regex/mlx5/mlx5_regex_fastpath.c @@ -105,7 +105,21 @@ prep_one(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp, { size_t wqe_offset = (sq->pi & (sq_size_get(sq) - 1)) * MLX5_SEND_WQE_BB; uint32_t lkey; - + uint16_t group0 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID0_VALID_F ? + op->group_id0 : 0; + uint16_t group1 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID1_VALID_F ? + op->group_id1 : 0; + uint16_t group2 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID2_VALID_F ? + op->group_id2 : 0; + uint16_t group3 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID3_VALID_F ? + op->group_id3 : 0; + + /* For backward compatibility. */ + if (!(op->req_flags & (RTE_REGEX_OPS_REQ_GROUP_ID0_VALID_F | + RTE_REGEX_OPS_REQ_GROUP_ID1_VALID_F | + RTE_REGEX_OPS_REQ_GROUP_ID2_VALID_F | + RTE_REGEX_OPS_REQ_GROUP_ID3_VALID_F))) + group0 = op->group_id0; lkey = mlx5_mr_addr2mr_bh(priv->pd, 0, &priv->mr_scache, &qp->mr_ctrl, rte_pktmbuf_mtod(op->mbuf, uintptr_t), @@ -116,9 +130,8 @@ prep_one(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp, set_wqe_ctrl_seg((struct mlx5_wqe_ctrl_seg *)wqe, sq->pi, MLX5_OPCODE_MMO, MLX5_OPC_MOD_MMO_REGEX, sq->obj->id, 0, ds, 0, 0); - set_regex_ctrl_seg(wqe + 12, 0, op->group_id0, op->group_id1, - op->group_id2, - op->group_id3, 0); + set_regex_ctrl_seg(wqe + 12, 0, group0, group1, group2, group3, + 0); struct mlx5_wqe_data_seg *input_seg = (struct mlx5_wqe_data_seg *)(wqe + MLX5_REGEX_WQE_GATHER_OFFSET); -- 2.25.1