From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 44139A0524; Thu, 7 Jan 2021 17:57:59 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C3B3A140FF0; Thu, 7 Jan 2021 17:57:38 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 2DE3D140FCC for ; Thu, 7 Jan 2021 17:57:34 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from orika@nvidia.com) with SMTP; 7 Jan 2021 18:57:33 +0200 Received: from MTL-ORIKA.mtl.com ([172.27.15.148]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 107GvNvk011624; Thu, 7 Jan 2021 18:57:33 +0200 From: Ori Kam To: thomas@monjalon.net Cc: orika@mellanox.com, dev@dpdk.org Date: Thu, 7 Jan 2021 18:57:10 +0200 Message-Id: <20210107165711.1782-5-orika@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210107165711.1782-1-orika@nvidia.com> References: <20201217085158.28367-1-orika@nvidia.com> <20210107165711.1782-1-orika@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2 4/5] regex/mlx5: add support for priority match X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The high priority match request flags means that the RegEx engine should stop on the first match. This commit add this flag check to the RegEx engine. Signed-off-by: Ori Kam --- drivers/regex/mlx5/mlx5_regex_fastpath.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/regex/mlx5/mlx5_regex_fastpath.c b/drivers/regex/mlx5/mlx5_regex_fastpath.c index 8d134ac98e..ee72f89c99 100644 --- a/drivers/regex/mlx5/mlx5_regex_fastpath.c +++ b/drivers/regex/mlx5/mlx5_regex_fastpath.c @@ -113,6 +113,8 @@ prep_one(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp, op->group_id2 : 0; uint16_t group3 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID3_VALID_F ? op->group_id3 : 0; + uint8_t control = op->req_flags & + RTE_REGEX_OPS_REQ_MATCH_HIGH_PRIORITY_F ? 1 : 0; /* For backward compatibility. */ if (!(op->req_flags & (RTE_REGEX_OPS_REQ_GROUP_ID0_VALID_F | @@ -131,7 +133,7 @@ prep_one(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp, MLX5_OPCODE_MMO, MLX5_OPC_MOD_MMO_REGEX, sq->obj->id, 0, ds, 0, 0); set_regex_ctrl_seg(wqe + 12, 0, group0, group1, group2, group3, - 0); + control); struct mlx5_wqe_data_seg *input_seg = (struct mlx5_wqe_data_seg *)(wqe + MLX5_REGEX_WQE_GATHER_OFFSET); -- 2.25.1