From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9AB8EA0548; Sun, 28 Feb 2021 13:55:16 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 47DC522A2AD; Sun, 28 Feb 2021 13:54:17 +0100 (CET) Received: from wout3-smtp.messagingengine.com (wout3-smtp.messagingengine.com [64.147.123.19]) by mails.dpdk.org (Postfix) with ESMTP id A369022A2A2; Sun, 28 Feb 2021 13:54:15 +0100 (CET) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.west.internal (Postfix) with ESMTP id 7B87D5D4; Sun, 28 Feb 2021 07:54:14 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Sun, 28 Feb 2021 07:54:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=jkmR8jre9iG6r 4EPvIelfidmLMPcmV65reNxetXbfb0=; b=jF50Rt6MLilXok6ar2EwstAHWqBbr 1N+AY2dElKTD+BwJPZuzhEN6n0HJHBSNnfTzKkOXTxooEnoG0vb0NwjkPpe0uequ lOVSiTza7NXUdkXmSufEWvoE4xX1fKDCSVWyRfV23ktYD0d61fz2Y+cMlU/0BhxR 5UZTBOFiUc9XEk0THH5dCYc6FcdtZOBrGbjufPG4ApkFwlgdNmqHwhQ/VyHhay+t mVF6KP8CAj3fOaUgg8hzCAwRlacAiSa1jzfXEeL2AjV1i6rkm6cRlZDNgkXUzy9M kgyQd9wj1IdlzEfTPzbHtWgXgshfSFo+9GymHt60cbc7yD9IiWIB6j3iQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=jkmR8jre9iG6r4EPvIelfidmLMPcmV65reNxetXbfb0=; b=Z8uMlNO1 wXw7OQWJXbgVDKXLUrfPyMCb5IoF/CjdC1LUMoqVUum7XNTDtFuaAwU5z3w3wqCh UIL391O9Ll/TWbbrCpbx2tHUIrxpe/6WpFKnO2AO55YGugEaVsTPq6etLtOyL8kJ PBCSCqfl3qmzFhc0lu7pXsqAOE1EyUS5ceMCLT1wk0eE4XVKIWTtGv7e9eBFIfTU SZEX+9LIoBYxGrEvmikb7ZsWLkn3eijCQ33wxI9yrDNBZCXSGmvHY0iUjT/yQXiL +k3mS1589eBCn0BIbo4POybmijCl/8Z2u1VWLcpc8t2KmZ/iicgO4UfUNzYYI7Uo f4jnVYaGWgNA+A== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrleeigdegjecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepvfhhohhmrghs ucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenucggtf frrghtthgvrhhnpedvhefgiedvjeegtdevheefhfetleefgfeivefgffevfeejgedtgfeu tdehtdegveenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrhfuih iivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgrlhho nhdrnhgvth X-ME-Proxy: Received: from xps.monjalon.net (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id AC3CC1080057; Sun, 28 Feb 2021 07:54:12 -0500 (EST) From: Thomas Monjalon To: dev@dpdk.org Cc: ncopa@alpinelinux.org, stable@dpdk.org, Ferruh Yigit , Yuanhan Liu , David Marchand Date: Sun, 28 Feb 2021 13:53:43 +0100 Message-Id: <20210228125353.2436562-9-thomas@monjalon.net> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210228125353.2436562-1-thomas@monjalon.net> References: <20190313170657.16688-1-ncopa@alpinelinux.org> <20210228125353.2436562-1-thomas@monjalon.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v6 08/17] bus/pci: support I/O port operations with musl X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Natanael Copa Add a fallback for non-GNU libc systems like musl libc for the non-standard functions outl_p, outw_p and outb_p. This solves the following buildtime errors when building with musl libc: pci_uio.c:(.text+0xaa1): undefined reference to `outw_p' pci_uio.c:(.text+0xac5): undefined reference to `outl_p' pci_uio.c:(.text+0xadf): undefined reference to `outb_p' The non-x86 case are handled with macros to factor out various ifdefs. Bugzilla ID: 35 Fixes: 756ce64b1ecd ("eal: introduce PCI ioport API") Cc: stable@dpdk.org Signed-off-by: Natanael Copa Signed-off-by: Thomas Monjalon --- drivers/bus/pci/linux/pci_uio.c | 91 ++++++++++++++++++++++----------- 1 file changed, 61 insertions(+), 30 deletions(-) diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c index f3305a2f28..1294f505be 100644 --- a/drivers/bus/pci/linux/pci_uio.c +++ b/drivers/bus/pci/linux/pci_uio.c @@ -489,6 +489,16 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar, } #endif +#ifdef RTE_ARCH_X86 +#define pci_uio_inl(reg) inl(reg) +#define pci_uio_inw(reg) inw(reg) +#define pci_uio_inb(reg) inb(reg) +#else /* !RTE_ARCH_X86 */ +#define pci_uio_inl(reg) (*(volatile uint32_t *)(reg)) +#define pci_uio_inw(reg) (*(volatile uint16_t *)(reg)) +#define pci_uio_inb(reg) (*(volatile uint8_t *)(reg)) +#endif + void pci_uio_ioport_read(struct rte_pci_ioport *p, void *data, size_t len, off_t offset) @@ -500,29 +510,62 @@ pci_uio_ioport_read(struct rte_pci_ioport *p, for (d = data; len > 0; d += size, reg += size, len -= size) { if (len >= 4) { size = 4; -#if defined(RTE_ARCH_X86) - *(uint32_t *)d = inl(reg); -#else - *(uint32_t *)d = *(volatile uint32_t *)reg; -#endif + *(uint32_t *)d = pci_uio_inl(reg); } else if (len >= 2) { size = 2; -#if defined(RTE_ARCH_X86) - *(uint16_t *)d = inw(reg); -#else - *(uint16_t *)d = *(volatile uint16_t *)reg; -#endif + *(uint16_t *)d = pci_uio_inw(reg); } else { size = 1; -#if defined(RTE_ARCH_X86) - *d = inb(reg); -#else - *d = *(volatile uint8_t *)reg; -#endif + *d = pci_uio_inb(reg); } } } +#ifdef RTE_ARCH_X86 +static inline void +pci_uio_outl_p(unsigned int value, unsigned short int port) +{ +#ifdef __GLIBC__ + outl_p(value, port); +#else + __asm__ __volatile__ ("outl %0,%w1\noutb %%al,$0x80" : : "a" (value), + "Nd" (port)); +#endif +} +#else /* !RTE_ARCH_X86 */ +#define pci_uio_outl_p(value, reg) (*(volatile uint32_t *)(reg) = (value)) +#endif + +#ifdef RTE_ARCH_X86 +static inline void +pci_uio_outw_p(unsigned short int value, unsigned short int port) +{ +#ifdef __GLIBC__ + outw_p(value, port); +#else + __asm__ __volatile__ ("outw %w0,%w1\noutb %%al,$0x80" : : "a" (value), + "Nd" (port)); +#endif +} +#else /* !RTE_ARCH_X86 */ +#define pci_uio_outw_p(value, reg) (*(volatile uint16_t *)(reg) = (value)) +#endif + +#ifdef RTE_ARCH_X86 +static inline void +pci_uio_outb_p(unsigned char value, unsigned short int port) +{ +#ifdef __GLIBC__ + outb_p(value, port); +#else + __asm__ __volatile__ ("outb %b0,%w1\noutb %%al,$0x80" : : "a" (value), + "Nd" (port)); +#endif +} +#else /* !RTE_ARCH_X86 */ +#define pci_uio_outb_p(value, reg) (*(volatile uint8_t *)(reg) = (value)) +#endif + void pci_uio_ioport_write(struct rte_pci_ioport *p, const void *data, size_t len, off_t offset) @@ -534,25 +577,13 @@ pci_uio_ioport_write(struct rte_pci_ioport *p, for (s = data; len > 0; s += size, reg += size, len -= size) { if (len >= 4) { size = 4; -#if defined(RTE_ARCH_X86) - outl_p(*(const uint32_t *)s, reg); -#else - *(volatile uint32_t *)reg = *(const uint32_t *)s; -#endif + pci_uio_outl_p(*(const uint32_t *)s, reg); } else if (len >= 2) { size = 2; -#if defined(RTE_ARCH_X86) - outw_p(*(const uint16_t *)s, reg); -#else - *(volatile uint16_t *)reg = *(const uint16_t *)s; -#endif + pci_uio_outw_p(*(const uint16_t *)s, reg); } else { size = 1; -#if defined(RTE_ARCH_X86) - outb_p(*s, reg); -#else - *(volatile uint8_t *)reg = *s; -#endif + pci_uio_outb_p(*s, reg); } } } -- 2.30.1