From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 827E1A0547; Fri, 5 Mar 2021 14:46:50 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4040D22A458; Fri, 5 Mar 2021 14:41:33 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id F11D622A433 for ; Fri, 5 Mar 2021 14:41:31 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 125DevhQ001889 for ; Fri, 5 Mar 2021 05:41:31 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=Mkse9tPyYZ+5bFpkPm5uuz5hu7r3hTy8lLFiYnTqse8=; b=LAihFFVGQD8hjIOjHpMstR84PiGw1Lr0II3uLRj5BhX/+ZKA9X5BUq6sxPKCn2IS4Myf tMPYV55ybryodCiKg1917TuNSZwgv/O4Kly9jzbRFbuCw6kXOvAWQ/nuEfiYFY0VAktk xJY4lNeT7Hw5T2TgZut5uNSTppFGt/ZJaT8CTHYpkGEGNVCUYdqR35XH+METCb/pTnU6 VjEuAku9HRLjNrOfZSpbttEEq8bd8V1Ts3h+Cp9zc+FQsLEVLukh65HRVa+Gh6jT7t1h icBL+9Xdo1fKe3LbjC0pBj15wPdDJfsTAqBBSBFOzmEwQNEa5yPowLBrhIJSv448Pv1P jQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 372s2umrr9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 05 Mar 2021 05:41:31 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 5 Mar 2021 05:41:29 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 5 Mar 2021 05:41:29 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 1F6753F7040; Fri, 5 Mar 2021 05:41:26 -0800 (PST) From: Nithin Dabilpuram To: CC: , , , , , , Date: Fri, 5 Mar 2021 19:09:06 +0530 Message-ID: <20210305133918.8005-41-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210305133918.8005-1-ndabilpuram@marvell.com> References: <20210305133918.8005-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-05_08:2021-03-03, 2021-03-05 signatures=0 Subject: [dpdk-dev] [PATCH 40/52] common/cnxk: add npc support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K Adding initial npc support. Signed-off-by: Kiran Kumar K --- drivers/common/cnxk/roc_api.h | 3 + drivers/common/cnxk/roc_npc.h | 129 +++++++++++++ drivers/common/cnxk/roc_npc_priv.h | 381 +++++++++++++++++++++++++++++++++++++ drivers/common/cnxk/roc_platform.c | 1 + drivers/common/cnxk/roc_platform.h | 2 + drivers/common/cnxk/roc_priv.h | 3 + drivers/common/cnxk/roc_utils.c | 24 +++ drivers/common/cnxk/version.map | 1 + 8 files changed, 544 insertions(+) create mode 100644 drivers/common/cnxk/roc_npc.h create mode 100644 drivers/common/cnxk/roc_npc_priv.h diff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h index b805425..44bed9a 100644 --- a/drivers/common/cnxk/roc_api.h +++ b/drivers/common/cnxk/roc_api.h @@ -82,6 +82,9 @@ /* NPA */ #include "roc_npa.h" +/* NPC */ +#include "roc_npc.h" + /* NIX */ #include "roc_nix.h" diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h new file mode 100644 index 0000000..f273976 --- /dev/null +++ b/drivers/common/cnxk/roc_npc.h @@ -0,0 +1,129 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2020 Marvell. + */ + +#ifndef _ROC_NPC_H_ +#define _ROC_NPC_H_ + +#include + +enum roc_npc_item_type { + ROC_NPC_ITEM_TYPE_VOID, + ROC_NPC_ITEM_TYPE_ANY, + ROC_NPC_ITEM_TYPE_ETH, + ROC_NPC_ITEM_TYPE_VLAN, + ROC_NPC_ITEM_TYPE_E_TAG, + ROC_NPC_ITEM_TYPE_IPV4, + ROC_NPC_ITEM_TYPE_IPV6, + ROC_NPC_ITEM_TYPE_ARP_ETH_IPV4, + ROC_NPC_ITEM_TYPE_MPLS, + ROC_NPC_ITEM_TYPE_ICMP, + ROC_NPC_ITEM_TYPE_IGMP, + ROC_NPC_ITEM_TYPE_UDP, + ROC_NPC_ITEM_TYPE_TCP, + ROC_NPC_ITEM_TYPE_SCTP, + ROC_NPC_ITEM_TYPE_ESP, + ROC_NPC_ITEM_TYPE_GRE, + ROC_NPC_ITEM_TYPE_NVGRE, + ROC_NPC_ITEM_TYPE_VXLAN, + ROC_NPC_ITEM_TYPE_GTPC, + ROC_NPC_ITEM_TYPE_GTPU, + ROC_NPC_ITEM_TYPE_GENEVE, + ROC_NPC_ITEM_TYPE_VXLAN_GPE, + ROC_NPC_ITEM_TYPE_IPV6_EXT, + ROC_NPC_ITEM_TYPE_GRE_KEY, + ROC_NPC_ITEM_TYPE_HIGIG2, + ROC_NPC_ITEM_TYPE_CPT_HDR, + ROC_NPC_ITEM_TYPE_L3_CUSTOM, + ROC_NPC_ITEM_TYPE_QINQ, + ROC_NPC_ITEM_TYPE_END, +}; + +struct roc_npc_item_info { + enum roc_npc_item_type type; /* Item type */ + uint32_t size; /* item size */ + const void *spec; /**< Pointer to item specification structure. */ + const void *mask; /**< Bit-mask applied to spec and last. */ + const void *last; /* For range */ +}; + +#define ROC_NPC_MAX_ACTION_COUNT 12 + +enum roc_npc_action_type { + ROC_NPC_ACTION_TYPE_END = (1 << 0), + ROC_NPC_ACTION_TYPE_VOID = (1 << 1), + ROC_NPC_ACTION_TYPE_MARK = (1 << 2), + ROC_NPC_ACTION_TYPE_FLAG = (1 << 3), + ROC_NPC_ACTION_TYPE_DROP = (1 << 4), + ROC_NPC_ACTION_TYPE_QUEUE = (1 << 5), + ROC_NPC_ACTION_TYPE_RSS = (1 << 6), + ROC_NPC_ACTION_TYPE_DUP = (1 << 7), + ROC_NPC_ACTION_TYPE_SEC = (1 << 8), + ROC_NPC_ACTION_TYPE_COUNT = (1 << 9), + ROC_NPC_ACTION_TYPE_PF = (1 << 10), + ROC_NPC_ACTION_TYPE_VF = (1 << 11), +}; + +struct roc_npc_action { + enum roc_npc_action_type type; /**< Action type. */ + const void *conf; /**< Pointer to action configuration object. */ +}; + +struct roc_npc_action_mark { + uint32_t id; /**< Integer value to return with packets. */ +}; + +struct roc_npc_action_vf { + uint32_t original : 1; /**< Use original VF ID if possible. */ + uint32_t reserved : 31; /**< Reserved, must be zero. */ + uint32_t id; /**< VF ID. */ +}; + +struct roc_npc_action_queue { + uint16_t index; /**< Queue index to use. */ +}; + +struct roc_npc_attr { + uint32_t priority; /**< Rule priority level within group. */ + uint32_t ingress : 1; /**< Rule applies to ingress traffic. */ + uint32_t egress : 1; /**< Rule applies to egress traffic. */ + uint32_t reserved : 30; /**< Reserved, must be zero. */ +}; + +struct roc_npc_flow { + uint8_t nix_intf; + uint8_t enable; + uint32_t mcam_id; + int32_t ctr_id; + uint32_t priority; +#define ROC_NPC_MAX_MCAM_WIDTH_DWORDS 7 + /* Contiguous match string */ + uint64_t mcam_data[ROC_NPC_MAX_MCAM_WIDTH_DWORDS]; + uint64_t mcam_mask[ROC_NPC_MAX_MCAM_WIDTH_DWORDS]; + uint64_t npc_action; + uint64_t vtag_action; + + TAILQ_ENTRY(roc_npc_flow) next; +}; + +enum roc_npc_intf { + ROC_NPC_INTF_RX = 0, + ROC_NPC_INTF_TX = 1, + ROC_NPC_INTF_MAX = 2, +}; + +struct roc_npc { + struct roc_nix *roc_nix; + uint8_t switch_header_type; + uint16_t flow_prealloc_size; + uint16_t flow_max_priority; + uint16_t channel; + uint16_t pf_func; + uint64_t kex_capability; + uint64_t rx_parse_nibble; + +#define ROC_NPC_MEM_SZ (5 * 1024) + uint8_t reserved[ROC_NPC_MEM_SZ]; +} __plt_cache_aligned; + +#endif /* _ROC_NPC_H_ */ diff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h new file mode 100644 index 0000000..0c3947a --- /dev/null +++ b/drivers/common/cnxk/roc_npc_priv.h @@ -0,0 +1,381 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2020 Marvell. + */ + +#ifndef _ROC_NPC_PRIV_H_ +#define _ROC_NPC_PRIV_H_ + +#define NPC_IH_LENGTH 8 +#define NPC_TPID_LENGTH 2 +#define NPC_HIGIG2_LENGTH 16 +#define NPC_COUNTER_NONE (-1) + +#define NPC_RSS_GRPS 8 + +#define NPC_ACTION_FLAG_DEFAULT 0xffff + +#define NPC_PFVF_FUNC_MASK 0x3FF + +/* 32 bytes from LDATA_CFG & 32 bytes from FLAGS_CFG */ +#define NPC_MAX_EXTRACT_DATA_LEN (64) +#define NPC_MAX_EXTRACT_HW_LEN (4 * NPC_MAX_EXTRACT_DATA_LEN) +#define NPC_LDATA_LFLAG_LEN (16) +#define NPC_MAX_KEY_NIBBLES (31) + +/* Nibble offsets */ +#define NPC_LAYER_KEYX_SZ (3) +#define NPC_PARSE_KEX_S_LA_OFFSET (7) +#define NPC_PARSE_KEX_S_LID_OFFSET(lid) \ + ((((lid) - (NPC_LID_LA)) * NPC_LAYER_KEYX_SZ) + \ + NPC_PARSE_KEX_S_LA_OFFSET) + +/* This mark value indicates flag action */ +#define NPC_FLOW_FLAG_VAL (0xffff) + +#define NPC_RX_ACT_MATCH_OFFSET (40) +#define NPC_RX_ACT_MATCH_MASK (0xFFFF) + +#define NPC_RSS_ACT_GRP_OFFSET (20) +#define NPC_RSS_ACT_ALG_OFFSET (56) +#define NPC_RSS_ACT_GRP_MASK (0xFFFFF) +#define NPC_RSS_ACT_ALG_MASK (0x1F) + +#define NPC_MCAM_KEX_FIELD_MAX 23 +#define NPC_MCAM_MAX_PROTO_FIELDS (NPC_MCAM_KEX_FIELD_MAX + 1) +#define NPC_MCAM_KEY_X4_WORDS 7 /* Number of 64-bit words */ + +#define NPC_RVUPF_MAX_9XXX 0x10 /* HRM: RVU_PRIV_CONST */ +#define NPC_RVUPF_MAX_10XX 0x20 /* HRM: RVU_PRIV_CONST */ +#define NPC_NIXLF_MAX 0x80 /* HRM: NIX_AF_CONST2 */ +#define NPC_MCAME_PER_PF 2 /* DRV: RSVD_MCAM_ENTRIES_PER_PF */ +#define NPC_MCAME_PER_LF 1 /* DRV: RSVD_MCAM_ENTRIES_PER_NIXLF */ +#define NPC_MCAME_RESVD_9XXX \ + (NPC_NIXLF_MAX * NPC_MCAME_PER_LF + \ + (NPC_RVUPF_MAX_9XXX - 1) * NPC_MCAME_PER_PF) + +#define NPC_MCAME_RESVD_10XX \ + (NPC_NIXLF_MAX * NPC_MCAME_PER_LF + \ + (NPC_RVUPF_MAX_10XX - 1) * NPC_MCAME_PER_PF) + +enum npc_err_status { + NPC_ERR_PARAM = -1024, + NPC_ERR_NO_MEM, + NPC_ERR_INVALID_SPEC, + NPC_ERR_INVALID_MASK, + NPC_ERR_INVALID_RANGE, + NPC_ERR_INVALID_KEX, + NPC_ERR_INVALID_SIZE, + NPC_ERR_INTERNAL, + NPC_ERR_MCAM_ALLOC, + NPC_ERR_ACTION_NOTSUP, + NPC_ERR_PATTERN_NOTSUP, +}; + +enum npc_mcam_intf { NPC_MCAM_RX, NPC_MCAM_TX }; + +typedef union npc_kex_cap_terms_t { + struct { + /** Total length of received packet */ + uint64_t len : 1; + /** Initial (outer) Ethertype only */ + uint64_t ethtype_0 : 1; + /** Ethertype of most inner VLAN tag */ + uint64_t ethtype_x : 1; + /** First VLAN ID (outer) */ + uint64_t vlan_id_0 : 1; + /** Last VLAN ID (inner) */ + uint64_t vlan_id_x : 1; + /** destination MAC address */ + uint64_t dmac : 1; + /** IP Protocol or IPv6 Next Header */ + uint64_t ip_proto : 1; + /** Destination UDP port, implies IPPROTO=17 */ + uint64_t udp_dport : 1; + /** Destination TCP port implies IPPROTO=6 */ + uint64_t tcp_dport : 1; + /** Source UDP Port */ + uint64_t udp_sport : 1; + /** Source TCP port */ + uint64_t tcp_sport : 1; + /** Source IP address */ + uint64_t sip_addr : 1; + /** Destination IP address */ + uint64_t dip_addr : 1; + /** Source IP address */ + uint64_t sip6_addr : 1; + /** Destination IP address */ + uint64_t dip6_addr : 1; + /** IPsec session identifier */ + uint64_t ipsec_spi : 1; + /** NVGRE/VXLAN network identifier */ + uint64_t ld_vni : 1; + /** Custom frame match rule. PMR offset is counted from + * the start of the packet. + */ + uint64_t custom_frame : 1; + /** Custom layer 3 match rule. PMR offset is counted from + * the start of layer 3 in the packet. + */ + uint64_t custom_l3 : 1; + /** IGMP Group address */ + uint64_t igmp_grp_addr : 1; + /** ICMP identifier */ + uint64_t icmp_id : 1; + /** ICMP type */ + uint64_t icmp_type : 1; + /** ICMP code */ + uint64_t icmp_code : 1; + /** Source SCTP port */ + uint64_t sctp_sport : 1; + /** Destination SCTP port */ + uint64_t sctp_dport : 1; + /** GTPU Tunnel endpoint identifier */ + uint64_t gtpu_teid : 1; + + } bit; + /** All bits of the bit field structure */ + uint64_t all_bits; +} npc_kex_cap_terms_t; + +struct npc_parse_item_info { + const void *def_mask; /* default mask */ + void *hw_mask; /* hardware supported mask */ + int len; /* length of item */ + const void *spec; /* spec to use, NULL implies match any */ + const void *mask; /* mask to use */ + uint8_t hw_hdr_len; /* Extra data len at each layer*/ +}; + +struct npc_parse_state { + struct npc *npc; + const struct roc_npc_item_info *pattern; + const struct roc_npc_item_info *last_pattern; + struct roc_npc_flow *flow; + uint8_t nix_intf; + uint8_t tunnel; + uint8_t terminate; + uint8_t layer_mask; + uint8_t lt[NPC_MAX_LID]; + uint8_t flags[NPC_MAX_LID]; + uint8_t *mcam_data; /* point to flow->mcam_data + key_len */ + uint8_t *mcam_mask; /* point to flow->mcam_mask + key_len */ + bool is_vf; +}; + +enum npc_kpu_parser_flag { + NPC_F_NA = 0, + NPC_F_PKI, + NPC_F_PKI_VLAN, + NPC_F_PKI_ETAG, + NPC_F_PKI_ITAG, + NPC_F_PKI_MPLS, + NPC_F_PKI_NSH, + NPC_F_ETYPE_UNK, + NPC_F_ETHER_VLAN, + NPC_F_ETHER_ETAG, + NPC_F_ETHER_ITAG, + NPC_F_ETHER_MPLS, + NPC_F_ETHER_NSH, + NPC_F_STAG_CTAG, + NPC_F_STAG_CTAG_UNK, + NPC_F_STAG_STAG_CTAG, + NPC_F_STAG_STAG_STAG, + NPC_F_QINQ_CTAG, + NPC_F_QINQ_CTAG_UNK, + NPC_F_QINQ_QINQ_CTAG, + NPC_F_QINQ_QINQ_QINQ, + NPC_F_BTAG_ITAG, + NPC_F_BTAG_ITAG_STAG, + NPC_F_BTAG_ITAG_CTAG, + NPC_F_BTAG_ITAG_UNK, + NPC_F_ETAG_CTAG, + NPC_F_ETAG_BTAG_ITAG, + NPC_F_ETAG_STAG, + NPC_F_ETAG_QINQ, + NPC_F_ETAG_ITAG, + NPC_F_ETAG_ITAG_STAG, + NPC_F_ETAG_ITAG_CTAG, + NPC_F_ETAG_ITAG_UNK, + NPC_F_ITAG_STAG_CTAG, + NPC_F_ITAG_STAG, + NPC_F_ITAG_CTAG, + NPC_F_MPLS_4_LABELS, + NPC_F_MPLS_3_LABELS, + NPC_F_MPLS_2_LABELS, + NPC_F_IP_HAS_OPTIONS, + NPC_F_IP_IP_IN_IP, + NPC_F_IP_6TO4, + NPC_F_IP_MPLS_IN_IP, + NPC_F_IP_UNK_PROTO, + NPC_F_IP_IP_IN_IP_HAS_OPTIONS, + NPC_F_IP_6TO4_HAS_OPTIONS, + NPC_F_IP_MPLS_IN_IP_HAS_OPTIONS, + NPC_F_IP_UNK_PROTO_HAS_OPTIONS, + NPC_F_IP6_HAS_EXT, + NPC_F_IP6_TUN_IP6, + NPC_F_IP6_MPLS_IN_IP, + NPC_F_TCP_HAS_OPTIONS, + NPC_F_TCP_HTTP, + NPC_F_TCP_HTTPS, + NPC_F_TCP_PPTP, + NPC_F_TCP_UNK_PORT, + NPC_F_TCP_HTTP_HAS_OPTIONS, + NPC_F_TCP_HTTPS_HAS_OPTIONS, + NPC_F_TCP_PPTP_HAS_OPTIONS, + NPC_F_TCP_UNK_PORT_HAS_OPTIONS, + NPC_F_UDP_VXLAN, + NPC_F_UDP_VXLAN_NOVNI, + NPC_F_UDP_VXLAN_NOVNI_NSH, + NPC_F_UDP_VXLANGPE, + NPC_F_UDP_VXLANGPE_NSH, + NPC_F_UDP_VXLANGPE_MPLS, + NPC_F_UDP_VXLANGPE_NOVNI, + NPC_F_UDP_VXLANGPE_NOVNI_NSH, + NPC_F_UDP_VXLANGPE_NOVNI_MPLS, + NPC_F_UDP_VXLANGPE_UNK, + NPC_F_UDP_VXLANGPE_NONP, + NPC_F_UDP_GTP_GTPC, + NPC_F_UDP_GTP_GTPU_G_PDU, + NPC_F_UDP_GTP_GTPU_UNK, + NPC_F_UDP_UNK_PORT, + NPC_F_UDP_GENEVE, + NPC_F_UDP_GENEVE_OAM, + NPC_F_UDP_GENEVE_CRI_OPT, + NPC_F_UDP_GENEVE_OAM_CRI_OPT, + NPC_F_GRE_NVGRE, + NPC_F_GRE_HAS_SRE, + NPC_F_GRE_HAS_CSUM, + NPC_F_GRE_HAS_KEY, + NPC_F_GRE_HAS_SEQ, + NPC_F_GRE_HAS_CSUM_KEY, + NPC_F_GRE_HAS_CSUM_SEQ, + NPC_F_GRE_HAS_KEY_SEQ, + NPC_F_GRE_HAS_CSUM_KEY_SEQ, + NPC_F_GRE_HAS_ROUTE, + NPC_F_GRE_UNK_PROTO, + NPC_F_GRE_VER1, + NPC_F_GRE_VER1_HAS_SEQ, + NPC_F_GRE_VER1_HAS_ACK, + NPC_F_GRE_VER1_HAS_SEQ_ACK, + NPC_F_GRE_VER1_UNK_PROTO, + NPC_F_TU_ETHER_UNK, + NPC_F_TU_ETHER_CTAG, + NPC_F_TU_ETHER_CTAG_UNK, + NPC_F_TU_ETHER_STAG_CTAG, + NPC_F_TU_ETHER_STAG_CTAG_UNK, + NPC_F_TU_ETHER_STAG, + NPC_F_TU_ETHER_STAG_UNK, + NPC_F_TU_ETHER_QINQ_CTAG, + NPC_F_TU_ETHER_QINQ_CTAG_UNK, + NPC_F_TU_ETHER_QINQ, + NPC_F_TU_ETHER_QINQ_UNK, + NPC_F_LAST /* has to be the last item */ +}; + +#define NPC_ACTION_TERM \ + (ROC_NPC_ACTION_TYPE_DROP | ROC_NPC_ACTION_TYPE_QUEUE | \ + ROC_NPC_ACTION_TYPE_RSS | ROC_NPC_ACTION_TYPE_DUP | \ + ROC_NPC_ACTION_TYPE_SEC) + +struct npc_xtract_info { + /* Length in bytes of pkt data extracted. len = 0 + * indicates that extraction is disabled. + */ + uint8_t len; + uint8_t hdr_off; /* Byte offset of proto hdr: extract_src */ + uint8_t key_off; /* Byte offset in MCAM key where data is placed */ + uint8_t enable; /* Extraction enabled or disabled */ + uint8_t flags_enable; /* Flags extraction enabled */ +}; + +/* Information for a given {LAYER, LTYPE} */ +struct npc_lid_lt_xtract_info { + /* Info derived from parser configuration */ + uint16_t npc_proto; /* Network protocol identified */ + uint8_t valid_flags_mask; /* Flags applicable */ + uint8_t is_terminating : 1; /* No more parsing */ + struct npc_xtract_info xtract[NPC_MAX_LD]; +}; + +union npc_kex_ldata_flags_cfg { + struct { + uint64_t lid : 3; + uint64_t rvsd_62_1 : 61; + } s; + + uint64_t i; +}; + +typedef struct npc_lid_lt_xtract_info npc_dxcfg_t[NPC_MAX_INTF][NPC_MAX_LID] + [NPC_MAX_LT]; +typedef struct npc_lid_lt_xtract_info npc_fxcfg_t[NPC_MAX_INTF][NPC_MAX_LD] + [NPC_MAX_LFL]; +typedef union npc_kex_ldata_flags_cfg npc_ld_flags_t[NPC_MAX_LD]; + +/* MBOX_MSG_NPC_GET_DATAX_CFG Response */ +struct npc_get_datax_cfg { + /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */ + union npc_kex_ldata_flags_cfg ld_flags[NPC_MAX_LD]; + /* Extract information indexed with [LID][LTYPE] */ + struct npc_lid_lt_xtract_info lid_lt_xtract[NPC_MAX_LID][NPC_MAX_LT]; + /* Flags based extract indexed with [LDATA][FLAGS_LOWER_NIBBLE] + * Fields flags_ena_ld0, flags_ena_ld1 in + * struct npc_lid_lt_xtract_info indicate if this is applicable + * for a given {LAYER, LTYPE} + */ + struct npc_xtract_info flag_xtract[NPC_MAX_LD][NPC_MAX_LT]; +}; + +TAILQ_HEAD(npc_flow_list, roc_npc_flow); + +struct npc_mcam_ents_info { + /* Current max & min values of mcam index */ + uint32_t max_id; + uint32_t min_id; + uint32_t free_ent; + uint32_t live_ent; +}; + +struct npc { + struct mbox *mbox; /* Mbox */ + uint32_t keyx_supp_nmask[NPC_MAX_INTF]; /* nibble mask */ + uint8_t profile_name[MKEX_NAME_LEN]; /* KEX profile name */ + uint32_t keyx_len[NPC_MAX_INTF]; /* per intf key len in bits */ + uint32_t datax_len[NPC_MAX_INTF]; /* per intf data len in bits */ + uint32_t keyw[NPC_MAX_INTF]; /* max key + data len bits */ + uint32_t mcam_entries; /* mcam entries supported */ + uint16_t channel; /* RX Channel number */ + uint32_t rss_grps; /* rss groups supported */ + uint16_t flow_prealloc_size; /* Pre allocated mcam size */ + uint16_t flow_max_priority; /* Max priority for flow */ + uint16_t switch_header_type; /* Suppprted switch header type */ + uint32_t mark_actions; /* Number of mark actions */ + uint16_t pf_func; /* pf_func of device */ + npc_dxcfg_t prx_dxcfg; /* intf, lid, lt, extract */ + npc_fxcfg_t prx_fxcfg; /* Flag extract */ + npc_ld_flags_t prx_lfcfg; /* KEX LD_Flags CFG */ + /* mcam entry info per priority level: both free & in-use */ + struct npc_mcam_ents_info *flow_entry_info; + /* Bitmap of free preallocated entries in ascending index & + * descending priority + */ + struct plt_bitmap **free_entries; + /* Bitmap of free preallocated entries in descending index & + * ascending priority + */ + struct plt_bitmap **free_entries_rev; + /* Bitmap of live entries in ascending index & descending priority */ + struct plt_bitmap **live_entries; + /* Bitmap of live entries in descending index & ascending priority */ + struct plt_bitmap **live_entries_rev; + /* Priority bucket wise tail queue of all npc_flow resources */ + struct npc_flow_list *flow_list; + struct plt_bitmap *rss_grp_entries; +}; + +static inline struct npc * +roc_npc_to_npc_priv(struct roc_npc *npc) +{ + return (struct npc *)npc->reserved; +} +#endif /* _ROC_NPC_PRIV_H_ */ diff --git a/drivers/common/cnxk/roc_platform.c b/drivers/common/cnxk/roc_platform.c index dd33e58..11ff0f8 100644 --- a/drivers/common/cnxk/roc_platform.c +++ b/drivers/common/cnxk/roc_platform.c @@ -32,4 +32,5 @@ RTE_LOG_REGISTER(cnxk_logtype_base, pmd.cnxk.base, NOTICE); RTE_LOG_REGISTER(cnxk_logtype_mbox, pmd.cnxk.mbox, NOTICE); RTE_LOG_REGISTER(cnxk_logtype_npa, pmd.mempool.cnxk, NOTICE); RTE_LOG_REGISTER(cnxk_logtype_nix, pmd.net.cnxk, NOTICE); +RTE_LOG_REGISTER(cnxk_logtype_npc, pmd.net.cnxk.flow, NOTICE); RTE_LOG_REGISTER(cnxk_logtype_tm, pmd.net.cnxk.tm, NOTICE); diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h index 8f46fb3..d585d53 100644 --- a/drivers/common/cnxk/roc_platform.h +++ b/drivers/common/cnxk/roc_platform.h @@ -128,6 +128,7 @@ extern int cnxk_logtype_base; extern int cnxk_logtype_mbox; extern int cnxk_logtype_npa; extern int cnxk_logtype_nix; +extern int cnxk_logtype_npc; extern int cnxk_logtype_tm; #define plt_err(fmt, args...) \ @@ -148,6 +149,7 @@ extern int cnxk_logtype_tm; #define plt_mbox_dbg(fmt, ...) plt_dbg(mbox, fmt, ##__VA_ARGS__) #define plt_npa_dbg(fmt, ...) plt_dbg(npa, fmt, ##__VA_ARGS__) #define plt_nix_dbg(fmt, ...) plt_dbg(nix, fmt, ##__VA_ARGS__) +#define plt_npc_dbg(fmt, ...) plt_dbg(npc, fmt, ##__VA_ARGS__) #define plt_tm_dbg(fmt, ...) plt_dbg(tm, fmt, ##__VA_ARGS__) #ifdef __cplusplus diff --git a/drivers/common/cnxk/roc_priv.h b/drivers/common/cnxk/roc_priv.h index 4a1eb9c..b1756fe 100644 --- a/drivers/common/cnxk/roc_priv.h +++ b/drivers/common/cnxk/roc_priv.h @@ -23,4 +23,7 @@ /* NIX */ #include "roc_nix_priv.h" +/* NPC */ +#include "roc_npc_priv.h" + #endif /* _ROC_PRIV_H_ */ diff --git a/drivers/common/cnxk/roc_utils.c b/drivers/common/cnxk/roc_utils.c index 43ba177..c5c5962 100644 --- a/drivers/common/cnxk/roc_utils.c +++ b/drivers/common/cnxk/roc_utils.c @@ -14,16 +14,20 @@ roc_error_msg_get(int errorcode) case NIX_AF_ERR_PARAM: case NIX_ERR_PARAM: case NPA_ERR_PARAM: + case NPC_ERR_PARAM: case UTIL_ERR_PARAM: err_msg = "Invalid parameter"; break; case NIX_ERR_NO_MEM: + case NPC_ERR_NO_MEM: err_msg = "Out of memory"; break; case NIX_ERR_INVALID_RANGE: + case NPC_ERR_INVALID_RANGE: err_msg = "Range is not supported"; break; case NIX_ERR_INTERNAL: + case NPC_ERR_INTERNAL: err_msg = "Internal error"; break; case NIX_ERR_OP_NOTSUP: @@ -104,6 +108,26 @@ roc_error_msg_get(int errorcode) case NIX_ERR_NDC_SYNC: err_msg = "NDC Sync failed"; break; + case NPC_ERR_INVALID_SPEC: + err_msg = "NPC invalid spec"; + break; + case NPC_ERR_INVALID_MASK: + err_msg = "NPC invalid mask"; + break; + case NPC_ERR_INVALID_KEX: + err_msg = "NPC invalid key"; + break; + case NPC_ERR_INVALID_SIZE: + err_msg = "NPC invalid key size"; + break; + case NPC_ERR_ACTION_NOTSUP: + err_msg = "NPC action not supported"; + break; + case NPC_ERR_PATTERN_NOTSUP: + err_msg = "NPC pattern not supported"; + break; + case NPC_ERR_MCAM_ALLOC: + err_msg = "MCAM entry alloc failed"; break; case NPA_ERR_ALLOC: err_msg = "NPA alloc failed"; diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 829d471..5e2ec93 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -5,6 +5,7 @@ INTERNAL { cnxk_logtype_mbox; cnxk_logtype_nix; cnxk_logtype_npa; + cnxk_logtype_npc; cnxk_logtype_tm; plt_init; roc_clk_freq_get; -- 2.8.4