From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2C805A0548; Sat, 6 Mar 2021 16:41:05 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 76C9122A492; Sat, 6 Mar 2021 16:36:29 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 9187A22A486 for ; Sat, 6 Mar 2021 16:36:27 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 126FU4UX005224 for ; Sat, 6 Mar 2021 07:36:27 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=v6WMr9vq6YXOlgwHZIZAOF8p1lH6jvTLEHI2NXxcO50=; b=OF7K7yd+R7IfhtdjiwbJ6SUqEOb0xkKHfDGlR/unvpvCpbD/6tdE6tANufORjSY75x+A kvDEP8EM8hxszQV55n4O4mhDmSi38X+sQZ6P/tKBInxUGrzU/hjiYTLvZFjzCcRYUngH XwuLq/pdzLt/fuuB6jP75PHAz2wARH/IfQMJa38cB9/oQXhPocD/wGjNQtYB2L/lFvIw AQ9+J9qrpTZiaCl4638a3nnfGnk7JgESaUXWGWOy+w5j6bE3iAZ1KAfcAOdSkbYETGxj iADzD6IREietjLKgJ+N0kgPeOs+E5CJVniRVP6t+uHUdfa40AyC/OPVtQBi5LM/VJ+Ca uQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 374a4w06ce-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 06 Mar 2021 07:36:27 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 6 Mar 2021 07:36:24 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 6 Mar 2021 07:36:24 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 5F7B83F703F; Sat, 6 Mar 2021 07:36:22 -0800 (PST) From: Nithin Dabilpuram To: CC: , , , , , , Date: Sat, 6 Mar 2021 21:04:02 +0530 Message-ID: <20210306153404.10781-43-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210306153404.10781-1-ndabilpuram@marvell.com> References: <20210306153404.10781-1-ndabilpuram@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-06_08:2021-03-03, 2021-03-06 signatures=0 Subject: [dpdk-dev] [PATCH 42/44] net/cnxk: add filter ctrl operation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Satheesh Paul This patch adds filter_ctrl operation to enable rte_flow_ops. Signed-off-by: Satheesh Paul --- drivers/common/cnxk/roc_npc.c | 2 ++ drivers/net/cnxk/cnxk_ethdev.c | 3 +++ drivers/net/cnxk/cnxk_ethdev.h | 6 +++++- drivers/net/cnxk/cnxk_ethdev_ops.c | 21 +++++++++++++++++++++ 4 files changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c index 0efe080..b862e23 100644 --- a/drivers/common/cnxk/roc_npc.c +++ b/drivers/common/cnxk/roc_npc.c @@ -645,6 +645,8 @@ roc_npc_flow_create(struct roc_npc *roc_npc, const struct roc_npc_attr *attr, struct npc_flow_list *list; int rc; + npc->channel = roc_npc->channel; + flow = plt_zmalloc(sizeof(*flow), 0); if (flow == NULL) { *errcode = NPC_ERR_NO_MEM; diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index afe97f1..347428e 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -773,6 +773,8 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) goto fail_configure; } + dev->npc.channel = roc_nix_get_base_chan(nix); + nb_rxq = data->nb_rx_queues; nb_txq = data->nb_tx_queues; rc = -ENOMEM; @@ -1176,6 +1178,7 @@ struct eth_dev_ops cnxk_eth_dev_ops = { .rxq_info_get = cnxk_nix_rxq_info_get, .txq_info_get = cnxk_nix_txq_info_get, .tx_done_cleanup = cnxk_nix_tx_done_cleanup, + .filter_ctrl = cnxk_nix_filter_ctrl, }; static int diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index e3b0bc1..7cf7cf7 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -218,6 +218,8 @@ cnxk_eth_pmd_priv(struct rte_eth_dev *eth_dev) /* Common ethdev ops */ extern struct eth_dev_ops cnxk_eth_dev_ops; +extern const struct rte_flow_ops cnxk_flow_ops; + /* Ops */ int cnxk_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev); @@ -255,7 +257,9 @@ int cnxk_nix_rx_queue_intr_disable(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id); int cnxk_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool); int cnxk_nix_tx_done_cleanup(void *txq, uint32_t free_cnt); - +int cnxk_nix_filter_ctrl(struct rte_eth_dev *eth_dev, + enum rte_filter_type filter_type, + enum rte_filter_op filter_op, void *arg); int cnxk_nix_configure(struct rte_eth_dev *eth_dev); int cnxk_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid, uint16_t nb_desc, uint16_t fp_tx_q_sz, diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c index ff8afac..00f1fe7 100644 --- a/drivers/net/cnxk/cnxk_ethdev_ops.c +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c @@ -294,6 +294,27 @@ cnxk_nix_flow_ctrl_set(struct rte_eth_dev *eth_dev, } int +cnxk_nix_filter_ctrl(struct rte_eth_dev *eth_dev, + enum rte_filter_type filter_type, + enum rte_filter_op filter_op, void *arg) +{ + RTE_SET_USED(eth_dev); + + if (filter_type != RTE_ETH_FILTER_GENERIC) { + plt_err("Unsupported filter type %d", filter_type); + return -ENOTSUP; + } + + if (filter_op == RTE_ETH_FILTER_GET) { + *(const void **)arg = &cnxk_flow_ops; + return 0; + } + + plt_err("Invalid filter_op %d", filter_op); + return -EINVAL; +} + +int cnxk_nix_mac_addr_set(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr) { struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); -- 2.8.4