From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A3114A0579; Thu, 8 Apr 2021 05:26:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 27D1B40698; Thu, 8 Apr 2021 05:26:03 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id DF5E140138 for ; Thu, 8 Apr 2021 05:26:01 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from akozyrev@nvidia.com) with SMTP; 8 Apr 2021 06:25:57 +0300 Received: from nvidia.com (pegasus02.mtr.labs.mlnx [10.210.16.122]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 1383PvRb012137; Thu, 8 Apr 2021 06:25:57 +0300 From: Alexander Kozyrev To: dev@dpdk.org Cc: rasland@nvidia.com, viacheslavo@nvidia.com Date: Thu, 8 Apr 2021 03:25:54 +0000 Message-Id: <20210408032554.20255-1-akozyrev@nvidia.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20210315153250.13695-1-akozyrev@nvidia.com> References: <20210315153250.13695-1-akozyrev@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2] net/mlx5: add power monitoring support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Support the PMD power management API in MLX5 driver. The monitor policy of this API puts a CPU core to sleep until a data in some monitored memory address is changed by the NIC. Implement the get_monitor_addr function to return an address of a CQE owner bit to monitor the arrival of a new packet. Signed-off-by: Alexander Kozyrev --- v2: fixed check for empty CQE array doc/guides/rel_notes/release_21_05.rst | 4 ++++ drivers/net/mlx5/mlx5.c | 2 ++ drivers/net/mlx5/mlx5_rxtx.c | 19 +++++++++++++++++++ drivers/net/mlx5/mlx5_rxtx.h | 1 + 4 files changed, 26 insertions(+) diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst index 19cec62c73..0894206b14 100644 --- a/doc/guides/rel_notes/release_21_05.rst +++ b/doc/guides/rel_notes/release_21_05.rst @@ -97,6 +97,10 @@ New Features * Added flow filter to support GTPU inner L3/L4 fields matching. +* **Updated Mellanox mlx5 driver.** + + * Added support for the monitor policy of Power Management API. + * **Updated NXP DPAA driver.** * Added support for shared ethernet interface. diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 9557d06afa..c7ac224fed 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -1518,6 +1518,7 @@ const struct eth_dev_ops mlx5_dev_ops = { .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update, .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind, .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind, + .get_monitor_addr = mlx5_get_monitor_addr, }; /* Available operations from secondary process. */ @@ -1602,6 +1603,7 @@ const struct eth_dev_ops mlx5_dev_ops_isolate = { .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update, .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind, .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind, + .get_monitor_addr = mlx5_get_monitor_addr, }; /** diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index c76b9951bc..1a87acb4d1 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -712,6 +712,25 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) return rx_queue_count(rxq); } +int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc) +{ + struct mlx5_rxq_data *rxq = rx_queue; + const unsigned int cqe_num = 1 << rxq->cqe_n; + const unsigned int cqe_mask = cqe_num - 1; + const uint16_t idx = rxq->cq_ci & cqe_num; + volatile struct mlx5_cqe *cqe = &(*rxq->cqes)[rxq->cq_ci & cqe_mask]; + + if (unlikely(rxq->cqes == NULL)) { + rte_errno = EINVAL; + return -rte_errno; + } + pmc->addr = &cqe->op_own; + pmc->val = !!idx; + pmc->mask = MLX5_CQE_OWNER_MASK; + pmc->size = sizeof(uint8_t); + return 0; +} + #define MLX5_SYSTEM_LOG_DIR "/var/log" /** * Dump debug information to log file. diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index 4f0fda0dec..6b8e28cea7 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -442,6 +442,7 @@ int mlx5_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, struct rte_eth_burst_mode *mode); int mlx5_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, struct rte_eth_burst_mode *mode); +int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc); /* Vectorized version of mlx5_rxtx.c */ int mlx5_rxq_check_vec_support(struct mlx5_rxq_data *rxq_data); -- 2.24.1