From: Radu Nicolau <radu.nicolau@intel.com>
To: dev@dpdk.org
Cc: bruce.richardson@intel.com, leyi.rong@intel.com,
qi.z.zhang@intel.com, wenzhuo.lu@intel.com,
Radu Nicolau <radu.nicolau@intel.com>
Subject: [dpdk-dev] [PATCH] net/ice: use write combining store for tail updates on AVX512 path.
Date: Fri, 9 Apr 2021 10:09:03 +0000 [thread overview]
Message-ID: <20210409100903.8619-1-radu.nicolau@intel.com> (raw)
Performance improvement: use a write combining store
instead of a regular mmio write to update queue tail
registers.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
---
drivers/net/ice/ice_rxtx_vec_avx512.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/ice_rxtx_vec_avx512.c b/drivers/net/ice/ice_rxtx_vec_avx512.c
index 0e5a676e6..9f3501238 100644
--- a/drivers/net/ice/ice_rxtx_vec_avx512.c
+++ b/drivers/net/ice/ice_rxtx_vec_avx512.c
@@ -125,7 +125,7 @@ ice_rxq_rearm(struct ice_rx_queue *rxq)
(rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));
/* Update the tail pointer on the NIC */
- ICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
+ ICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);
}
static inline __m256i
@@ -1111,7 +1111,7 @@ ice_xmit_fixed_burst_vec_avx512(void *tx_queue, struct rte_mbuf **tx_pkts,
txq->tx_tail = tx_id;
- ICE_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);
+ ICE_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail);
return nb_pkts;
}
--
2.17.1
next reply other threads:[~2021-04-09 10:10 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-09 10:09 Radu Nicolau [this message]
2021-04-13 5:23 ` Zhang, Qi Z
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