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marvell.com; dkim=none (message not signed) header.d=none;marvell.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT006.mail.protection.outlook.com (10.13.174.246) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4087.27 via Frontend Transport; Thu, 29 Apr 2021 15:44:32 +0000 Received: from nvidia.com (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 29 Apr 2021 15:44:29 +0000 From: Matan Azrad To: CC: , , , "Dekel Peled" Date: Thu, 29 Apr 2021 18:43:25 +0300 Message-ID: <20210429154335.2820028-7-matan@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210429154335.2820028-1-matan@nvidia.com> References: <20210408204849.9543-1-shirik@nvidia.com> <20210429154335.2820028-1-matan@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ae591d2a-7584-4c0b-d4cd-08d90b25af09 X-MS-TrafficTypeDiagnostic: MN2PR12MB4831: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5516; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Apr 2021 15:44:32.7009 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ae591d2a-7584-4c0b-d4cd-08d90b25af09 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT006.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4831 Subject: [dpdk-dev] [PATCH v2 06/16] common/mlx5: adjust DevX MKEY fields for crypto X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dekel Peled MKEY that will be used for crypto purposes must be created with crypto_en and remote access attributes. This patch adds support for them in the DevX MKEY context. Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_devx_cmds.c | 5 +++++ drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++ drivers/common/mlx5/mlx5_prm.h | 10 +++++++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index 742c82cca4..68a10b149a 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -263,6 +263,10 @@ mlx5_devx_cmd_mkey_create(void *ctx, MLX5_SET(create_mkey_in, in, pg_access, attr->pg_access); MLX5_SET(mkc, mkc, lw, 0x1); MLX5_SET(mkc, mkc, lr, 0x1); + if (attr->set_remote_rw) { + MLX5_SET(mkc, mkc, rw, 0x1); + MLX5_SET(mkc, mkc, rr, 0x1); + } MLX5_SET(mkc, mkc, qpn, 0xffffff); MLX5_SET(mkc, mkc, pd, attr->pd); MLX5_SET(mkc, mkc, mkey_7_0, attr->umem_id & 0xFF); @@ -273,6 +277,7 @@ mlx5_devx_cmd_mkey_create(void *ctx, MLX5_SET(mkc, mkc, relaxed_ordering_read, attr->relaxed_ordering_read); MLX5_SET64(mkc, mkc, start_addr, attr->addr); MLX5_SET64(mkc, mkc, len, attr->size); + MLX5_SET(mkc, mkc, crypto_en, attr->crypto_en); mkey->obj = mlx5_glue->devx_obj_create(ctx, in, in_size_dw * 4, out, sizeof(out)); if (!mkey->obj) { diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index b9ff7ab87d..600577f18a 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -32,6 +32,8 @@ struct mlx5_devx_mkey_attr { uint32_t relaxed_ordering_write:1; uint32_t relaxed_ordering_read:1; uint32_t umr_en:1; + uint32_t crypto_en:2; + uint32_t set_remote_rw:1; struct mlx5_klm *klm_array; int klm_num; }; diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index bc9f58ad03..25f6f8ff00 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -1059,7 +1059,15 @@ struct mlx5_ifc_mkc_bits { u8 relaxed_ordering_read[0x1]; u8 reserved_at_1da[0x1]; u8 log_page_size[0x5]; - u8 reserved_at_1e0[0x20]; + u8 reserved_at_1e0[0x3]; + u8 crypto_en[0x2]; + u8 reserved_at_1e5[0x1b]; +}; + +/* Range of values for MKEY context crypto_en field. */ +enum { + MLX5_MKEY_CRYPTO_DISABLED = 0x0, + MLX5_MKEY_CRYPTO_ENABLED = 0x1, }; struct mlx5_ifc_create_mkey_out_bits { -- 2.25.1