From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9F020A0A02; Mon, 17 May 2021 12:00:25 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9D6514110D; Mon, 17 May 2021 12:00:19 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id A45D44110C for ; Mon, 17 May 2021 12:00:17 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 247D2106F; Mon, 17 May 2021 03:00:17 -0700 (PDT) Received: from net-x86-dell-8268.shanghai.arm.com (net-x86-dell-8268.shanghai.arm.com [10.169.210.111]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C7BDD3F719; Mon, 17 May 2021 03:00:14 -0700 (PDT) From: Feifei Wang To: Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko Cc: dev@dpdk.org, nd@arm.com, Feifei Wang , Ruifeng Wang Date: Mon, 17 May 2021 18:00:02 +0800 Message-Id: <20210517100002.19905-3-feifei.wang2@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210517100002.19905-1-feifei.wang2@arm.com> References: <20210318071840.359957-1-feifei.wang2@arm.com> <20210517100002.19905-1-feifei.wang2@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2 2/2] net/mlx5: remove unnecessary wmb for Memory Region cache X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 'dev_gen' is a variable to inform other cores to flush their local cache when global cache is rebuilt. It is unnecessary to add write memory barrier (wmb) before or after its updating for synchronization. This is due to MR cache's R/W lock can maintain synchronization between threads: 1. dev_gen and global cache update ordering inside the lock protected section does not matter. Because other threads cannot take the lock until global cache has been updated. Thus, in out of order platform, even if other agents firstly observed updated dev_gen but global does not update, they also needs to wait the lock. As a result, it is unnecessary to add a wmb between rebuiling global cache and updating dev_gen to keep the order of rebuilding global cache and updating dev_gen. 2. Store-Release of unlock can provide the implicit wmb at the level visible by software. This makes 'rebuiling global cache' and 'updating dev_gen' be observed before local_cache starts to be updated by other agents. Thus, wmb after 'updating dev_gen' can be removed. Suggested-by: Ruifeng Wang Signed-off-by: Feifei Wang Reviewed-by: Ruifeng Wang --- drivers/net/mlx5/mlx5_mr.c | 26 ++++++++++---------------- 1 file changed, 10 insertions(+), 16 deletions(-) diff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c index e791b6338d..85e5865050 100644 --- a/drivers/net/mlx5/mlx5_mr.c +++ b/drivers/net/mlx5/mlx5_mr.c @@ -107,18 +107,15 @@ mlx5_mr_mem_event_free_cb(struct mlx5_dev_ctx_shared *sh, if (rebuild) { mlx5_mr_rebuild_cache(&sh->share_cache); /* - * Flush local caches by propagating invalidation across cores. - * rte_smp_wmb() is enough to synchronize this event. If one of - * freed memsegs is seen by other core, that means the memseg - * has been allocated by allocator, which will come after this - * free call. Therefore, this store instruction (incrementing - * generation below) will be guaranteed to be seen by other core - * before the core sees the newly allocated memory. + * No wmb is needed after updating dev_gen due to store-release of + * unlock can provide the implicit wmb at the level visible by + * software. This makes rebuilt global cache and updated dev_gen + * be observed when local_cache starts to be updating by other + * agents. */ ++sh->share_cache.dev_gen; DRV_LOG(DEBUG, "broadcasting local cache flush, gen=%d", sh->share_cache.dev_gen); - rte_smp_wmb(); } rte_rwlock_write_unlock(&sh->share_cache.rwlock); } @@ -411,18 +408,15 @@ mlx5_dma_unmap(struct rte_pci_device *pdev, void *addr, (void *)mr); mlx5_mr_rebuild_cache(&sh->share_cache); /* - * Flush local caches by propagating invalidation across cores. - * rte_smp_wmb() is enough to synchronize this event. If one of - * freed memsegs is seen by other core, that means the memseg - * has been allocated by allocator, which will come after this - * free call. Therefore, this store instruction (incrementing - * generation below) will be guaranteed to be seen by other core - * before the core sees the newly allocated memory. + * No wmb is needed after updating dev_gen due to store-release of + * unlock can provide the implicit wmb at the level visible by + * software. This makes rebuilt global cache and updated dev_gen + * be observed when local_cache starts to be updating by other + * agents. */ ++sh->share_cache.dev_gen; DRV_LOG(DEBUG, "broadcasting local cache flush, gen=%d", sh->share_cache.dev_gen); - rte_smp_wmb(); rte_rwlock_read_unlock(&sh->share_cache.rwlock); return 0; } -- 2.25.1