From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0A861A0547; Mon, 24 May 2021 15:06:37 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 274BE41101; Mon, 24 May 2021 15:06:32 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 0D6154003E for ; Mon, 24 May 2021 15:06:29 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 14OD6SFa018076 for ; Mon, 24 May 2021 06:06:29 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=/PohO1x5oPM6PRMOT5NCSc/X6E/lvYxELW47ziwdS8Y=; b=k40f6S4vSZdZ1MWtQLh2LSjLGNx4j45I2fZupQvU1DRbsuf08ae1/OD32UhL/PAoGKOt XG8kR99VbZSCf6aKUXXgZs8OTzaySJyjJMl29OYevPhPw0SjpfU50IkO1ec91cgnVggl OsxLOlHzoXiDNQKXubNb0uZj6JMXZxRO9cWxwy5EC9NC5culmnhQIC816n7mqRusMHnu gf/mKUtizsGFIEjw2G+Fh8rfFN89Qvi/1KU7hRzAkk+JLOL/b5n35sFZ41411MWHGG7G d/uhk+qTqdoOfmX6ux5nEWyand7mADdM+aaClvksqPFxl6f6XA4dFCMcsctQ9XeF4RaM ZQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 38qwvejfgp-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 24 May 2021 06:06:29 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 24 May 2021 06:06:25 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 24 May 2021 06:06:25 -0700 Received: from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176]) by maili.marvell.com (Postfix) with ESMTP id CB2FD3F703F; Mon, 24 May 2021 06:06:23 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Date: Mon, 24 May 2021 18:36:16 +0530 Message-ID: <20210524130617.1621-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210524130617.1621-1-pbhagavatula@marvell.com> References: <20210524130617.1621-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 1iEiLyuxYaHcPkyXC7O15d5aUJsHPT-Y X-Proofpoint-ORIG-GUID: 1iEiLyuxYaHcPkyXC7O15d5aUJsHPT-Y X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-24_07:2021-05-24, 2021-05-24 signatures=0 Subject: [dpdk-dev] [PATCH 2/2] event/cnxk: add Rx event vector fastpath X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add Rx event vector fastpath to convert HW defined metadata into rte_mbuf and rte_event_vector. Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn10k_worker.h | 50 +++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h index b3f71202ad..8c2cd72873 100644 --- a/drivers/event/cnxk/cn10k_worker.h +++ b/drivers/event/cnxk/cn10k_worker.h @@ -5,6 +5,8 @@ #ifndef __CN10K_WORKER_H__ #define __CN10K_WORKER_H__ +#include + #include "cnxk_ethdev.h" #include "cnxk_eventdev.h" #include "cnxk_worker.h" @@ -101,6 +103,44 @@ cn10k_wqe_to_mbuf(uint64_t wqe, const uint64_t mbuf, uint8_t port_id, mbuf_init.value, flags); } +static __rte_always_inline void +cn10k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const uint32_t flags, + void *lookup_mem) +{ + union mbuf_initializer mbuf_init = { + .fields = {.data_off = RTE_PKTMBUF_HEADROOM, + .refcnt = 1, + .nb_segs = 1, + .port = port_id}, + }; + struct rte_event_vector *vec; + uint16_t nb_mbufs, non_vec; + uint64_t **wqe; + + vec = (struct rte_event_vector *)vwqe; + wqe = vec->u64s; + + nb_mbufs = RTE_ALIGN_FLOOR(vec->nb_elem, NIX_DESCS_PER_LOOP); + nb_mbufs = cn10k_nix_recv_pkts_vector(&mbuf_init.value, vec->mbufs, + nb_mbufs, flags | NIX_RX_VWQE_F, + lookup_mem); + wqe += nb_mbufs; + non_vec = vec->nb_elem - nb_mbufs; + + while (non_vec) { + struct nix_cqe_hdr_s *cqe = (struct nix_cqe_hdr_s *)wqe[0]; + struct rte_mbuf *mbuf; + + mbuf = (struct rte_mbuf *)((char *)cqe - + sizeof(struct rte_mbuf)); + cn10k_nix_cqe_to_mbuf(cqe, cqe->tag, mbuf, lookup_mem, + mbuf_init.value, flags); + wqe[0] = (uint64_t *)mbuf; + non_vec--; + wqe++; + } +} + static __rte_always_inline uint16_t cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev, const uint32_t flags, void *lookup_mem) @@ -141,6 +181,16 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev, gw.u64[0] & 0xFFFFF, flags, lookup_mem); gw.u64[1] = mbuf; + } else if (CNXK_EVENT_TYPE_FROM_TAG(gw.u64[0]) == + RTE_EVENT_TYPE_ETHDEV_VECTOR) { + uint8_t port = CNXK_SUB_EVENT_FROM_TAG(gw.u64[0]); + __uint128_t vwqe_hdr = *(__uint128_t *)gw.u64[1]; + + vwqe_hdr = ((vwqe_hdr >> 64) & 0xFFF) | BIT_ULL(31) | + ((vwqe_hdr & 0xFFFF) << 48) | + ((uint64_t)port << 32); + *(uint64_t *)gw.u64[1] = (uint64_t)vwqe_hdr; + cn10k_process_vwqe(gw.u64[1], port, flags, lookup_mem); } } -- 2.17.1