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From: Lance Richardson <lance.richardson@broadcom.com>
To: Ajit Khaparde <ajit.khaparde@broadcom.com>,
	Somnath Kotur <somnath.kotur@broadcom.com>,
	Jerin Jacob <jerinj@marvell.com>,
	Ruifeng Wang <ruifeng.wang@arm.com>,
	Bruce Richardson <bruce.richardson@intel.com>,
	Konstantin Ananyev <konstantin.ananyev@intel.com>
Cc: dev@dpdk.org
Subject: [dpdk-dev] [PATCH 1/3] net/bnxt: refactor HW ptype mapping table
Date: Mon, 24 May 2021 14:59:49 -0400	[thread overview]
Message-ID: <20210524185952.673258-2-lance.richardson@broadcom.com> (raw)
In-Reply-To: <20210524185952.673258-1-lance.richardson@broadcom.com>

[-- Attachment #1: Type: text/plain, Size: 9920 bytes --]

Make the definition of the table used to map hardware packet type
information to DPDK packet type more generic.

Add macro definitions for constants used in creating table
indices, use these to eliminate raw constants in code.

Add build-time assertions to validate ptype mapping constants.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Kumar Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/bnxt_rxr.c           | 34 +++++++++++----------
 drivers/net/bnxt/bnxt_rxr.h           | 43 ++++++++++++++++++++++++++-
 drivers/net/bnxt/bnxt_rxtx_vec_neon.c | 19 ++++++++----
 drivers/net/bnxt/bnxt_rxtx_vec_sse.c  | 18 +++++++----
 4 files changed, 85 insertions(+), 29 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c
index 2ef4115ef9..a6a8fb213b 100644
--- a/drivers/net/bnxt/bnxt_rxr.c
+++ b/drivers/net/bnxt/bnxt_rxr.c
@@ -396,14 +396,14 @@ bnxt_init_ptype_table(void)
 		return;
 
 	for (i = 0; i < BNXT_PTYPE_TBL_DIM; i++) {
-		if (i & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN >> 2))
+		if (i & BNXT_PTYPE_TBL_VLAN_MSK)
 			pt[i] = RTE_PTYPE_L2_ETHER_VLAN;
 		else
 			pt[i] = RTE_PTYPE_L2_ETHER;
 
-		ip6 = i & (RX_PKT_CMPL_FLAGS2_IP_TYPE >> 7);
-		tun = i & (RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC >> 2);
-		type = (i & 0x78) << 9;
+		ip6 = !!(i & BNXT_PTYPE_TBL_IP_VER_MSK);
+		tun = !!(i & BNXT_PTYPE_TBL_TUN_MSK);
+		type = (i & BNXT_PTYPE_TBL_TYPE_MSK) >> BNXT_PTYPE_TBL_TYPE_SFT;
 
 		if (!tun && !ip6)
 			l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
@@ -415,25 +415,25 @@ bnxt_init_ptype_table(void)
 			l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 
 		switch (type) {
-		case RX_PKT_CMPL_FLAGS_ITYPE_ICMP:
+		case BNXT_PTYPE_TBL_TYPE_ICMP:
 			if (tun)
 				pt[i] |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 			else
 				pt[i] |= l3 | RTE_PTYPE_L4_ICMP;
 			break;
-		case RX_PKT_CMPL_FLAGS_ITYPE_TCP:
+		case BNXT_PTYPE_TBL_TYPE_TCP:
 			if (tun)
 				pt[i] |= l3 | RTE_PTYPE_INNER_L4_TCP;
 			else
 				pt[i] |= l3 | RTE_PTYPE_L4_TCP;
 			break;
-		case RX_PKT_CMPL_FLAGS_ITYPE_UDP:
+		case BNXT_PTYPE_TBL_TYPE_UDP:
 			if (tun)
 				pt[i] |= l3 | RTE_PTYPE_INNER_L4_UDP;
 			else
 				pt[i] |= l3 | RTE_PTYPE_L4_UDP;
 			break;
-		case RX_PKT_CMPL_FLAGS_ITYPE_IP:
+		case BNXT_PTYPE_TBL_TYPE_IP:
 			pt[i] |= l3;
 			break;
 		}
@@ -450,17 +450,19 @@ bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 	flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 	flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 
+	/* Validate ptype table indexing at build time. */
+	bnxt_check_ptype_constants();
+
 	/*
 	 * Index format:
-	 *     bit 0: RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC
-	 *     bit 1: RX_CMPL_FLAGS2_IP_TYPE
-	 *     bit 2: RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
-	 *     bits 3-6: RX_PKT_CMPL_FLAGS_ITYPE
+	 *     bit 0: Set if IP tunnel encapsulated packet.
+	 *     bit 1: Set if IPv6 packet, clear if IPv4.
+	 *     bit 2: Set if VLAN tag present.
+	 *     bits 3-6: Four-bit hardware packet type field.
 	 */
-	index = ((flags_type & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> 9) |
-		((flags2 & (RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
-			   RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)) >> 2) |
-		((flags2 & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> 7);
+	index = BNXT_CMPL_ITYPE_TO_IDX(flags_type) |
+		BNXT_CMPL_VLAN_TUN_TO_IDX(flags2) |
+		BNXT_CMPL_IP_VER_TO_IDX(flags2);
 
 	return bnxt_ptype_table[index];
 }
diff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h
index b43256e03e..79f1458698 100644
--- a/drivers/net/bnxt/bnxt_rxr.h
+++ b/drivers/net/bnxt/bnxt_rxr.h
@@ -131,7 +131,48 @@ bnxt_cfa_code_dynfield(struct rte_mbuf *mbuf)
 #define BNXT_CFA_META_EEM_TCAM_SHIFT		31
 #define BNXT_CFA_META_EM_TEST(x) ((x) >> BNXT_CFA_META_EEM_TCAM_SHIFT)
 
-#define BNXT_PTYPE_TBL_DIM	128
+/* Definitions for translation of hardware packet type to mbuf ptype. */
+#define BNXT_PTYPE_TBL_DIM		128
+#define BNXT_PTYPE_TBL_TUN_SFT		0 /* Set if tunneled packet. */
+#define BNXT_PTYPE_TBL_TUN_MSK		BIT(BNXT_PTYPE_TBL_TUN_SFT)
+#define BNXT_PTYPE_TBL_IP_VER_SFT	1 /* Set if IPv6, clear if IPv4. */
+#define BNXT_PTYPE_TBL_IP_VER_MSK	BIT(BNXT_PTYPE_TBL_IP_VER_SFT)
+#define BNXT_PTYPE_TBL_VLAN_SFT		2 /* Set if VLAN encapsulated. */
+#define BNXT_PTYPE_TBL_VLAN_MSK		BIT(BNXT_PTYPE_TBL_VLAN_SFT)
+#define BNXT_PTYPE_TBL_TYPE_SFT		3 /* Hardware packet type field. */
+#define BNXT_PTYPE_TBL_TYPE_MSK		0x78 /* Hardware itype field mask. */
+#define BNXT_PTYPE_TBL_TYPE_IP		1
+#define BNXT_PTYPE_TBL_TYPE_TCP		2
+#define BNXT_PTYPE_TBL_TYPE_UDP		3
+#define BNXT_PTYPE_TBL_TYPE_ICMP	7
+
+#define RX_PKT_CMPL_FLAGS2_IP_TYPE_SFT	8
+#define CMPL_FLAGS2_VLAN_TUN_MSK \
+	(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN | RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)
+
+#define BNXT_CMPL_ITYPE_TO_IDX(ft) \
+	(((ft) & RX_PKT_CMPL_FLAGS_ITYPE_MASK) >> \
+	  (RX_PKT_CMPL_FLAGS_ITYPE_SFT - BNXT_PTYPE_TBL_TYPE_SFT))
+
+#define BNXT_CMPL_VLAN_TUN_TO_IDX(f2) \
+	(((f2) & CMPL_FLAGS2_VLAN_TUN_MSK) >> \
+	 (RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT - BNXT_PTYPE_TBL_VLAN_SFT))
+
+#define BNXT_CMPL_IP_VER_TO_IDX(f2) \
+	(((f2) & RX_PKT_CMPL_FLAGS2_IP_TYPE) >> \
+	 (RX_PKT_CMPL_FLAGS2_IP_TYPE_SFT - BNXT_PTYPE_TBL_IP_VER_SFT))
+
+static inline void
+bnxt_check_ptype_constants(void)
+{
+	RTE_BUILD_BUG_ON(BNXT_CMPL_ITYPE_TO_IDX(RX_PKT_CMPL_FLAGS_ITYPE_MASK) !=
+			 BNXT_PTYPE_TBL_TYPE_MSK);
+	RTE_BUILD_BUG_ON(BNXT_CMPL_VLAN_TUN_TO_IDX(CMPL_FLAGS2_VLAN_TUN_MSK) !=
+			 (BNXT_PTYPE_TBL_VLAN_MSK | BNXT_PTYPE_TBL_TUN_MSK));
+	RTE_BUILD_BUG_ON(BNXT_CMPL_IP_VER_TO_IDX(RX_PKT_CMPL_FLAGS2_IP_TYPE) !=
+			 BNXT_PTYPE_TBL_IP_VER_MSK);
+}
+
 extern uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
 
 /* Stingray2 specific code for RX completion parsing */
diff --git a/drivers/net/bnxt/bnxt_rxtx_vec_neon.c b/drivers/net/bnxt/bnxt_rxtx_vec_neon.c
index bc2e96ec38..a6fbc0b0bf 100644
--- a/drivers/net/bnxt/bnxt_rxtx_vec_neon.c
+++ b/drivers/net/bnxt/bnxt_rxtx_vec_neon.c
@@ -71,8 +71,7 @@ descs_to_mbufs(uint32x4_t mm_rxcmp[4], uint32x4_t mm_rxcmp1[4],
 	const uint32x4_t flags_type_mask =
 		vdupq_n_u32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
 	const uint32x4_t flags2_mask1 =
-		vdupq_n_u32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
-			    RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC);
+		vdupq_n_u32(CMPL_FLAGS2_VLAN_TUN_MSK);
 	const uint32x4_t flags2_mask2 =
 		vdupq_n_u32(RX_PKT_CMPL_FLAGS2_IP_TYPE);
 	const uint32x4_t rss_mask =
@@ -84,14 +83,18 @@ descs_to_mbufs(uint32x4_t mm_rxcmp[4], uint32x4_t mm_rxcmp1[4],
 	uint64x2_t t0, t1;
 	uint32_t ol_flags;
 
+	/* Validate ptype table indexing at build time. */
+	bnxt_check_ptype_constants();
+
 	/* Compute packet type table indexes for four packets */
 	t0 = vreinterpretq_u64_u32(vzip1q_u32(mm_rxcmp[0], mm_rxcmp[1]));
 	t1 = vreinterpretq_u64_u32(vzip1q_u32(mm_rxcmp[2], mm_rxcmp[3]));
 
 	flags_type = vreinterpretq_u32_u64(vcombine_u64(vget_low_u64(t0),
 							vget_low_u64(t1)));
-	ptype_idx =
-		vshrq_n_u32(vandq_u32(flags_type, flags_type_mask), 9);
+	ptype_idx = vshrq_n_u32(vandq_u32(flags_type, flags_type_mask),
+				RX_PKT_CMPL_FLAGS_ITYPE_SFT -
+				BNXT_PTYPE_TBL_TYPE_SFT);
 
 	t0 = vreinterpretq_u64_u32(vzip1q_u32(mm_rxcmp1[0], mm_rxcmp1[1]));
 	t1 = vreinterpretq_u64_u32(vzip1q_u32(mm_rxcmp1[2], mm_rxcmp1[3]));
@@ -100,9 +103,13 @@ descs_to_mbufs(uint32x4_t mm_rxcmp[4], uint32x4_t mm_rxcmp1[4],
 						    vget_low_u64(t1)));
 
 	ptype_idx = vorrq_u32(ptype_idx,
-			vshrq_n_u32(vandq_u32(flags2, flags2_mask1), 2));
+			vshrq_n_u32(vandq_u32(flags2, flags2_mask1),
+				    RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT -
+				    BNXT_PTYPE_TBL_VLAN_SFT));
 	ptype_idx = vorrq_u32(ptype_idx,
-			vshrq_n_u32(vandq_u32(flags2, flags2_mask2), 7));
+			vshrq_n_u32(vandq_u32(flags2, flags2_mask2),
+				    RX_PKT_CMPL_FLAGS2_IP_TYPE_SFT -
+				    BNXT_PTYPE_TBL_IP_VER_SFT));
 
 	/* Extract RSS valid flags for four packets. */
 	rss_flags = vshrq_n_u32(vandq_u32(flags_type, rss_mask), 9);
diff --git a/drivers/net/bnxt/bnxt_rxtx_vec_sse.c b/drivers/net/bnxt/bnxt_rxtx_vec_sse.c
index 7ec04797b7..6dd18a0077 100644
--- a/drivers/net/bnxt/bnxt_rxtx_vec_sse.c
+++ b/drivers/net/bnxt/bnxt_rxtx_vec_sse.c
@@ -66,8 +66,7 @@ descs_to_mbufs(__m128i mm_rxcmp[4], __m128i mm_rxcmp1[4],
 	const __m128i flags_type_mask =
 		_mm_set1_epi32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
 	const __m128i flags2_mask1 =
-		_mm_set1_epi32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN |
-			       RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC);
+		_mm_set1_epi32(CMPL_FLAGS2_VLAN_TUN_MSK);
 	const __m128i flags2_mask2 =
 		_mm_set1_epi32(RX_PKT_CMPL_FLAGS2_IP_TYPE);
 	const __m128i rss_mask =
@@ -76,21 +75,28 @@ descs_to_mbufs(__m128i mm_rxcmp[4], __m128i mm_rxcmp1[4],
 	__m128i ptype_idx, is_tunnel;
 	uint32_t ol_flags;
 
+	/* Validate ptype table indexing at build time. */
+	bnxt_check_ptype_constants();
+
 	/* Compute packet type table indexes for four packets */
 	t0 = _mm_unpacklo_epi32(mm_rxcmp[0], mm_rxcmp[1]);
 	t1 = _mm_unpacklo_epi32(mm_rxcmp[2], mm_rxcmp[3]);
 	flags_type = _mm_unpacklo_epi64(t0, t1);
-	ptype_idx =
-		_mm_srli_epi32(_mm_and_si128(flags_type, flags_type_mask), 9);
+	ptype_idx = _mm_srli_epi32(_mm_and_si128(flags_type, flags_type_mask),
+			RX_PKT_CMPL_FLAGS_ITYPE_SFT - BNXT_PTYPE_TBL_TYPE_SFT);
 
 	t0 = _mm_unpacklo_epi32(mm_rxcmp1[0], mm_rxcmp1[1]);
 	t1 = _mm_unpacklo_epi32(mm_rxcmp1[2], mm_rxcmp1[3]);
 	flags2 = _mm_unpacklo_epi64(t0, t1);
 
 	ptype_idx = _mm_or_si128(ptype_idx,
-			_mm_srli_epi32(_mm_and_si128(flags2, flags2_mask1), 2));
+			_mm_srli_epi32(_mm_and_si128(flags2, flags2_mask1),
+				       RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT -
+				       BNXT_PTYPE_TBL_VLAN_SFT));
 	ptype_idx = _mm_or_si128(ptype_idx,
-			_mm_srli_epi32(_mm_and_si128(flags2, flags2_mask2), 7));
+			_mm_srli_epi32(_mm_and_si128(flags2, flags2_mask2),
+				       RX_PKT_CMPL_FLAGS2_IP_TYPE_SFT -
+				       BNXT_PTYPE_TBL_IP_VER_SFT));
 
 	/* Extract RSS valid flags for four packets. */
 	rss_flags = _mm_srli_epi32(_mm_and_si128(flags_type, rss_mask), 9);
-- 
2.25.1


  reply	other threads:[~2021-05-24 19:00 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-24 18:59 [dpdk-dev] [PATCH 0/3] net/bnxt: vector mode patches Lance Richardson
2021-05-24 18:59 ` Lance Richardson [this message]
2021-05-24 18:59 ` [dpdk-dev] [PATCH 2/3] net/bnxt: fix Rx burst size constraint Lance Richardson
2021-05-24 18:59 ` [dpdk-dev] [PATCH 3/3] net/bnxt: add AVX2 vector PMD Lance Richardson
2021-05-26 18:33   ` Lance Richardson
2021-06-07 21:36 ` [dpdk-dev] [PATCH 0/3] net/bnxt: vector mode patches Ajit Khaparde

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