From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C7CF8A0524; Mon, 31 May 2021 23:43:46 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A4D84410F8; Mon, 31 May 2021 23:42:39 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 440484114F for ; Mon, 31 May 2021 23:42:38 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 14VLeW7Z002881; Mon, 31 May 2021 14:42:36 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=DcEcDgI1RqdeloFneLxw6joSkIaRBYEJ3eS6DjtNir8=; b=gsUSe95OBeh411YbhiHT05a2/nH8w06mYYzIQqQzbB3wkronYFTC2qi8qnLmB0hoKvKe jrC+fR4O9zuQJ2IImnThfozqNj+yQjv8MpUGR7MGQgUbrhewZQ3Vv13iOQzkrSDVKfUj ZF0AD+p53aT5ypftGIe0INc9Ho7KcZtetgHva9plzEWCexJYAbSBuZiQhzQeMZR/12Vj 8RiecbC2mB0Tzp7SSivVnYavk4jlfV0Zz/gj6nsnCOqsgMcfLiQnMDkV66lL6c0w3J+/ Q1ptQMCrP21Hz788viUg48WcpvW9fjez+ZKg0B3FiYJU/IAsbxoY+/m6iAjeTuQaZMKn 8A== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 38vtnja13g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 31 May 2021 14:42:36 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 May 2021 14:42:34 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 31 May 2021 14:42:34 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id 01ACD3F7040; Mon, 31 May 2021 14:42:31 -0700 (PDT) From: Tomasz Duszynski To: CC: , , Tomasz Duszynski , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao , Ray Kinsella , Neil Horman Date: Mon, 31 May 2021 23:41:32 +0200 Message-ID: <20210531214142.30167-19-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210531214142.30167-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: hvc8d8ct1TN2YlPuecapWgz9inn-c3k0 X-Proofpoint-ORIG-GUID: hvc8d8ct1TN2YlPuecapWgz9inn-c3k0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-31_15:2021-05-31, 2021-05-31 signatures=0 Subject: [dpdk-dev] [PATCH 18/28] common/cnxk: add support for retrieving irq stack X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for retrieving irq stack. If stack does not exist then it gets created. Signed-off-by: Jakub Palider Signed-off-by: Tomasz Duszynski --- drivers/common/cnxk/roc_bphy_irq.c | 62 ++++++++++++++++++++++++++++++ drivers/common/cnxk/roc_bphy_irq.h | 1 + drivers/common/cnxk/version.map | 1 + 3 files changed, 64 insertions(+) diff --git a/drivers/common/cnxk/roc_bphy_irq.c b/drivers/common/cnxk/roc_bphy_irq.c index bea2b7f73..04ad129ac 100644 --- a/drivers/common/cnxk/roc_bphy_irq.c +++ b/drivers/common/cnxk/roc_bphy_irq.c @@ -2,12 +2,21 @@ * Copyright(C) 2021 Marvell. */ #include +#include #include +#include #include #include "roc_api.h" #include "roc_bphy_irq.h" +struct roc_bphy_irq_stack { + STAILQ_ENTRY(roc_bphy_irq_stack) entries; + void *sp_buffer; + int cpu; + int inuse; +}; + #define ROC_BPHY_MEMZONE_NAME "roc_bphy_mz" #define ROC_BPHY_CTR_DEV_PATH "/dev/otx-bphy-ctr" @@ -15,6 +24,12 @@ #define ROC_BPHY_IOC_GET_BPHY_MAX_IRQ _IOR(ROC_BPHY_IOC_MAGIC, 3, uint64_t) #define ROC_BPHY_IOC_GET_BPHY_BMASK_IRQ _IOR(ROC_BPHY_IOC_MAGIC, 4, uint64_t) +static STAILQ_HEAD(slisthead, roc_bphy_irq_stack) + irq_stacks = STAILQ_HEAD_INITIALIZER(irq_stacks); + +/* Note: it is assumed that as for now there is no multiprocess support */ +static pthread_mutex_t stacks_mutex = PTHREAD_MUTEX_INITIALIZER; + struct roc_bphy_irq_chip * roc_bphy_intr_init(void) { @@ -95,6 +110,53 @@ roc_bphy_intr_fini(struct roc_bphy_irq_chip *irq_chip) plt_free(irq_chip); } +void * +roc_bphy_irq_stack_get(int cpu) +{ +#define ARM_STACK_ALIGNMENT (2 * sizeof(void *)) +#define IRQ_ISR_STACK_SIZE 0x200000 + + struct roc_bphy_irq_stack *curr_stack; + void *retval = NULL; + + if (pthread_mutex_lock(&stacks_mutex)) + return NULL; + + STAILQ_FOREACH(curr_stack, &irq_stacks, entries) { + if (curr_stack->cpu == cpu) { + curr_stack->inuse++; + retval = ((char *)curr_stack->sp_buffer) + + IRQ_ISR_STACK_SIZE; + goto found_stack; + } + } + + curr_stack = plt_zmalloc(sizeof(struct roc_bphy_irq_stack), 0); + if (curr_stack == NULL) + goto err_stack; + + curr_stack->sp_buffer = + plt_zmalloc(IRQ_ISR_STACK_SIZE * 2, ARM_STACK_ALIGNMENT); + if (curr_stack->sp_buffer == NULL) + goto err_buffer; + + curr_stack->cpu = cpu; + curr_stack->inuse = 0; + STAILQ_INSERT_TAIL(&irq_stacks, curr_stack, entries); + retval = ((char *)curr_stack->sp_buffer) + IRQ_ISR_STACK_SIZE; + +found_stack: + pthread_mutex_unlock(&stacks_mutex); + return retval; + +err_buffer: + plt_free(curr_stack); + +err_stack: + pthread_mutex_unlock(&stacks_mutex); + return NULL; +} + bool roc_bphy_intr_available(struct roc_bphy_irq_chip *irq_chip, int irq_num) { diff --git a/drivers/common/cnxk/roc_bphy_irq.h b/drivers/common/cnxk/roc_bphy_irq.h index f481f4456..e66b2aa7c 100644 --- a/drivers/common/cnxk/roc_bphy_irq.h +++ b/drivers/common/cnxk/roc_bphy_irq.h @@ -23,6 +23,7 @@ struct roc_bphy_irq_chip { __roc_api struct roc_bphy_irq_chip *roc_bphy_intr_init(void); __roc_api void roc_bphy_intr_fini(struct roc_bphy_irq_chip *irq_chip); +__roc_api void *roc_bphy_irq_stack_get(int cpu); __roc_api bool roc_bphy_intr_available(struct roc_bphy_irq_chip *irq_chip, int irq_num); diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 427321c41..542364926 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -25,6 +25,7 @@ INTERNAL { roc_bphy_intr_available; roc_bphy_intr_fini; roc_bphy_intr_init; + roc_bphy_irq_stack_get; roc_clk_freq_get; roc_error_msg_get; roc_idev_lmt_base_addr_get; -- 2.25.1