From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id ECF91A0C47; Tue, 15 Jun 2021 13:06:33 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BD9D6411C2; Tue, 15 Jun 2021 13:04:47 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 923C341151 for ; Tue, 15 Jun 2021 13:04:45 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15FB0ITH012319; Tue, 15 Jun 2021 04:04:45 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=GLfTZIpCNvxmhhJtr2vpmymQS801spB+dA+OiDo3i18=; b=GEfIyQ9CF1zKU3P175OAkUurK1PJdo5pyiHrlpkhFg9zPPnyB1KRkPTxAV+pzkp7CUqd T/xwjFtvN4tHgJHct5peNBT9CjPAcEpscKemP6s9dK//jMwKMVxKqbAEQi989/kwy+ko CTYwB1O1v9mU8v0Csm40G4JbFZKSL2kjPbVIGhVeTbejeZ9o870Je2WUXnhpsAnycl+Z GGl+JNQlQm6yBX83RkufGD/fr5PJOrs1cWE2SeA0hCN4lkMsKuRqE9zgrvGjplyhYURG 7Webunscprxq11suAUVCdEd6NEGeiQefq5+iXDNq/4q7WJQwFJ4vWaTr9/ZmNOuniV5V PQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 396tagr53t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 15 Jun 2021 04:04:44 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 15 Jun 2021 04:04:42 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 15 Jun 2021 04:04:42 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id 8AC833F708E; Tue, 15 Jun 2021 04:04:41 -0700 (PDT) From: Tomasz Duszynski To: Jakub Palider , Tomasz Duszynski , Anatoly Burakov CC: Date: Tue, 15 Jun 2021 13:03:36 +0200 Message-ID: <20210615110345.11057-24-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210615110345.11057-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> <20210615110345.11057-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: VCk2lJUM3q2tLvSN4872xDrQd0jll9N0 X-Proofpoint-GUID: VCk2lJUM3q2tLvSN4872xDrQd0jll9N0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-06-15_04:2021-06-14, 2021-06-15 signatures=0 Subject: [dpdk-dev] [PATCH v2 23/32] raw/cnxk_bphy: add baseband PHY skeleton driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add baseband phy skeleton driver. Baseband phy is a hardware subsystem accelerating 5G/LTE related tasks. Note this driver isn't involved into any sort baseband protocol processing. Instead it just provides means for configuring hardware. Signed-off-by: Jakub Palider Signed-off-by: Tomasz Duszynski --- doc/guides/rel_notes/release_21_08.rst | 6 ++ drivers/raw/cnxk_bphy/cnxk_bphy.c | 113 +++++++++++++++++++++++++ drivers/raw/cnxk_bphy/cnxk_bphy_irq.h | 23 +++++ drivers/raw/cnxk_bphy/meson.build | 1 + usertools/dpdk-devbind.py | 4 +- 5 files changed, 146 insertions(+), 1 deletion(-) create mode 100644 drivers/raw/cnxk_bphy/cnxk_bphy.c create mode 100644 drivers/raw/cnxk_bphy/cnxk_bphy_irq.h diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst index ae70e15d1..b3829bd30 100644 --- a/doc/guides/rel_notes/release_21_08.rst +++ b/doc/guides/rel_notes/release_21_08.rst @@ -62,6 +62,12 @@ New Features standard rawdev enq/deq operations. See the :doc:`../rawdevs/cnxk_bphy` rawdev guide for more details on this driver. + Added new Baseband phy PMD which provides means for configuring baseband hardware via + standard rawdev enq/deq operations. Baseband phy is a hardware subsystem accelerating + 5G/LTE related tasks. + + Both BPHY and BPHY CGX/RPM drivers are related hence kept together to ease maintenance. + Removed Items ------------- diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy.c b/drivers/raw/cnxk_bphy/cnxk_bphy.c new file mode 100644 index 000000000..cd26b9717 --- /dev/null +++ b/drivers/raw/cnxk_bphy/cnxk_bphy.c @@ -0,0 +1,113 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "cnxk_bphy_irq.h" + +static const struct rte_pci_id pci_bphy_map[] = { + {RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CNXK_BPHY)}, + { + .vendor_id = 0, + }, +}; + +static void +bphy_rawdev_get_name(char *name, struct rte_pci_device *pci_dev) +{ + snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "BPHY:%x:%02x.%x", + pci_dev->addr.bus, pci_dev->addr.devid, + pci_dev->addr.function); +} + +static const struct rte_rawdev_ops bphy_rawdev_ops = { +}; + +static int +bphy_rawdev_probe(struct rte_pci_driver *pci_drv, + struct rte_pci_device *pci_dev) +{ + struct bphy_device *bphy_dev = NULL; + char name[RTE_RAWDEV_NAME_MAX_LEN]; + struct rte_rawdev *bphy_rawdev; + int ret; + + RTE_SET_USED(pci_drv); + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return 0; + + if (!pci_dev->mem_resource[0].addr) { + plt_err("BARs have invalid values: BAR0 %p\n BAR2 %p", + pci_dev->mem_resource[0].addr, + pci_dev->mem_resource[2].addr); + return -ENODEV; + } + + ret = roc_plt_init(); + if (ret) + return ret; + + bphy_rawdev_get_name(name, pci_dev); + bphy_rawdev = rte_rawdev_pmd_allocate(name, sizeof(*bphy_dev), + rte_socket_id()); + if (bphy_rawdev == NULL) { + plt_err("Failed to allocate rawdev"); + return -ENOMEM; + } + + bphy_rawdev->dev_ops = &bphy_rawdev_ops; + bphy_rawdev->device = &pci_dev->device; + bphy_rawdev->driver_name = pci_dev->driver->driver.name; + + bphy_dev = (struct bphy_device *)bphy_rawdev->dev_private; + bphy_dev->mem.res0 = pci_dev->mem_resource[0]; + bphy_dev->mem.res2 = pci_dev->mem_resource[2]; + + return 0; +} + +static int +bphy_rawdev_remove(struct rte_pci_device *pci_dev) +{ + char name[RTE_RAWDEV_NAME_MAX_LEN]; + struct rte_rawdev *rawdev; + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return 0; + + if (pci_dev == NULL) { + plt_err("invalid pci_dev"); + return -EINVAL; + } + + rawdev = rte_rawdev_pmd_get_named_dev(name); + if (rawdev == NULL) { + plt_err("invalid device name (%s)", name); + return -EINVAL; + } + + bphy_rawdev_get_name(name, pci_dev); + + return rte_rawdev_pmd_release(rawdev); +} + +static struct rte_pci_driver cnxk_bphy_rawdev_pmd = { + .id_table = pci_bphy_map, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA, + .probe = bphy_rawdev_probe, + .remove = bphy_rawdev_remove, +}; + +RTE_PMD_REGISTER_PCI(bphy_rawdev_pci_driver, cnxk_bphy_rawdev_pmd); +RTE_PMD_REGISTER_PCI_TABLE(bphy_rawdev_pci_driver, pci_bphy_map); +RTE_PMD_REGISTER_KMOD_DEP(bphy_rawdev_pci_driver, "vfio-pci"); diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h new file mode 100644 index 000000000..77169b1b7 --- /dev/null +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef _CNXK_BPHY_IRQ_ +#define _CNXK_BPHY_IRQ_ + +#include +#include + +#include + +struct bphy_mem { + struct rte_mem_resource res0; + struct rte_mem_resource res2; +}; + +struct bphy_device { + struct roc_bphy_irq_chip *irq_chip; + struct bphy_mem mem; +}; + +#endif /* _CNXK_BPHY_IRQ_ */ diff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build index dc5558ee8..f2868fd68 100644 --- a/drivers/raw/cnxk_bphy/meson.build +++ b/drivers/raw/cnxk_bphy/meson.build @@ -4,6 +4,7 @@ deps += ['bus_pci', 'common_cnxk', 'rawdev'] sources = files( + 'cnxk_bphy.c', 'cnxk_bphy_cgx.c', 'cnxk_bphy_cgx_test.c', ) diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py index 55a73961d..74d16e4c4 100755 --- a/usertools/dpdk-devbind.py +++ b/usertools/dpdk-devbind.py @@ -45,6 +45,8 @@ 'SVendor': None, 'SDevice': None} octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4', 'SVendor': None, 'SDevice': None} +cnxk_bphy = {'Class': '08', 'Vendor': '177d', 'Device': 'a089', + 'SVendor': None, 'SDevice': None} cnxk_bphy_cgx = {'Class': '08', 'Vendor': '177d', 'Device': 'a059,a060', 'SVendor': None, 'SDevice': None} @@ -71,7 +73,7 @@ mempool_devices = [cavium_fpa, octeontx2_npa] compress_devices = [cavium_zip] regex_devices = [octeontx2_ree] -misc_devices = [cnxk_bphy_cgx, intel_ioat_bdw, intel_ioat_skx, intel_ioat_icx, intel_idxd_spr, +misc_devices = [cnxk_bphy, cnxk_bphy_cgx, intel_ioat_bdw, intel_ioat_skx, intel_ioat_icx, intel_idxd_spr, intel_ntb_skx, intel_ntb_icx, octeontx2_dma] -- 2.25.1