From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F2915A0C45; Wed, 16 Jun 2021 06:11:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F34274114E; Wed, 16 Jun 2021 06:10:18 +0200 (CEST) Received: from NAM04-MW2-obe.outbound.protection.outlook.com (mail-mw2nam08on2055.outbound.protection.outlook.com [40.107.101.55]) by mails.dpdk.org (Postfix) with ESMTP id 60DF341144 for ; Wed, 16 Jun 2021 06:10:17 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=DirR2iGjiq7G3RQ7zUvcsn4dY1ka4U+zD5NQVy13DitnQHrWvVjV8NFv0l/YbceUOLnZGLY0DSqlg9XbjhHEtKfPFajjVeF+i6W1Ccu2dQrbmLEJtFPKYvpDA5Z+I8YQ1SV9w1q9zvJCkEzZxRrTf8xLxMQVFRVm8sol9jeRSZY2wHcwQhwbcznPXKXMV5/IesNjdI93YnxadfID47IBCAtboE/B90cnKz1ZFC/A4jb/7YZOt0/D8TG4oQt5WzTxlIuLKOH3f29q2r+zh0+aqvmrLqLycmiAQFRdXe6qD2NOPo2E/WV/HC2R5nOQhDk24TO5MdX/4ax1qKbK424lCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=c9AC4tVhXTa2eaArjvrf7KvQEicCOI8AstYFzRVQujk=; b=a/mH3Ieh26SKrgLKbdrhCPnnYayj++ylDivCs5oX8mh8oG3qWAxU+059idxwTm+A6Ftx3O0ZVJTKssNitTpTSHlorlSCV0GR8ga7pyayycZM8815suYkho8WMLF/LpL9tovLj9g4oR09U+Gz8ry17bEGIhD8i6IkOhFvtJyo1WQhoiwAGIXO3oGqhRVqmXzU0a2+JOrBpgwL+0qBsGJshbrgfipjtZ2FHpptdkT1HKNYwKIgd9cR9vVhbJBd9pJfaUsZEgx2OSTS29Rn2CKl03FRVQYqhPZvTBgk8EKdr7PHFuiqYf9Nm7PCJQdElmtT0DZ2pOn5DBpmJF994pd2JA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=c9AC4tVhXTa2eaArjvrf7KvQEicCOI8AstYFzRVQujk=; b=KizVWV5IqGBfR6AawCq61XcPHwSJ/K4SpIvzkRN8i0RCl9MUXeoR9Ua2B6Qrz89vLRbdEq6qoaJ6wxZs+SAWh+vISEqKEliI2v6lhLjayEjrmYXseZ1L+O31qxjHhtDVq49FTemNaA4QTUO16CY1uA59d35/Xz7Pf7kbwv6EGcDEgW2xoa7cg3fndNWOb2Gh5wGnXgiDWN8Xidqz7tuOGXSO5GCE/pRxbLzEOf2pcJZJUL2z1eH8bthpk13fVC9Sh4WzPZ2TcxBZfRYOCnzo8fKc4ngu8MmC0LaZGzVflSJoTS5QUBqKwIAZdGc91Gg3Zxxk9Errj3sWNz6orZVBuQ== Received: from BN0PR04CA0094.namprd04.prod.outlook.com (2603:10b6:408:ec::9) by DM6PR12MB4894.namprd12.prod.outlook.com (2603:10b6:5:209::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4242.16; Wed, 16 Jun 2021 04:10:14 +0000 Received: from BN8NAM11FT049.eop-nam11.prod.protection.outlook.com (2603:10b6:408:ec:cafe::72) by BN0PR04CA0094.outlook.office365.com (2603:10b6:408:ec::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4219.20 via Frontend Transport; Wed, 16 Jun 2021 04:10:14 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT049.mail.protection.outlook.com (10.13.177.157) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4242.16 via Frontend Transport; Wed, 16 Jun 2021 04:10:14 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 16 Jun 2021 04:10:09 +0000 From: Xueming Li To: Viacheslav Ovsiienko CC: Thomas Monjalon , , , Matan Azrad Date: Wed, 16 Jun 2021 07:09:32 +0300 Message-ID: <20210616040935.311733-12-xuemingl@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210527133759.17401-2-xuemingl@nvidia.com> References: <20210527133759.17401-2-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7d2e04de-9e42-4eec-f9b7-08d9307ca4ca X-MS-TrafficTypeDiagnostic: DM6PR12MB4894: X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1850; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Ft+W6PmmHjRPjnxv9G3yHkzxre62kNRAT+zv2tZCv8meMWFUYc6u3BFzcyO7JIewytCi3W2LrxNxyEZS9KhST9csxexjv6QyPhbxI8kI4zddRgtJA1Y7c/xxCOC79QlAClIGnvIuDiDuJitsmIjuo2E7RbH17TVNSMeYcWBuzQXWJA/NG4xT8k+7xG7zGhC3fpJh5+L4pciiv/jx2WJQOONVF8Hx985i23OoRFz1LO+Kk53XyFylvrKghjg5vQZC6n3O0vt6cz6gKuaa9+PkkDcaLQPDasAukF8TM0gCjIFNczUnaRlLtObnyi94LiVlS25BtNC/5qvWQTX8bse5nO78rr9eSUPLpLL0e87qyqI2l1DMTnyF3AWvHiKr1HHdxJF1iT53S2FwEKNFPFeMxOT19o1K6Bq6sZ1gJkt7KPkSQOSp5d6UMAZs3LephtMXVWM/EwAc67xdZhk44T2B7JyTYoEG77umoCjL7c3DdBPjigia9o/yRyWHjRi1CC13IlHKjf7ah3cIEuxBJVN04X9brqqP1XL9Xl8RqdF6sg3+Pv7mYp1/tPX9jQCIp6uf9ElkQwNbJOiI1ITBEIMfD+ytacUMRNWNxof5Iqbehm+70xZKfKs06CAJgzMtdqK9GrGCOaU28t9ROkumxfDv7A== X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(136003)(346002)(39860400002)(396003)(376002)(36840700001)(46966006)(7636003)(70586007)(55016002)(82740400003)(186003)(16526019)(478600001)(6666004)(2906002)(356005)(8936002)(36906005)(8676002)(82310400003)(336012)(36756003)(426003)(1076003)(5660300002)(7696005)(47076005)(6636002)(6862004)(316002)(36860700001)(83380400001)(70206006)(86362001)(54906003)(37006003)(26005)(4326008)(2616005)(107886003)(6286002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jun 2021 04:10:14.6200 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d2e04de-9e42-4eec-f9b7-08d9307ca4ca X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4894 Subject: [dpdk-dev] [PATCH v1 11/14] vdpa/mlx5: remove PCI specifics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Thomas Monjalon Removes PCI specific driver, replaces with common class driver. Signed-off-by: Thomas Monjalon --- drivers/vdpa/mlx5/mlx5_vdpa.c | 119 ++++++++++------------------------ drivers/vdpa/mlx5/mlx5_vdpa.h | 1 - 2 files changed, 34 insertions(+), 86 deletions(-) diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c index 5ab7c525c2..9c9a552ba0 100644 --- a/drivers/vdpa/mlx5/mlx5_vdpa.c +++ b/drivers/vdpa/mlx5/mlx5_vdpa.c @@ -11,12 +11,11 @@ #include #include #include -#include #include +#include #include #include -#include #include #include #include @@ -552,34 +551,13 @@ mlx5_vdpa_sys_roce_disable(const char *addr) } static int -mlx5_vdpa_roce_disable(struct rte_pci_addr *addr, struct ibv_device **ibv) +mlx5_vdpa_roce_disable(struct rte_device *dev) { - char addr_name[64] = {0}; - - rte_pci_device_name(addr, addr_name, sizeof(addr_name)); /* Firstly try to disable ROCE by Netlink and fallback to sysfs. */ - if (mlx5_vdpa_nl_roce_disable(addr_name) == 0 || - mlx5_vdpa_sys_roce_disable(addr_name) == 0) { - /* - * Succeed to disable ROCE, wait for the IB device to appear - * again after reload. - */ - int r; - struct ibv_device *ibv_new; - - for (r = MLX5_VDPA_MAX_RETRIES; r; r--) { - ibv_new = mlx5_os_get_ibv_device(addr); - if (ibv_new) { - *ibv = ibv_new; - return 0; - } - usleep(MLX5_VDPA_USEC); - } - DRV_LOG(ERR, "Cannot much device %s after ROCE disable, " - "retries exceed %d", addr_name, MLX5_VDPA_MAX_RETRIES); - rte_errno = EAGAIN; - } - return -rte_errno; + if (mlx5_vdpa_nl_roce_disable(dev->name) != 0 && + mlx5_vdpa_sys_roce_disable(dev->name) != 0) + return -rte_errno; + return 0; } static int @@ -647,44 +625,33 @@ mlx5_vdpa_config_get(struct rte_devargs *devargs, struct mlx5_vdpa_priv *priv) DRV_LOG(DEBUG, "no traffic max is %u.", priv->no_traffic_max); } -/** - * DPDK callback to register a mlx5 PCI device. - * - * This function spawns vdpa device out of a given PCI device. - * - * @param[in] pci_drv - * PCI driver structure (mlx5_vpda_driver). - * @param[in] pci_dev - * PCI device information. - * - * @return - * 0 on success, 1 to skip this driver, a negative errno value otherwise - * and rte_errno is set. - */ static int -mlx5_vdpa_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, - struct rte_pci_device *pci_dev __rte_unused) +mlx5_vdpa_dev_probe(struct rte_device *dev) { struct ibv_device *ibv; struct mlx5_vdpa_priv *priv = NULL; struct ibv_context *ctx = NULL; struct mlx5_hca_attr attr; + int retry; int ret; - ibv = mlx5_os_get_ibv_device(&pci_dev->addr); - if (!ibv) { - DRV_LOG(ERR, "No matching IB device for PCI slot " - PCI_PRI_FMT ".", pci_dev->addr.domain, - pci_dev->addr.bus, pci_dev->addr.devid, - pci_dev->addr.function); + if (mlx5_vdpa_roce_disable(dev) != 0) { + DRV_LOG(WARNING, "Failed to disable ROCE for \"%s\".", + dev->name); return -rte_errno; - } else { - DRV_LOG(INFO, "PCI information matches for device \"%s\".", - ibv->name); } - if (mlx5_vdpa_roce_disable(&pci_dev->addr, &ibv) != 0) { - DRV_LOG(WARNING, "Failed to disable ROCE for \"%s\".", - ibv->name); + /* Wait for the IB device to appear again after reload. */ + for (retry = MLX5_VDPA_MAX_RETRIES; retry > 0; --retry) { + ibv = mlx5_os_get_ibv_dev(dev); + if (ibv != NULL) + break; + usleep(MLX5_VDPA_USEC); + } + if (ibv == NULL) { + DRV_LOG(ERR, "Cannot get IB device after disabling RoCE for " + "\"%s\", retries exceed %d.", + dev->name, MLX5_VDPA_MAX_RETRIES); + rte_errno = EAGAIN; return -rte_errno; } ctx = mlx5_glue->dv_open_device(ibv); @@ -722,20 +689,18 @@ mlx5_vdpa_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, if (attr.num_lag_ports == 0) priv->num_lag_ports = 1; priv->ctx = ctx; - priv->pci_dev = pci_dev; priv->var = mlx5_glue->dv_alloc_var(ctx, 0); if (!priv->var) { DRV_LOG(ERR, "Failed to allocate VAR %u.", errno); goto error; } - priv->vdev = rte_vdpa_register_device(&pci_dev->device, - &mlx5_vdpa_ops); + priv->vdev = rte_vdpa_register_device(dev, &mlx5_vdpa_ops); if (priv->vdev == NULL) { DRV_LOG(ERR, "Failed to register vDPA device."); rte_errno = rte_errno ? rte_errno : EINVAL; goto error; } - mlx5_vdpa_config_get(pci_dev->device.devargs, priv); + mlx5_vdpa_config_get(dev->devargs, priv); SLIST_INIT(&priv->mr_list); pthread_mutex_init(&priv->vq_config_lock, NULL); pthread_mutex_lock(&priv_list_lock); @@ -754,26 +719,15 @@ mlx5_vdpa_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, return -rte_errno; } -/** - * DPDK callback to remove a PCI device. - * - * This function removes all vDPA devices belong to a given PCI device. - * - * @param[in] pci_dev - * Pointer to the PCI device. - * - * @return - * 0 on success, the function cannot fail. - */ static int -mlx5_vdpa_pci_remove(struct rte_pci_device *pci_dev) +mlx5_vdpa_dev_remove(struct rte_device *dev) { struct mlx5_vdpa_priv *priv = NULL; int found = 0; pthread_mutex_lock(&priv_list_lock); TAILQ_FOREACH(priv, &priv_list, next) { - if (!rte_pci_addr_cmp(&priv->pci_dev->addr, &pci_dev->addr)) { + if (priv->vdev->device == dev) { found = 1; break; } @@ -831,17 +785,12 @@ static const struct rte_pci_id mlx5_vdpa_pci_id_map[] = { } }; -static struct mlx5_pci_driver mlx5_vdpa_driver = { - .driver_class = MLX5_CLASS_VDPA, - .pci_driver = { - .driver = { - .name = RTE_STR(MLX5_VDPA_DRIVER_NAME), - }, - .id_table = mlx5_vdpa_pci_id_map, - .probe = mlx5_vdpa_pci_probe, - .remove = mlx5_vdpa_pci_remove, - .drv_flags = 0, - }, +static struct mlx5_class_driver mlx5_vdpa_driver = { + .drv_class = MLX5_CLASS_VDPA, + .name = RTE_STR(MLX5_VDPA_DRIVER_NAME), + .id_table = mlx5_vdpa_pci_id_map, + .probe = mlx5_vdpa_dev_probe, + .remove = mlx5_vdpa_dev_remove, }; RTE_LOG_REGISTER_DEFAULT(mlx5_vdpa_logtype, NOTICE) @@ -853,7 +802,7 @@ RTE_INIT(rte_mlx5_vdpa_init) { mlx5_common_init(); if (mlx5_glue) - mlx5_pci_driver_register(&mlx5_vdpa_driver); + mlx5_class_driver_register(&mlx5_vdpa_driver); } RTE_PMD_EXPORT_NAME(MLX5_VDPA_DRIVER_NAME, __COUNTER__); diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.h b/drivers/vdpa/mlx5/mlx5_vdpa.h index 722c72b65e..2a04e36607 100644 --- a/drivers/vdpa/mlx5/mlx5_vdpa.h +++ b/drivers/vdpa/mlx5/mlx5_vdpa.h @@ -133,7 +133,6 @@ struct mlx5_vdpa_priv { struct rte_vdpa_device *vdev; /* vDPA device. */ int vid; /* vhost device id. */ struct ibv_context *ctx; /* Device context. */ - struct rte_pci_device *pci_dev; struct mlx5_hca_vdpa_attr caps; uint32_t pdn; /* Protection Domain number. */ struct ibv_pd *pd; -- 2.25.1