From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4B6A7A0C43; Wed, 16 Jun 2021 20:09:50 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 35B29410E6; Wed, 16 Jun 2021 20:09:50 +0200 (CEST) Received: from mail-pg1-f182.google.com (mail-pg1-f182.google.com [209.85.215.182]) by mails.dpdk.org (Postfix) with ESMTP id B2AE24067A for ; Wed, 16 Jun 2021 20:09:48 +0200 (CEST) Received: by mail-pg1-f182.google.com with SMTP id e22so2631286pgv.10 for ; Wed, 16 Jun 2021 11:09:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version; bh=DJJmNkp01eybprGku2T+U6t6IIKzLJhdgJ2dAzOElaQ=; b=HjlXxxS1ArgWzuDmY8i7UWzBEljnxikqQKWtJlf6F70rm+KuI9fU1/f5UVvxSDQH3l zdyLmy/yKtThM1fL8bz5SySxiMQtFZakodWSiCptHVu0PhUOtnTqKv36hQnVEU3OpM3H QSu4gDvnYp0t6M35JqkcilFCNESiO1P6dKIsc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version; bh=DJJmNkp01eybprGku2T+U6t6IIKzLJhdgJ2dAzOElaQ=; b=F4o22WRgdb18NDJcXdepsiD/dlwAUwXI3wABSoEBXF3htOAKwIhSRfxav1TrnQO1t4 e06JhB1mhFnaq/7D1DK5pK4uenfOJQ8aPlvHf24xTyKeWtif5CqJrGamQdE8b8rOocI6 yx+kE8PaVbI+hUKvNAOleCMu+OLYVPaDOXyFTn+6vNuqiwM81IjarV/3rgAXM6DUS3ro yLz0EABHZzy0X2i3W7LfQX5A7/lQoFZR+X/IDF1QEaAEnKJIccMBO8b8AMN0bq1ryr+r 4PZWU/q6hIXPhO6crAJtF7Scf4YNc/p5NslJrWSV4z4fyWWb8cS+cGS8x+L+WmNOYAW2 HOkg== X-Gm-Message-State: AOAM530m8Xk1fiZkwoxEoE4YYi6Cvho4i+VAGalFujO0HzspJ8bu0N3Y X9xD0zhqdCzUxKKw40xIg8nMNA== X-Google-Smtp-Source: ABdhPJyihKnYrqL5uFY2H7IqYHumZ7/Ad73vEM3sWSS/kXMmpiXYMVS72D9G5PtJq/WrzVyWBIkcOw== X-Received: by 2002:a65:6802:: with SMTP id l2mr891144pgt.132.1623866987897; Wed, 16 Jun 2021 11:09:47 -0700 (PDT) Received: from lrichardson-VirtualBox.dhcp.broadcom.net ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id q4sm2951401pfh.18.2021.06.16.11.09.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Jun 2021 11:09:47 -0700 (PDT) From: Lance Richardson To: Ajit Khaparde , Somnath Kotur Cc: dev@dpdk.org, stable@dpdk.org Date: Wed, 16 Jun 2021 13:55:21 -0400 Message-Id: <20210616175523.930678-3-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210616175523.930678-1-lance.richardson@broadcom.com> References: <20210616175523.930678-1-lance.richardson@broadcom.com> MIME-Version: 1.0 Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="000000000000fea3d005c4e5fe2a" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: [dpdk-dev] [PATCH 2/4] net/bnxt: fix tx desc status implementation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" --000000000000fea3d005c4e5fe2a Content-Transfer-Encoding: 8bit With tx completion batching, a single transmit completion can correspond to one or more transmit descriptors, adjust implementation to account for this. RTE_ETH_TX_DESC_DONE should be returned for descriptors that are available for use instead of RTE_ETH_TX_DESC_UNAVAIL. Fixes: 5735eb241947 ("net/bnxt: support Tx batching") Fixes: 478ed3bb7b9d "(net/bnxt: support Tx descriptor status") Cc: stable@dpdk.org Signed-off-by: Lance Richardson Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt_ethdev.c | 54 +++++++++++++++++++--------------- 1 file changed, 31 insertions(+), 23 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index d4b8762d5..a4a0142e8 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -3296,41 +3296,49 @@ static int bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset) { struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue; - struct bnxt_tx_ring_info *txr; - struct bnxt_cp_ring_info *cpr; - struct rte_mbuf **tx_buf; - struct tx_pkt_cmpl *txcmp; - uint32_t cons, cp_cons; + struct bnxt_cp_ring_info *cpr = txq->cp_ring; + uint32_t ring_mask, raw_cons, nb_tx_pkts = 0; + struct bnxt_ring *cp_ring_struct; + struct cmpl_base *cp_desc_ring; int rc; - if (!txq) - return -EINVAL; - rc = is_bnxt_in_error(txq->bp); if (rc) return rc; - cpr = txq->cp_ring; - txr = txq->tx_ring; - if (offset >= txq->nb_tx_desc) return -EINVAL; - cons = RING_CMP(cpr->cp_ring_struct, offset); - txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; - cp_cons = cpr->cp_raw_cons; + /* Return "desc done" if descriptor is available for use. */ + if (bnxt_tx_bds_in_hw(txq) <= offset) + return RTE_ETH_TX_DESC_DONE; - if (cons > cp_cons) { - if (CMPL_VALID(txcmp, cpr->valid)) - return RTE_ETH_TX_DESC_UNAVAIL; - } else { - if (CMPL_VALID(txcmp, !cpr->valid)) - return RTE_ETH_TX_DESC_UNAVAIL; + raw_cons = cpr->cp_raw_cons; + cp_desc_ring = cpr->cp_desc_ring; + cp_ring_struct = cpr->cp_ring_struct; + ring_mask = cpr->cp_ring_struct->ring_mask; + + /* Check to see if hw has posted a completion for the descriptor. */ + while (1) { + struct tx_cmpl *txcmp; + uint32_t cons; + + cons = RING_CMPL(ring_mask, raw_cons); + txcmp = (struct tx_cmpl *)&cp_desc_ring[cons]; + + if (!CMP_VALID(txcmp, raw_cons, cp_ring_struct)) + break; + + if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2) + nb_tx_pkts += rte_le_to_cpu_32(txcmp->opaque); + + if (nb_tx_pkts > offset) + return RTE_ETH_TX_DESC_DONE; + + raw_cons = NEXT_RAW_CMP(raw_cons); } - tx_buf = &txr->tx_buf_ring[cons]; - if (*tx_buf == NULL) - return RTE_ETH_TX_DESC_DONE; + /* Descriptor is pending transmit, not yet completed by hardware. */ return RTE_ETH_TX_DESC_FULL; } -- 2.25.1 --000000000000fea3d005c4e5fe2a--