From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5347CA0547; Mon, 21 Jun 2021 17:08:18 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7BB73411D7; Mon, 21 Jun 2021 17:06:16 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id B49964124B for ; Mon, 21 Jun 2021 17:06:14 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15LF5D0p008464; Mon, 21 Jun 2021 08:06:14 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=AMo2W02cPwyxuEsIdy0Cj118GkgwrWuzgfcCReLNgDA=; b=NsfTv9a0+62zNBl3YvZOYR/Hr765IoA4TRS3wkGbhtQ/2H5h09ORmp6A681deEwfdjKE lu9UgBgNOmW9v9izktluhoRYAgV3+GBVQFDh2HGP8mTh4jZgvKNnxBn2MV3fUPQkWoyE 1E/chw2JdJfsBSX1DoFxZYXtD4id01YiSDBHpZVG/CWmX4M+ZwMXcoO/Jse6Q+cbm8Ij 0usI5s5stk7ocvhmDKMstKLJuZUzuvKF3wUDSyOPbMevgT5FjjafIJeJ5rC1sL6LNCO4 HxV1AKirLzJSUtfmSRJm6bmEvPoipNTDpBKwoOFumQgNzYCqHAHUuYsizLSGRibhgXL3 hg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 39aj2xja44-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 21 Jun 2021 08:06:13 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 21 Jun 2021 08:06:12 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 21 Jun 2021 08:06:12 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id 11F863F705E; Mon, 21 Jun 2021 08:06:10 -0700 (PDT) From: Tomasz Duszynski To: Jakub Palider , Tomasz Duszynski CC: , , Jerin Jacob Date: Mon, 21 Jun 2021 17:04:45 +0200 Message-ID: <20210621150449.19070-29-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210621150449.19070-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> <20210621150449.19070-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: ENznfFlM6OimJCurlj5v8zi5fsRZdeqj X-Proofpoint-ORIG-GUID: ENznfFlM6OimJCurlj5v8zi5fsRZdeqj X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-21_06:2021-06-21, 2021-06-21 signatures=0 Subject: [dpdk-dev] [PATCH v3 28/32] raw/cnxk_bphy: support for interrupt init and cleanup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for interrupt initialization and cleanup. Internally interrupt initialization performs low level setup that allows custom interrupt handler registration later on. Interrupt initialization and cleanup are related hence they are in the same patch. Signed-off-by: Jakub Palider Signed-off-by: Tomasz Duszynski Reviewed-by: Jerin Jacob --- doc/guides/rawdevs/cnxk_bphy.rst | 20 ++++++++++++ drivers/raw/cnxk_bphy/cnxk_bphy.c | 6 ++++ drivers/raw/cnxk_bphy/cnxk_bphy_irq.c | 47 +++++++++++++++++++++++++++ drivers/raw/cnxk_bphy/cnxk_bphy_irq.h | 5 +++ drivers/raw/cnxk_bphy/meson.build | 1 + drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 41 +++++++++++++++++++++++ 6 files changed, 120 insertions(+) create mode 100644 drivers/raw/cnxk_bphy/cnxk_bphy_irq.c diff --git a/doc/guides/rawdevs/cnxk_bphy.rst b/doc/guides/rawdevs/cnxk_bphy.rst index 120f953fb..b69c5f39a 100644 --- a/doc/guides/rawdevs/cnxk_bphy.rst +++ b/doc/guides/rawdevs/cnxk_bphy.rst @@ -37,6 +37,9 @@ To perform data transfer use standard ``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs. Not all messages produce sensible responses hence dequeueing is not always necessary. +BPHY CGX/RPM PMD +---------------- + BPHY CGX/RPM PMD accepts ``struct cnxk_bphy_cgx_msg`` messages which differ by type and payload. Message types along with description are listed below. As for the usage examples please refer to ``cnxk_bphy_cgx_dev_selftest()``. @@ -95,6 +98,23 @@ Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_START_RXTX`` or ``CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX``. Former will enable traffic while the latter will do the opposite. +BPHY PMD +-------- + +BPHY PMD accepts ``struct cnxk_bphy_irq_msg`` messages which differ by type and payload. +Message types along with description are listed below. For some usage examples please refer to +``bphy_rawdev_selftest()``. + +Initialize or finalize interrupt handling +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Message is used to setup low level interrupt handling. + +Message must have type set to ``CNXK_BPHY_IRQ_MSG_TYPE_INIT`` or ``CNXK_BPHY_IRQ_MSG_TYPE_FINI``. +The former will setup low level interrupt handling while the latter will tear everything down. There +are also two convenience functions namely ``rte_pmd_bphy_intr_init()`` and +``rte_pmd_bphy_intr_fini()`` that take care of all details. + Self test --------- diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy.c b/drivers/raw/cnxk_bphy/cnxk_bphy.c index 7e541bac4..3f8679534 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy.c @@ -47,6 +47,12 @@ cnxk_bphy_irq_enqueue_bufs(struct rte_rawdev *dev, return 0; switch (msg->type) { + case CNXK_BPHY_IRQ_MSG_TYPE_INIT: + ret = cnxk_bphy_intr_init(dev->dev_id); + break; + case CNXK_BPHY_IRQ_MSG_TYPE_FINI: + cnxk_bphy_intr_fini(dev->dev_id); + break; default: ret = -EINVAL; } diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c new file mode 100644 index 000000000..c4df539cd --- /dev/null +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ +#include +#include +#include +#include + +#include +#include + +#include "cnxk_bphy_irq.h" + +static struct bphy_device * +cnxk_bphy_get_bphy_dev_by_dev_id(uint16_t dev_id) +{ + struct rte_rawdev *rawdev; + + if (!rte_rawdev_pmd_is_valid_dev(dev_id)) + return NULL; + + rawdev = &rte_rawdevs[dev_id]; + + return (struct bphy_device *)rawdev->dev_private; +} + +int +cnxk_bphy_intr_init(uint16_t dev_id) +{ + struct bphy_device *bphy_dev = cnxk_bphy_get_bphy_dev_by_dev_id(dev_id); + + bphy_dev->irq_chip = roc_bphy_intr_init(); + if (bphy_dev->irq_chip == NULL) + return -ENOMEM; + + return 0; +} + +void +cnxk_bphy_intr_fini(uint16_t dev_id) +{ + struct bphy_device *bphy_dev = cnxk_bphy_get_bphy_dev_by_dev_id(dev_id); + struct roc_bphy_irq_chip *irq_chip = bphy_dev->irq_chip; + + roc_bphy_intr_fini(irq_chip); + bphy_dev->irq_chip = NULL; +} diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h index 16243efc9..3acc47fe8 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h @@ -10,6 +10,8 @@ #include +typedef void (*cnxk_bphy_intr_handler_t)(int irq_num, void *isr_data); + struct bphy_mem { struct rte_mem_resource res0; struct rte_mem_resource res2; @@ -27,4 +29,7 @@ struct bphy_device { struct bphy_irq_queue queues[1]; }; +int cnxk_bphy_intr_init(uint16_t dev_id); +void cnxk_bphy_intr_fini(uint16_t dev_id); + #endif /* _CNXK_BPHY_IRQ_ */ diff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build index f2868fd68..14147feaf 100644 --- a/drivers/raw/cnxk_bphy/meson.build +++ b/drivers/raw/cnxk_bphy/meson.build @@ -7,5 +7,6 @@ sources = files( 'cnxk_bphy.c', 'cnxk_bphy_cgx.c', 'cnxk_bphy_cgx_test.c', + 'cnxk_bphy_irq.c', ) headers = files('rte_pmd_bphy.h') diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h index eb39654f1..c667d984e 100644 --- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h +++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h @@ -5,6 +5,8 @@ #ifndef _CNXK_BPHY_H_ #define _CNXK_BPHY_H_ +#include "cnxk_bphy_irq.h" + enum cnxk_bphy_cgx_msg_type { CNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO, CNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE, @@ -101,6 +103,8 @@ struct cnxk_bphy_cgx_msg { void *data; }; +#define CNXK_BPHY_DEF_QUEUE 0 + enum cnxk_bphy_irq_msg_type { CNXK_BPHY_IRQ_MSG_TYPE_INIT, CNXK_BPHY_IRQ_MSG_TYPE_FINI, @@ -114,4 +118,41 @@ struct cnxk_bphy_irq_msg { void *data; }; +struct cnxk_bphy_irq_info { + int irq_num; + cnxk_bphy_intr_handler_t handler; + void *data; + int cpu; +}; + +static __rte_always_inline int +rte_pmd_bphy_intr_init(uint16_t dev_id) +{ + struct cnxk_bphy_irq_msg msg = { + .type = CNXK_BPHY_IRQ_MSG_TYPE_INIT, + }; + struct rte_rawdev_buf *bufs[1]; + struct rte_rawdev_buf buf; + + buf.buf_addr = &msg; + bufs[0] = &buf; + + return rte_rawdev_enqueue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE); +} + +static __rte_always_inline void +rte_pmd_bphy_intr_fini(uint16_t dev_id) +{ + struct cnxk_bphy_irq_msg msg = { + .type = CNXK_BPHY_IRQ_MSG_TYPE_FINI, + }; + struct rte_rawdev_buf *bufs[1]; + struct rte_rawdev_buf buf; + + buf.buf_addr = &msg; + bufs[0] = &buf; + + rte_rawdev_enqueue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE); +} + #endif /* _CNXK_BPHY_H_ */ -- 2.25.1