From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2A905A0547; Mon, 21 Jun 2021 17:08:45 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7B22841237; Mon, 21 Jun 2021 17:06:24 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4B4A7411F5 for ; Mon, 21 Jun 2021 17:06:23 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15LEuiQP003906; Mon, 21 Jun 2021 08:06:22 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=VdeBd0N6aJfhl/nOJQkT/au5CqoizwOLJ+IJkfe851c=; b=SWbsdoFXzFzF0VKrdc7PmtQXagFmDx21IsDWnYtcrtjwqGk+H1Wif29hUeEmc8pZOcsq a4Zk+3/7rZzq/bQ3+G7eGVuamcDrfdenSU1QSPGt+FdwPH51leZSAzbuAmYxE+emGUlG C0+GTgZkaKalIIHQgbPZtmk/c2p/IPUIheIUnSd1rabcWof+fdrlAtjw92bT+vX00OX9 kQ+E2m+1dE8b4C9x72p1lmEli+HQwElQ2zmUWQtdZzVRadIJoudZkyMCj0KjJWEzHfD7 AAHuHkWsuj5+DUfD+yOGoPEpJeKYg8qWk5tGr4YEuMwVe1SCWw/L0Eh6jNpuwUwO4Wjz CA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 39ap171gmb-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 21 Jun 2021 08:06:22 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 21 Jun 2021 08:06:20 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 21 Jun 2021 08:06:20 -0700 Received: from EH-LT0048.marvell.com (unknown [10.193.32.52]) by maili.marvell.com (Postfix) with ESMTP id E201D3F705B; Mon, 21 Jun 2021 08:06:18 -0700 (PDT) From: Tomasz Duszynski To: Jakub Palider , Tomasz Duszynski CC: , , Jerin Jacob Date: Mon, 21 Jun 2021 17:04:49 +0200 Message-ID: <20210621150449.19070-33-tduszynski@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210621150449.19070-1-tduszynski@marvell.com> References: <20210531214142.30167-1-tduszynski@marvell.com> <20210621150449.19070-1-tduszynski@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: cbOcUA681_jm6KMMDinRShkFSqqaihYK X-Proofpoint-ORIG-GUID: cbOcUA681_jm6KMMDinRShkFSqqaihYK X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-21_06:2021-06-21, 2021-06-21 signatures=0 Subject: [dpdk-dev] [PATCH v3 32/32] raw/cnxk_bphy: support for bphy selftest X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for performing selftest. Signed-off-by: Jakub Palider Signed-off-by: Tomasz Duszynski Reviewed-by: Jerin Jacob --- doc/guides/rawdevs/cnxk_bphy.rst | 7 +- drivers/raw/cnxk_bphy/cnxk_bphy.c | 124 ++++++++++++++++++++++++++++++ 2 files changed, 127 insertions(+), 4 deletions(-) diff --git a/doc/guides/rawdevs/cnxk_bphy.rst b/doc/guides/rawdevs/cnxk_bphy.rst index 1e17d6071..bf7c00e6b 100644 --- a/doc/guides/rawdevs/cnxk_bphy.rst +++ b/doc/guides/rawdevs/cnxk_bphy.rst @@ -141,15 +141,14 @@ Message must have type set to ``CNXK_BPHY_IRQ_MSG_TYPE_MEM_GET``. There's a conv Self test --------- -On EAL initialization, BPHY CGX/RPM devices will be probed and populated into +On EAL initialization BPHY and BPHY CGX/RPM devices will be probed and populated into the raw devices. The rawdev ID of the device can be obtained using invocation of ``rte_rawdev_get_dev_id("NAME:x")`` from the test application, where: -- NAME is the desired subsystem: use "BPHY_CGX" for +- NAME is the desired subsystem: use "BPHY" for regular, and "BPHY_CGX" for RFOE module, - x is the device's bus id specified in "bus:device.func" (BDF) format. Use this identifier for further rawdev function calls. -The driver's selftest rawdev API can be used to verify the BPHY CGX/RPM -functionality. +Selftest rawdev API can be used to verify the BPHY and BPHY CGX/RPM functionality. diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy.c b/drivers/raw/cnxk_bphy/cnxk_bphy.c index 2a516ae73..9cb3f8d33 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy.c @@ -11,6 +11,7 @@ #include #include +#include #include "cnxk_bphy_irq.h" #include "rte_pmd_bphy.h" @@ -22,6 +23,128 @@ static const struct rte_pci_id pci_bphy_map[] = { }, }; +struct bphy_test { + int irq_num; + cnxk_bphy_intr_handler_t handler; + void *data; + int cpu; + bool handled_intr; + int handled_data; + int test_data; +}; + +static struct bphy_test *test; + +static void +bphy_test_handler_fn(int irq_num, void *isr_data) +{ + test[irq_num].handled_intr = true; + test[irq_num].handled_data = *((int *)isr_data); +} + +static int +bphy_rawdev_selftest(uint16_t dev_id) +{ + unsigned int i, queues, descs; + uint64_t max_irq; + int ret; + + queues = rte_rawdev_queue_count(dev_id); + if (queues == 0) + return -ENODEV; + + ret = rte_rawdev_start(dev_id); + if (ret) + return ret; + + ret = rte_rawdev_queue_conf_get(dev_id, CNXK_BPHY_DEF_QUEUE, &descs, + sizeof(descs)); + if (ret) + goto err_desc; + if (descs != 1) { + ret = -ENODEV; + plt_err("Wrong number of descs reported\n"); + goto err_desc; + } + + ret = rte_pmd_bphy_intr_init(dev_id); + if (ret) { + plt_err("intr init failed"); + return ret; + } + + max_irq = cnxk_bphy_irq_max_get(dev_id); + + test = rte_zmalloc("BPHY", max_irq * sizeof(*test), 0); + if (test == NULL) { + plt_err("intr alloc failed"); + goto err_alloc; + } + + for (i = 0; i < max_irq; i++) { + test[i].test_data = i; + test[i].irq_num = i; + test[i].handler = bphy_test_handler_fn; + test[i].data = &test[i].test_data; + } + + for (i = 0; i < max_irq; i++) { + ret = rte_pmd_bphy_intr_register(dev_id, test[i].irq_num, + test[i].handler, test[i].data, + 0); + if (ret == -ENOTSUP) { + /* In the test we iterate over all irq numbers + * so if some of them are not supported by given + * platform we treat respective results as valid + * ones. This way they have no impact on overall + * test results. + */ + test[i].handled_intr = true; + test[i].handled_data = test[i].test_data; + ret = 0; + continue; + } + + if (ret) { + plt_err("intr register failed at irq %d", i); + goto err_register; + } + } + + for (i = 0; i < max_irq; i++) + roc_bphy_intr_handler(i); + + for (i = 0; i < max_irq; i++) { + if (!test[i].handled_intr) { + plt_err("intr %u not handled", i); + ret = -1; + break; + } + if (test[i].handled_data != test[i].test_data) { + plt_err("intr %u has wrong handler", i); + ret = -1; + break; + } + } + +err_register: + /* + * In case of registration failure the loop goes over all + * interrupts which is safe due to internal guards in + * rte_pmd_bphy_intr_unregister(). + */ + for (i = 0; i < max_irq; i++) + rte_pmd_bphy_intr_unregister(dev_id, i); + + rte_free(test); +err_alloc: + rte_pmd_bphy_intr_fini(dev_id); +err_desc: + rte_rawdev_stop(dev_id); + + return ret; +} + static void bphy_rawdev_get_name(char *name, struct rte_pci_device *pci_dev) { @@ -122,6 +245,7 @@ static const struct rte_rawdev_ops bphy_rawdev_ops = { .enqueue_bufs = cnxk_bphy_irq_enqueue_bufs, .dequeue_bufs = cnxk_bphy_irq_dequeue_bufs, .queue_count = cnxk_bphy_irq_queue_count, + .dev_selftest = bphy_rawdev_selftest, }; static int -- 2.25.1