From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
To: dev@dpdk.org
Cc: gakhil@marvell.com, fiona.trahe@intel.com,
roy.fan.zhang@intel.com,
Arek Kusztal <arkadiuszx.kusztal@intel.com>
Subject: [dpdk-dev] [PATCH v2 01/16] common/qat: rework qp per service function
Date: Mon, 28 Jun 2021 17:34:19 +0100 [thread overview]
Message-ID: <20210628163434.77741-2-arkadiuszx.kusztal@intel.com> (raw)
In-Reply-To: <20210628163434.77741-1-arkadiuszx.kusztal@intel.com>
Different generations of Intel QuickAssist Technology devices may
differ in approach to allocate queues. Queue pair number function
therefore needs to be more generic.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
drivers/common/qat/qat_qp.c | 15 ++++++++++-----
drivers/common/qat/qat_qp.h | 2 +-
drivers/compress/qat/qat_comp_pmd.c | 9 ++++-----
drivers/crypto/qat/qat_asym_pmd.c | 9 ++++-----
drivers/crypto/qat/qat_sym_pmd.c | 9 ++++-----
5 files changed, 23 insertions(+), 21 deletions(-)
diff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c
index 4a8078541c..aa64d2e168 100644
--- a/drivers/common/qat/qat_qp.c
+++ b/drivers/common/qat/qat_qp.c
@@ -145,14 +145,19 @@ static void adf_queue_arb_disable(struct qat_queue *txq, void *base_addr,
rte_spinlock_t *lock);
-int qat_qps_per_service(const struct qat_qp_hw_data *qp_hw_data,
+int qat_qps_per_service(struct qat_pci_device *qat_dev,
enum qat_service_type service)
{
- int i, count;
-
- for (i = 0, count = 0; i < ADF_MAX_QPS_ON_ANY_SERVICE; i++)
- if (qp_hw_data[i].service_type == service)
+ int i = 0, count = 0, max_ops_per_srv = 0;
+ const struct qat_qp_hw_data*
+ sym_hw_qps = qat_gen_config[qat_dev->qat_dev_gen]
+ .qp_hw_data[service];
+
+ max_ops_per_srv = ADF_MAX_QPS_ON_ANY_SERVICE;
+ for (; i < max_ops_per_srv; i++)
+ if (sym_hw_qps[i].service_type == service)
count++;
+
return count;
}
diff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h
index 74f7e7daee..d353e8552b 100644
--- a/drivers/common/qat/qat_qp.h
+++ b/drivers/common/qat/qat_qp.h
@@ -98,7 +98,7 @@ qat_qp_setup(struct qat_pci_device *qat_dev,
struct qat_qp_config *qat_qp_conf);
int
-qat_qps_per_service(const struct qat_qp_hw_data *qp_hw_data,
+qat_qps_per_service(struct qat_pci_device *qat_dev,
enum qat_service_type service);
int
diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c
index 8de41f6b6e..6eb1ae3a21 100644
--- a/drivers/compress/qat/qat_comp_pmd.c
+++ b/drivers/compress/qat/qat_comp_pmd.c
@@ -106,6 +106,7 @@ qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
struct qat_qp **qp_addr =
(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
struct qat_comp_dev_private *qat_private = dev->data->dev_private;
+ struct qat_pci_device *qat_dev = qat_private->qat_dev;
const struct qat_qp_hw_data *comp_hw_qps =
qat_gen_config[qat_private->qat_dev->qat_dev_gen]
.qp_hw_data[QAT_SERVICE_COMPRESSION];
@@ -117,7 +118,7 @@ qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
if (ret < 0)
return ret;
}
- if (qp_id >= qat_qps_per_service(comp_hw_qps,
+ if (qp_id >= qat_qps_per_service(qat_dev,
QAT_SERVICE_COMPRESSION)) {
QAT_LOG(ERR, "qp_id %u invalid for this device", qp_id);
return -EINVAL;
@@ -592,13 +593,11 @@ qat_comp_dev_info_get(struct rte_compressdev *dev,
struct rte_compressdev_info *info)
{
struct qat_comp_dev_private *comp_dev = dev->data->dev_private;
- const struct qat_qp_hw_data *comp_hw_qps =
- qat_gen_config[comp_dev->qat_dev->qat_dev_gen]
- .qp_hw_data[QAT_SERVICE_COMPRESSION];
+ struct qat_pci_device *qat_dev = comp_dev->qat_dev;
if (info != NULL) {
info->max_nb_queue_pairs =
- qat_qps_per_service(comp_hw_qps,
+ qat_qps_per_service(qat_dev,
QAT_SERVICE_COMPRESSION);
info->feature_flags = dev->feature_flags;
info->capabilities = comp_dev->qat_dev_capabilities;
diff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c
index a2c8aca2c1..f0c8ed1bcf 100644
--- a/drivers/crypto/qat/qat_asym_pmd.c
+++ b/drivers/crypto/qat/qat_asym_pmd.c
@@ -54,12 +54,10 @@ static void qat_asym_dev_info_get(struct rte_cryptodev *dev,
struct rte_cryptodev_info *info)
{
struct qat_asym_dev_private *internals = dev->data->dev_private;
- const struct qat_qp_hw_data *asym_hw_qps =
- qat_gen_config[internals->qat_dev->qat_dev_gen]
- .qp_hw_data[QAT_SERVICE_ASYMMETRIC];
+ struct qat_pci_device *qat_dev = internals->qat_dev;
if (info != NULL) {
- info->max_nb_queue_pairs = qat_qps_per_service(asym_hw_qps,
+ info->max_nb_queue_pairs = qat_qps_per_service(qat_dev,
QAT_SERVICE_ASYMMETRIC);
info->feature_flags = dev->feature_flags;
info->capabilities = internals->qat_dev_capabilities;
@@ -128,6 +126,7 @@ static int qat_asym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
struct qat_qp **qp_addr =
(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
struct qat_asym_dev_private *qat_private = dev->data->dev_private;
+ struct qat_pci_device *qat_dev = qat_private->qat_dev;
const struct qat_qp_hw_data *asym_hw_qps =
qat_gen_config[qat_private->qat_dev->qat_dev_gen]
.qp_hw_data[QAT_SERVICE_ASYMMETRIC];
@@ -139,7 +138,7 @@ static int qat_asym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
if (ret < 0)
return ret;
}
- if (qp_id >= qat_qps_per_service(asym_hw_qps, QAT_SERVICE_ASYMMETRIC)) {
+ if (qp_id >= qat_qps_per_service(qat_dev, QAT_SERVICE_ASYMMETRIC)) {
QAT_LOG(ERR, "qp_id %u invalid for this device", qp_id);
return -EINVAL;
}
diff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c
index b9601c6c3a..549345b6fa 100644
--- a/drivers/crypto/qat/qat_sym_pmd.c
+++ b/drivers/crypto/qat/qat_sym_pmd.c
@@ -90,13 +90,11 @@ static void qat_sym_dev_info_get(struct rte_cryptodev *dev,
struct rte_cryptodev_info *info)
{
struct qat_sym_dev_private *internals = dev->data->dev_private;
- const struct qat_qp_hw_data *sym_hw_qps =
- qat_gen_config[internals->qat_dev->qat_dev_gen]
- .qp_hw_data[QAT_SERVICE_SYMMETRIC];
+ struct qat_pci_device *qat_dev = internals->qat_dev;
if (info != NULL) {
info->max_nb_queue_pairs =
- qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);
+ qat_qps_per_service(qat_dev, QAT_SERVICE_SYMMETRIC);
info->feature_flags = dev->feature_flags;
info->capabilities = internals->qat_dev_capabilities;
info->driver_id = qat_sym_driver_id;
@@ -164,6 +162,7 @@ static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
struct qat_qp **qp_addr =
(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
struct qat_sym_dev_private *qat_private = dev->data->dev_private;
+ struct qat_pci_device *qat_dev = qat_private->qat_dev;
const struct qat_qp_hw_data *sym_hw_qps =
qat_gen_config[qat_private->qat_dev->qat_dev_gen]
.qp_hw_data[QAT_SERVICE_SYMMETRIC];
@@ -175,7 +174,7 @@ static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
if (ret < 0)
return ret;
}
- if (qp_id >= qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC)) {
+ if (qp_id >= qat_qps_per_service(qat_dev, QAT_SERVICE_SYMMETRIC)) {
QAT_LOG(ERR, "qp_id %u invalid for this device", qp_id);
return -EINVAL;
}
--
2.30.2
next prev parent reply other threads:[~2021-06-28 16:34 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-28 16:34 [dpdk-dev] [PATCH v2 00/16] Add support for fourth generation of Intel QuickAssist Technology devices Arek Kusztal
2021-06-28 16:34 ` Arek Kusztal [this message]
2021-06-29 12:15 ` [dpdk-dev] [PATCH v2 01/16] common/qat: rework qp per service function Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 02/16] crypto/qat: add support for generation 4 devices Arek Kusztal
2021-06-29 12:15 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 03/16] crypto/qat: enable gen4 legacy algorithms Arek Kusztal
2021-06-29 12:18 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 04/16] crypto/qat: add gen4 ucs slice type, add ctr mode Arek Kusztal
2021-06-29 12:16 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 05/16] crypto/qat: rename content descriptor functions Arek Kusztal
2021-06-29 12:18 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 06/16] crypto/qat: add legacy gcm and ccm Arek Kusztal
2021-06-29 12:22 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 07/16] crypto/qat: rework init common header function Arek Kusztal
2021-06-29 12:23 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 08/16] crypto/qat: add aes gcm in ucs spc mode Arek Kusztal
2021-06-29 12:19 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 09/16] crypto/qat: add chacha-poly " Arek Kusztal
2021-06-29 12:20 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 10/16] crypto/qat: add gmac in legacy mode on gen 4 Arek Kusztal
2021-06-29 12:20 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 11/16] common/qat: add pf2vf communication in qat Arek Kusztal
2021-06-29 12:22 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 12/16] common/qat: reset ring pairs before setting gen4 Arek Kusztal
2021-06-29 12:21 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 13/16] common/qat: add service discovery to qat gen4 Arek Kusztal
2021-06-29 12:21 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 14/16] crypto/qat: update raw dp api Arek Kusztal
2021-06-29 13:06 ` Dybkowski, AdamX
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 15/16] crypto/qat: enable RAW API on QAT GEN1-3 only Arek Kusztal
2021-06-29 12:23 ` Zhang, Roy Fan
2021-06-28 16:34 ` [dpdk-dev] [PATCH v2 16/16] test/crypto: check if RAW API is supported Arek Kusztal
2021-06-29 12:24 ` Zhang, Roy Fan
2021-07-16 18:06 ` [dpdk-dev] [EXT] " Akhil Goyal
2021-07-19 12:39 ` Dybkowski, AdamX
2021-06-29 12:14 ` [dpdk-dev] [PATCH v2 00/16] Add support for fourth generation of Intel QuickAssist Technology devices Zhang, Roy Fan
2021-07-16 18:09 ` [dpdk-dev] [EXT] " Akhil Goyal
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