From: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
To: <dev@dpdk.org>
Cc: <stable@dpdk.org>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
"Matan Azrad" <matan@nvidia.com>,
Shahaf Shuler <shahafs@nvidia.com>
Subject: [dpdk-dev] [PATCH] net/mlx5: document workaround for ConnectX-4 with L2 encap
Date: Wed, 30 Jun 2021 10:01:06 +0300 [thread overview]
Message-ID: <20210630070106.661928-1-dkozlyuk@nvidia.com> (raw)
ConnectX-4 and ConnectX-4 Lx NICs require all L2 headers of transmitted
packets to be inlined. By default only first 18 bytes are inlined,
which is insufficient if additional encapsulation is used, like Q-in-Q.
Thus, default settings caused such traffic to be dropepd on Tx.
Document a workaround to increase inlined data size in such cases.
Fixes: 505f1fe426d3 ("net/mlx5: add Tx devargs")
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
doc/guides/nics/mlx5.rst | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index ebefbe607e..05a89d08f2 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -705,6 +705,13 @@ Driver options
it is not recommended and may prevent NIC from sending packets over
some configurations.
+ For ConnectX-4 and ConnectX-4 Lx NICs, automatically configured value
+ is insufficient for some traffic, because they require at least all L2 headers
+ to be inlined. For example, Q-in-Q adds 4 bytes to default 18 bytes
+ of Ethernet and VLAN, thus ``txq_inline_min`` must be set to 22.
+ MPLS would add 4 bytes per label. Final value must account for all possible
+ L2 encapsulation headers used in particular environment.
+
Please, note, this minimal data inlining disengages eMPW feature (Enhanced
Multi-Packet Write), because last one does not support partial packet inlining.
This is not very critical due to minimal data inlining is mostly required
--
2.25.1
next reply other threads:[~2021-06-30 7:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-30 7:01 Dmitry Kozlyuk [this message]
2021-07-06 7:47 ` Raslan Darawsheh
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