[dpdk-dev] [PATCH 0/3] net/mlx5: add flow rule match for IPv4 IHL field

[dpdk-dev] [PATCH 0/3] net/mlx5: add flow rule match for IPv4 IHL field

[Gregory Etelson]

Expand MLX5 PMD flows functionality with a match on IPV4 IHL field.
Allow testpmd to cofigure IPv4 IHL values in flow rule.

Gregory Etelson (3):
  common/mlx5: query for hardware capability to offload IPv4 IHL field
  net/mlx5: add flow rule match for IPv4 IHL field
  app/testpmd: add flow item to match on IPv4 version_ihl field

 app/test-pmd/cmdline_flow.c          | 12 ++++++++++-
 drivers/common/mlx5/mlx5_devx_cmds.c |  6 ++++++
 drivers/common/mlx5/mlx5_devx_cmds.h |  2 ++
 drivers/net/mlx5/mlx5_flow_dv.c      | 31 +++++++++++++++++++++-------
 4 files changed, 42 insertions(+), 9 deletions(-)

-- 
2.31.1

[dpdk-dev] [PATCH 1/3] common/mlx5: query for hardware capability to offload IPv4 IHL field

[Gregory Etelson]

The patch queries MLX5 port hardware if it is capable to offload
IPv4 IHL field.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/common/mlx5/mlx5_devx_cmds.c | 6 ++++++
 drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index f5914bce32..9070691332 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -948,6 +948,12 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
 		(flow_table_nic_cap, hcattr,
 		 flow_table_properties_nic_receive.log_max_ft_sampler_num);
 	attr->pkt_integrity_match = mlx5_devx_query_pkt_integrity_match(hcattr);
+	attr->inner_ipv4_ihl = MLX5_GET
+		(flow_table_nic_cap, hcattr,
+		 ft_field_support_2_nic_receive.inner_ipv4_ihl);
+	attr->outer_ipv4_ihl = MLX5_GET
+		(flow_table_nic_cap, hcattr,
+		 ft_field_support_2_nic_receive.outer_ipv4_ihl);
 	/* Query HCA offloads for Ethernet protocol. */
 	memset(in, 0, sizeof(in));
 	memset(out, 0, sizeof(out));
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index f8a17b886b..034c40b49c 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -148,6 +148,8 @@ struct mlx5_hca_attr {
 	uint32_t crypto_login:1; /* General obj type CRYPTO_LOGIN supported. */
 	uint32_t regexp_num_of_engines;
 	uint32_t log_max_ft_sampler_num:8;
+	uint32_t inner_ipv4_ihl:1;
+	uint32_t outer_ipv4_ihl:1;
 	uint32_t geneve_tlv_opt;
 	uint32_t cqe_compression:1;
 	uint32_t mini_cqe_resp_flow_tag:1;
-- 
2.31.1

[dpdk-dev] [PATCH 2/3] net/mlx5: add flow rule match for IPv4 IHL field

[Gregory Etelson]

Provide flow rules capability to match on IPv4 IHL field.
Minimal HCA firmware version requiredto offload IPv4 IHL is
xx_30_2000.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 31 +++++++++++++++++++++++--------
 1 file changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index c5d4b01e57..155f686ad1 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -2451,19 +2451,19 @@ flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
 static int
-flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
-			   uint64_t item_flags,
-			   uint64_t last_item,
-			   uint16_t ether_type,
-			   struct rte_flow_error *error)
+flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
+			   const struct rte_flow_item *item,
+			   uint64_t item_flags, uint64_t last_item,
+			   uint16_t ether_type, struct rte_flow_error *error)
 {
 	int ret;
+	struct mlx5_priv *priv = dev->data->dev_private;
 	const struct rte_flow_item_ipv4 *spec = item->spec;
 	const struct rte_flow_item_ipv4 *last = item->last;
 	const struct rte_flow_item_ipv4 *mask = item->mask;
 	rte_be16_t fragment_offset_spec = 0;
 	rte_be16_t fragment_offset_last = 0;
-	const struct rte_flow_item_ipv4 nic_ipv4_mask = {
+	struct rte_flow_item_ipv4 nic_ipv4_mask = {
 		.hdr = {
 			.src_addr = RTE_BE32(0xffffffff),
 			.dst_addr = RTE_BE32(0xffffffff),
@@ -2474,6 +2474,17 @@ flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
 		},
 	};
 
+	if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
+		int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
+		bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
+			       priv->config.hca_attr.inner_ipv4_ihl;
+		if (!ihl_cap)
+			return rte_flow_error_set(error, ENOTSUP,
+						  RTE_FLOW_ERROR_TYPE_ITEM,
+						  item,
+						  "IPV4 ihl offload not supported");
+		nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
+	}
 	ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
 					   ether_type, &nic_ipv4_mask,
 					   MLX5_ITEM_RANGE_ACCEPTED, error);
@@ -6771,7 +6782,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 		case RTE_FLOW_ITEM_TYPE_IPV4:
 			mlx5_flow_tunnel_ip_check(items, next_protocol,
 						  &item_flags, &tunnel);
-			ret = flow_dv_validate_item_ipv4(items, item_flags,
+			ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
 							 last_item, ether_type,
 							 error);
 			if (ret < 0)
@@ -8154,7 +8165,7 @@ flow_dv_translate_item_ipv4(void *matcher, void *key,
 	void *headers_v;
 	char *l24_m;
 	char *l24_v;
-	uint8_t tos;
+	uint8_t tos, ihl_m, ihl_v;
 
 	if (inner) {
 		headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
@@ -8183,6 +8194,10 @@ flow_dv_translate_item_ipv4(void *matcher, void *key,
 	*(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
 	*(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
 	tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
+	ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
+	ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
+	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
+	MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
 		 ipv4_m->hdr.type_of_service);
 	MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
-- 
2.31.1

[dpdk-dev] [PATCH 3/3] app/testpmd: add flow item to match on IPv4 version_ihl field

[Gregory Etelson]

The new flow item allows PMD to offload IPv4 IHL field for matching,
if hardware supports that operation.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
---
 app/test-pmd/cmdline_flow.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 1c587bb7b8..c1c7b9a9f9 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -173,6 +173,7 @@ enum index {
 	ITEM_VLAN_INNER_TYPE,
 	ITEM_VLAN_HAS_MORE_VLAN,
 	ITEM_IPV4,
+	ITEM_IPV4_VER_IHL,
 	ITEM_IPV4_TOS,
 	ITEM_IPV4_ID,
 	ITEM_IPV4_FRAGMENT_OFFSET,
@@ -1071,6 +1072,7 @@ static const enum index item_vlan[] = {
 };
 
 static const enum index item_ipv4[] = {
+	ITEM_IPV4_VER_IHL,
 	ITEM_IPV4_TOS,
 	ITEM_IPV4_ID,
 	ITEM_IPV4_FRAGMENT_OFFSET,
@@ -2567,6 +2569,13 @@ static const struct token token_list[] = {
 		.next = NEXT(item_ipv4),
 		.call = parse_vc,
 	},
+	[ITEM_IPV4_VER_IHL] = {
+		.name = "version_ihl",
+		.help = "match header length",
+		.next = NEXT(item_ipv4, NEXT_ENTRY(UNSIGNED), item_param),
+		.args = ARGS(ARGS_ENTRY(struct rte_flow_item_ipv4,
+				     hdr.version_ihl)),
+	},
 	[ITEM_IPV4_TOS] = {
 		.name = "tos",
 		.help = "type of service",
@@ -8123,7 +8132,8 @@ update_fields(uint8_t *buf, struct rte_flow_item *item, uint16_t next_proto)
 		break;
 	case RTE_FLOW_ITEM_TYPE_IPV4:
 		ipv4 = (struct rte_ipv4_hdr *)buf;
-		ipv4->version_ihl = 0x45;
+		if (!ipv4->version_ihl)
+			ipv4->version_ihl = RTE_IPV4_VHL_DEF;
 		if (next_proto && ipv4->next_proto_id == 0)
 			ipv4->next_proto_id = (uint8_t)next_proto;
 		break;
-- 
2.31.1

[dpdk-dev] [PATCH v2 0/2] net/mlx5: add flow rule match for IPv4 IHL field

[Gregory Etelson]

Expand MLX5 PMD flows functionality with a match on IPV4 IHL field.
Allow testpmd to cofigure IPv4 IHL values in flow rule.

v2:
- update release notes.
- update MLX5 guide.
- remove tespmd from the series. 

Gregory Etelson (2):
  common/mlx5: query for hardware capability to offload IPv4 IHL field
  net/mlx5: add flow rule match for IPv4 IHL field

 doc/guides/nics/mlx5.rst               |  1 +
 doc/guides/rel_notes/release_21_08.rst |  3 +++
 drivers/common/mlx5/mlx5_devx_cmds.c   |  6 +++++
 drivers/common/mlx5/mlx5_devx_cmds.h   |  2 ++
 drivers/net/mlx5/mlx5_flow_dv.c        | 31 +++++++++++++++++++-------
 5 files changed, 35 insertions(+), 8 deletions(-)

-- 
2.31.1

[dpdk-dev] [PATCH v2 1/2] common/mlx5: query for hardware capability to offload IPv4 IHL field

[Gregory Etelson]

The patch queries MLX5 port hardware if it is capable to offload
IPv4 IHL field.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/common/mlx5/mlx5_devx_cmds.c | 6 ++++++
 drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index f5914bce32..9070691332 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -948,6 +948,12 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
 		(flow_table_nic_cap, hcattr,
 		 flow_table_properties_nic_receive.log_max_ft_sampler_num);
 	attr->pkt_integrity_match = mlx5_devx_query_pkt_integrity_match(hcattr);
+	attr->inner_ipv4_ihl = MLX5_GET
+		(flow_table_nic_cap, hcattr,
+		 ft_field_support_2_nic_receive.inner_ipv4_ihl);
+	attr->outer_ipv4_ihl = MLX5_GET
+		(flow_table_nic_cap, hcattr,
+		 ft_field_support_2_nic_receive.outer_ipv4_ihl);
 	/* Query HCA offloads for Ethernet protocol. */
 	memset(in, 0, sizeof(in));
 	memset(out, 0, sizeof(out));
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
index f8a17b886b..034c40b49c 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.h
+++ b/drivers/common/mlx5/mlx5_devx_cmds.h
@@ -148,6 +148,8 @@ struct mlx5_hca_attr {
 	uint32_t crypto_login:1; /* General obj type CRYPTO_LOGIN supported. */
 	uint32_t regexp_num_of_engines;
 	uint32_t log_max_ft_sampler_num:8;
+	uint32_t inner_ipv4_ihl:1;
+	uint32_t outer_ipv4_ihl:1;
 	uint32_t geneve_tlv_opt;
 	uint32_t cqe_compression:1;
 	uint32_t mini_cqe_resp_flow_tag:1;
-- 
2.31.1

[dpdk-dev] [PATCH v2 2/2] net/mlx5: add flow rule match for IPv4 IHL field

[Gregory Etelson]

Provide flow rules capability to match on IPv4 IHL field.
Minimal HCA firmware version requiredto offload IPv4 IHL is
xx_30_2000.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 doc/guides/nics/mlx5.rst               |  1 +
 doc/guides/rel_notes/release_21_08.rst |  3 +++
 drivers/net/mlx5/mlx5_flow_dv.c        | 31 +++++++++++++++++++-------
 3 files changed, 27 insertions(+), 8 deletions(-)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index eb44a070b1..3cdf0de4e7 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -110,6 +110,7 @@ Features
 - Flow integrity offload API.
 - Connection tracking.
 - Sub-Function representors.
+- IPv4 IHL offload.
 
 Limitations
 -----------
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..9fd3b2c214 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -55,6 +55,9 @@ New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+* **Updated Mellanox MLX5 PMD.**
+
+  * Added IPv4 IHL offload support.
 
 Removed Items
 -------------
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index a04a3c2bb8..a84fb60d10 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -2451,19 +2451,19 @@ flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
  *   0 on success, a negative errno value otherwise and rte_errno is set.
  */
 static int
-flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
-			   uint64_t item_flags,
-			   uint64_t last_item,
-			   uint16_t ether_type,
-			   struct rte_flow_error *error)
+flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
+			   const struct rte_flow_item *item,
+			   uint64_t item_flags, uint64_t last_item,
+			   uint16_t ether_type, struct rte_flow_error *error)
 {
 	int ret;
+	struct mlx5_priv *priv = dev->data->dev_private;
 	const struct rte_flow_item_ipv4 *spec = item->spec;
 	const struct rte_flow_item_ipv4 *last = item->last;
 	const struct rte_flow_item_ipv4 *mask = item->mask;
 	rte_be16_t fragment_offset_spec = 0;
 	rte_be16_t fragment_offset_last = 0;
-	const struct rte_flow_item_ipv4 nic_ipv4_mask = {
+	struct rte_flow_item_ipv4 nic_ipv4_mask = {
 		.hdr = {
 			.src_addr = RTE_BE32(0xffffffff),
 			.dst_addr = RTE_BE32(0xffffffff),
@@ -2474,6 +2474,17 @@ flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
 		},
 	};
 
+	if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
+		int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
+		bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
+			       priv->config.hca_attr.inner_ipv4_ihl;
+		if (!ihl_cap)
+			return rte_flow_error_set(error, ENOTSUP,
+						  RTE_FLOW_ERROR_TYPE_ITEM,
+						  item,
+						  "IPV4 ihl offload not supported");
+		nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
+	}
 	ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
 					   ether_type, &nic_ipv4_mask,
 					   MLX5_ITEM_RANGE_ACCEPTED, error);
@@ -6771,7 +6782,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
 		case RTE_FLOW_ITEM_TYPE_IPV4:
 			mlx5_flow_tunnel_ip_check(items, next_protocol,
 						  &item_flags, &tunnel);
-			ret = flow_dv_validate_item_ipv4(items, item_flags,
+			ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
 							 last_item, ether_type,
 							 error);
 			if (ret < 0)
@@ -8154,7 +8165,7 @@ flow_dv_translate_item_ipv4(void *matcher, void *key,
 	void *headers_v;
 	char *l24_m;
 	char *l24_v;
-	uint8_t tos;
+	uint8_t tos, ihl_m, ihl_v;
 
 	if (inner) {
 		headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
@@ -8183,6 +8194,10 @@ flow_dv_translate_item_ipv4(void *matcher, void *key,
 	*(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
 	*(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
 	tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
+	ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
+	ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
+	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
+	MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
 		 ipv4_m->hdr.type_of_service);
 	MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
-- 
2.31.1

Re: [dpdk-dev] [PATCH v2 0/2] net/mlx5: add flow rule match for IPv4 IHL field

[Raslan Darawsheh]

Hi,

> -----Original Message-----
> From: Gregory Etelson <getelson@nvidia.com>
> Sent: Monday, July 5, 2021 2:41 PM
> To: dev@dpdk.org
> Cc: Gregory Etelson <getelson@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>
> Subject: [PATCH v2 0/2] net/mlx5: add flow rule match for IPv4 IHL field
> 
> Expand MLX5 PMD flows functionality with a match on IPV4 IHL field.
> Allow testpmd to cofigure IPv4 IHL values in flow rule.
> 
> v2:
> - update release notes.
> - update MLX5 guide.
> - remove tespmd from the series.
> 
> Gregory Etelson (2):
>   common/mlx5: query for hardware capability to offload IPv4 IHL field
>   net/mlx5: add flow rule match for IPv4 IHL field
> 
>  doc/guides/nics/mlx5.rst               |  1 +
>  doc/guides/rel_notes/release_21_08.rst |  3 +++
>  drivers/common/mlx5/mlx5_devx_cmds.c   |  6 +++++
>  drivers/common/mlx5/mlx5_devx_cmds.h   |  2 ++
>  drivers/net/mlx5/mlx5_flow_dv.c        | 31 +++++++++++++++++++-------
>  5 files changed, 35 insertions(+), 8 deletions(-)
> 
> --
> 2.31.1

Series applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh