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From: Gregory Etelson <getelson@nvidia.com>
To: <dev@dpdk.org>
Cc: <getelson@nvidia.com>, <matan@nvidia.com>, <rasland@nvidia.com>,
	Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
	Shahaf Shuler <shahafs@nvidia.com>
Subject: [dpdk-dev] [PATCH] net/mlx5: fix L4 integrity translation
Date: Mon, 5 Jul 2021 12:05:00 +0300	[thread overview]
Message-ID: <20210705090501.19969-1-getelson@nvidia.com> (raw)

MLX5 PMD supports L3 and L4 integrity bits.
L4 checksum-ok bit was not translated correctly.
The patch updates the l4_csum_ok integrity bit translation.

Fixes: 79f8952783d0 ("net/mlx5: support integrity flow item")

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

---
 drivers/net/mlx5/mlx5_flow_dv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index a04a3c2bb8..eb15ba3f8d 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -11584,7 +11584,7 @@ flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
 	} else if (mask->l4_csum_ok) {
 		MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
 			 mask->l4_csum_ok);
-		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
+		MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
 			 value->l4_csum_ok);
 	}
 }
-- 
2.31.1


             reply	other threads:[~2021-07-05  9:05 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-05  9:05 Gregory Etelson [this message]
2021-07-06 12:45 ` Raslan Darawsheh

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