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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by DM6NAM11FT003.mail.protection.outlook.com (10.13.173.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4287.22 via Frontend Transport; Mon, 5 Jul 2021 11:41:16 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 5 Jul 2021 11:40:51 +0000 From: Gregory Etelson To: CC: , , , Viacheslav Ovsiienko , Shahaf Shuler Date: Mon, 5 Jul 2021 14:40:35 +0300 Message-ID: <20210705114036.4110-2-getelson@nvidia.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210705114036.4110-1-getelson@nvidia.com> References: <20210630070452.14055-1-getelson@nvidia.com> <20210705114036.4110-1-getelson@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 32f5f5f3-6c59-4814-96a8-08d93fa9cc73 X-MS-TrafficTypeDiagnostic: BN7PR12MB2754: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2657; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Jul 2021 11:41:16.0626 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 32f5f5f3-6c59-4814-96a8-08d93fa9cc73 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT003.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR12MB2754 Subject: [dpdk-dev] [PATCH v2 1/2] common/mlx5: query for hardware capability to offload IPv4 IHL field X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The patch queries MLX5 port hardware if it is capable to offload IPv4 IHL field. Signed-off-by: Gregory Etelson Acked-by: Viacheslav Ovsiienko --- drivers/common/mlx5/mlx5_devx_cmds.c | 6 ++++++ drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index f5914bce32..9070691332 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -948,6 +948,12 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, (flow_table_nic_cap, hcattr, flow_table_properties_nic_receive.log_max_ft_sampler_num); attr->pkt_integrity_match = mlx5_devx_query_pkt_integrity_match(hcattr); + attr->inner_ipv4_ihl = MLX5_GET + (flow_table_nic_cap, hcattr, + ft_field_support_2_nic_receive.inner_ipv4_ihl); + attr->outer_ipv4_ihl = MLX5_GET + (flow_table_nic_cap, hcattr, + ft_field_support_2_nic_receive.outer_ipv4_ihl); /* Query HCA offloads for Ethernet protocol. */ memset(in, 0, sizeof(in)); memset(out, 0, sizeof(out)); diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index f8a17b886b..034c40b49c 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -148,6 +148,8 @@ struct mlx5_hca_attr { uint32_t crypto_login:1; /* General obj type CRYPTO_LOGIN supported. */ uint32_t regexp_num_of_engines; uint32_t log_max_ft_sampler_num:8; + uint32_t inner_ipv4_ihl:1; + uint32_t outer_ipv4_ihl:1; uint32_t geneve_tlv_opt; uint32_t cqe_compression:1; uint32_t mini_cqe_resp_flow_tag:1; -- 2.31.1