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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT064.mail.protection.outlook.com (10.13.175.77) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4308.20 via Frontend Transport; Tue, 13 Jul 2021 13:15:16 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 13 Jul 2021 13:15:13 +0000 From: Xueming Li To: Viacheslav Ovsiienko CC: , Date: Tue, 13 Jul 2021 21:14:23 +0800 Message-ID: <20210713131437.30170-1-xuemingl@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210616040935.311733-2-xuemingl@nvidia.com> References: <20210616040935.311733-2-xuemingl@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9907f771-e4e0-4ee0-8bb1-08d946004210 X-MS-TrafficTypeDiagnostic: MN2PR12MB3917: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7691; 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SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(376002)(136003)(346002)(396003)(39860400002)(46966006)(36840700001)(5660300002)(8676002)(336012)(2906002)(426003)(70206006)(36906005)(6666004)(8936002)(37006003)(4326008)(34020700004)(2616005)(55016002)(36860700001)(36756003)(70586007)(82310400003)(6286002)(6636002)(316002)(107886003)(7696005)(356005)(82740400003)(86362001)(7636003)(54906003)(16526019)(1076003)(478600001)(6862004)(966005)(26005)(47076005)(186003)(83380400001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jul 2021 13:15:16.5614 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9907f771-e4e0-4ee0-8bb1-08d946004210 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT064.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3917 Subject: [dpdk-dev] [PATCH v2 00/14] net/mlx5: support Sub-Function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Sub-Function [1] is a portion of the PCI device, a SF netdev has its own dedicated queues(txq, rxq). A SF shares PCI level resources with other SFs and/or with its parent PCI function. Auxiliary bus is the fundamental of SF. This patch set introduces Sub-Function support for mlx5 PMD driver including class net, regex, vdpa and compress. Version history: RFC: initial version V1: rebased on latest upstream code V2: init sh->numa_node earlier other bug fixes [1] SubFunction in kernel: https://lore.kernel.org/netdev/20201112192424.2742-1-parav@nvidia.com/ Thomas Monjalon (5): common/mlx5: move description of PCI sysfs functions common/mlx5: get PCI device address from any bus vdpa/mlx5: define driver name as macro vdpa/mlx5: remove PCI specifics vdpa/mlx5: support SubFunction Xueming Li (9): common/mlx5: add common device driver common/mlx5: support auxiliary bus net/mlx5: remove PCI dependency net/mlx5: migrate to bus-agnostic common driver net/mlx5: support SubFunction net/mlx5: check max Verbs port number regex/mlx5: migrate to common driver compress/mlx5: migrate to common driver common/mlx5: clean up legacy PCI bus driver doc/guides/nics/mlx5.rst | 54 +- doc/guides/rel_notes/release_21_08.rst | 5 + doc/guides/vdpadevs/mlx5.rst | 10 + drivers/common/mlx5/linux/meson.build | 3 + .../common/mlx5/linux/mlx5_common_auxiliary.c | 192 +++++++ drivers/common/mlx5/linux/mlx5_common_os.c | 29 +- drivers/common/mlx5/linux/mlx5_common_os.h | 6 +- drivers/common/mlx5/linux/mlx5_common_verbs.c | 24 +- drivers/common/mlx5/meson.build | 2 +- drivers/common/mlx5/mlx5_common.c | 389 ++++++++++++- drivers/common/mlx5/mlx5_common.h | 179 +++++- drivers/common/mlx5/mlx5_common_pci.c | 526 ++++-------------- drivers/common/mlx5/mlx5_common_pci.h | 77 --- drivers/common/mlx5/mlx5_common_private.h | 50 ++ drivers/common/mlx5/mlx5_common_utils.h | 2 + drivers/common/mlx5/version.map | 12 +- drivers/compress/mlx5/mlx5_compress.c | 71 +-- drivers/net/mlx5/linux/mlx5_ethdev_os.c | 14 +- drivers/net/mlx5/linux/mlx5_os.c | 203 +++++-- drivers/net/mlx5/linux/mlx5_os.h | 5 +- drivers/net/mlx5/mlx5.c | 116 ++-- drivers/net/mlx5/mlx5.h | 14 +- drivers/net/mlx5/mlx5_ethdev.c | 2 +- drivers/net/mlx5/mlx5_mac.c | 2 +- drivers/net/mlx5/mlx5_mr.c | 48 +- drivers/net/mlx5/mlx5_rxmode.c | 8 +- drivers/net/mlx5/mlx5_rxtx.h | 9 +- drivers/net/mlx5/mlx5_trigger.c | 14 +- drivers/net/mlx5/mlx5_txq.c | 3 +- drivers/net/mlx5/windows/mlx5_os.c | 15 +- drivers/regex/mlx5/mlx5_regex.c | 49 +- drivers/regex/mlx5/mlx5_regex.h | 1 - drivers/vdpa/mlx5/mlx5_vdpa.c | 128 ++--- drivers/vdpa/mlx5/mlx5_vdpa.h | 1 - 34 files changed, 1363 insertions(+), 900 deletions(-) create mode 100644 drivers/common/mlx5/linux/mlx5_common_auxiliary.c delete mode 100644 drivers/common/mlx5/mlx5_common_pci.h create mode 100644 drivers/common/mlx5/mlx5_common_private.h -- 2.25.1