[dpdk-dev] [PATCH 0/4] raw/cnxk_bphy: add FEC support

[dpdk-dev] [PATCH 0/4] raw/cnxk_bphy: add FEC support

[Tomasz Duszynski]

This series adds support for changing current LMAC FEC setting.

Tomasz Duszynski (4):
  common/cnxk: support reading BPHY CGX/RPM FEC
  common/cnxk: support setting BPHY CGX/RPM FEC
  raw/cnxk_bphy: support reading FEC
  raw/cnxk_bphy: support setting FEC

 drivers/common/cnxk/roc_bphy_cgx.c         | 43 ++++++++++++++++++++++
 drivers/common/cnxk/roc_bphy_cgx.h         |  6 +++
 drivers/common/cnxk/roc_bphy_cgx_priv.h    |  8 ++++
 drivers/common/cnxk/version.map            |  2 +
 drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c      | 13 +++++++
 drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c | 42 +++++++++++++++++++++
 drivers/raw/cnxk_bphy/rte_pmd_bphy.h       |  2 +
 7 files changed, 116 insertions(+)

--
2.25.1

[dpdk-dev] [PATCH 1/4] common/cnxk: support reading BPHY CGX/RPM FEC

[Tomasz Duszynski]

Before setting FEC for specific LMAC one needs to know which type is
actually supported because it generally differs between modes
LMAC operates in (SGMII, SFI, etc.).

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
---
 drivers/common/cnxk/roc_bphy_cgx.c      | 25 +++++++++++++++++++++++++
 drivers/common/cnxk/roc_bphy_cgx.h      |  3 +++
 drivers/common/cnxk/roc_bphy_cgx_priv.h |  4 ++++
 drivers/common/cnxk/version.map         |  1 +
 4 files changed, 33 insertions(+)

diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c
index 056a3db47f..467b67686b 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.c
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -395,3 +395,28 @@ roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
 {
 	return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, false);
 }
+
+int
+roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+			       enum roc_bphy_cgx_eth_link_fec *fec)
+{
+	uint64_t scr1, scr0;
+	int ret;
+
+	if (!roc_cgx || !fec)
+		return -EINVAL;
+
+	if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+		return -EINVAL;
+
+	scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_GET_SUPPORTED_FEC);
+
+	ret = roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+	if (ret)
+		return ret;
+
+	scr0 = FIELD_GET(SCR0_ETH_FEC_TYPES_S_FEC, scr0);
+	*fec = (enum roc_bphy_cgx_eth_link_fec)scr0;
+
+	return 0;
+}
diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h
index 49c35a1e63..9439f88b34 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.h
+++ b/drivers/common/cnxk/roc_bphy_cgx.h
@@ -115,6 +115,9 @@ __roc_api int roc_bphy_cgx_ptp_rx_enable(struct roc_bphy_cgx *roc_cgx,
 					 unsigned int lmac);
 __roc_api int roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx,
 					  unsigned int lmac);
+__roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx,
+					     unsigned int lmac,
+					     enum roc_bphy_cgx_eth_link_fec *fec);
 
 
 #endif /* _ROC_BPHY_CGX_H_ */
diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h
index 71a277fffd..93aa43ef5a 100644
--- a/drivers/common/cnxk/roc_bphy_cgx_priv.h
+++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h
@@ -66,6 +66,7 @@ enum eth_cmd_id {
 	ETH_CMD_INTERNAL_LBK = 7,
 	ETH_CMD_MODE_CHANGE = 11, /* hot plug support */
 	ETH_CMD_INTF_SHUTDOWN = 12,
+	ETH_CMD_GET_SUPPORTED_FEC = 18,
 	ETH_CMD_SET_PTP_MODE = 34,
 };
 
@@ -109,6 +110,9 @@ enum eth_cmd_own {
 #define SCR0_ETH_LNK_STS_S_LMAC_TYPE   GENMASK_ULL(35, 28)
 #define SCR0_ETH_LNK_STS_S_MODE	       GENMASK_ULL(43, 36)
 
+/* struct eth_fec_types_s */
+#define SCR0_ETH_FEC_TYPES_S_FEC GENMASK_ULL(10, 9)
+
 /* scratchx(1) CSR used for non-secure SW->ATF communication
  * This CSR acts as a command register
  */
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index e3af48c02e..3b9b283b6e 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -24,6 +24,7 @@ INTERNAL {
 	roc_ae_fpm_put;
 	roc_bphy_cgx_dev_fini;
 	roc_bphy_cgx_dev_init;
+	roc_bphy_cgx_fec_supported_get;
 	roc_bphy_cgx_get_linkinfo;
 	roc_bphy_cgx_intlbk_disable;
 	roc_bphy_cgx_intlbk_enable;
-- 
2.25.1

[dpdk-dev] [PATCH 2/4] common/cnxk: support setting BPHY CGX/RPM FEC

[Tomasz Duszynski]

Add support for setting FEC for a given LMAC.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
---
 drivers/common/cnxk/roc_bphy_cgx.c      | 18 ++++++++++++++++++
 drivers/common/cnxk/roc_bphy_cgx.h      |  3 +++
 drivers/common/cnxk/roc_bphy_cgx_priv.h |  4 ++++
 drivers/common/cnxk/version.map         |  1 +
 4 files changed, 26 insertions(+)

diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c
index 467b67686b..9e53fe238e 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.c
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -396,6 +396,24 @@ roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
 	return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, false);
 }
 
+int
+roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+		     enum roc_bphy_cgx_eth_link_fec fec)
+{
+	uint64_t scr1, scr0;
+
+	if (!roc_cgx)
+		return -EINVAL;
+
+	if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+		return -EINVAL;
+
+	scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_SET_FEC) |
+	       FIELD_PREP(SCR1_ETH_SET_FEC_ARGS, fec);
+
+	return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+}
+
 int
 roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
 			       enum roc_bphy_cgx_eth_link_fec *fec)
diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h
index 9439f88b34..d522d4e202 100644
--- a/drivers/common/cnxk/roc_bphy_cgx.h
+++ b/drivers/common/cnxk/roc_bphy_cgx.h
@@ -115,6 +115,9 @@ __roc_api int roc_bphy_cgx_ptp_rx_enable(struct roc_bphy_cgx *roc_cgx,
 					 unsigned int lmac);
 __roc_api int roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx,
 					  unsigned int lmac);
+__roc_api int roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx,
+				   unsigned int lmac,
+				   enum roc_bphy_cgx_eth_link_fec fec);
 __roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx,
 					     unsigned int lmac,
 					     enum roc_bphy_cgx_eth_link_fec *fec);
diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h
index 93aa43ef5a..e45a13ef09 100644
--- a/drivers/common/cnxk/roc_bphy_cgx_priv.h
+++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h
@@ -67,6 +67,7 @@ enum eth_cmd_id {
 	ETH_CMD_MODE_CHANGE = 11, /* hot plug support */
 	ETH_CMD_INTF_SHUTDOWN = 12,
 	ETH_CMD_GET_SUPPORTED_FEC = 18,
+	ETH_CMD_SET_FEC = 19,
 	ETH_CMD_SET_PTP_MODE = 34,
 };
 
@@ -130,6 +131,9 @@ enum eth_cmd_own {
 #define SCR1_ETH_MODE_CHANGE_ARGS_PORT	 GENMASK_ULL(21, 14)
 #define SCR1_ETH_MODE_CHANGE_ARGS_MODE	 GENMASK_ULL(63, 22)
 
+/* struct eth_set_fec_args */
+#define SCR1_ETH_SET_FEC_ARGS GENMASK_ULL(9, 8)
+
 #define SCR1_OWN_STATUS GENMASK_ULL(1, 0)
 
 #endif /* _ROC_BPHY_CGX_PRIV_H_ */
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 3b9b283b6e..738c77eaed 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -24,6 +24,7 @@ INTERNAL {
 	roc_ae_fpm_put;
 	roc_bphy_cgx_dev_fini;
 	roc_bphy_cgx_dev_init;
+	roc_bphy_cgx_fec_set;
 	roc_bphy_cgx_fec_supported_get;
 	roc_bphy_cgx_get_linkinfo;
 	roc_bphy_cgx_intlbk_disable;
-- 
2.25.1

[dpdk-dev] [PATCH 3/4] raw/cnxk_bphy: support reading FEC

[Tomasz Duszynski]

Allow one to retrieve supported FEC setting for specific LMAC.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
---
 drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c      |  9 +++++++++
 drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c | 23 ++++++++++++++++++++++
 drivers/raw/cnxk_bphy/rte_pmd_bphy.h       |  1 +
 3 files changed, 33 insertions(+)

diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
index 3da2244146..693a9cd2d5 100644
--- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
@@ -62,6 +62,7 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue,
 	struct cnxk_bphy_cgx_msg_link_info *link_info;
 	struct roc_bphy_cgx_link_info rlink_info;
 	struct roc_bphy_cgx_link_mode rlink_mode;
+	enum roc_bphy_cgx_eth_link_fec *fec;
 	unsigned int lmac = qp->lmac;
 	void *rsp = NULL;
 	int ret;
@@ -122,6 +123,14 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue,
 	case CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX:
 		ret = roc_bphy_cgx_stop_rxtx(cgx->rcgx, lmac);
 		break;
+	case CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC:
+		fec = rte_zmalloc(NULL, sizeof(*fec), 0);
+		if (!fec)
+			return -ENOMEM;
+
+		ret = roc_bphy_cgx_fec_supported_get(cgx->rcgx, lmac, fec);
+		rsp = fec;
+		break;
 	default:
 		return -EINVAL;
 	}
diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c
index cb4dd4b221..cd3e6b2e97 100644
--- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c
+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c
@@ -87,6 +87,22 @@ cnxk_bphy_cgx_link_cond(uint16_t dev_id, unsigned int queue, int cond)
 	return -ETIMEDOUT;
 }
 
+static int
+cnxk_bphy_cgx_get_supported_fec(uint16_t dev_id, unsigned int queue,
+				enum cnxk_bphy_cgx_eth_link_fec *fec)
+{
+	struct cnxk_bphy_cgx_msg msg = {
+		.type = CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
+	};
+	int ret;
+
+	ret = cnxk_bphy_cgx_enq_msg(dev_id, queue, &msg);
+	if (ret)
+		return ret;
+
+	return cnxk_bphy_cgx_deq_msg(dev_id, queue, (void **)&fec);
+}
+
 int
 cnxk_bphy_cgx_dev_selftest(uint16_t dev_id)
 {
@@ -103,6 +119,7 @@ cnxk_bphy_cgx_dev_selftest(uint16_t dev_id)
 
 	for (i = 0; i < queues; i++) {
 		struct cnxk_bphy_cgx_msg_set_link_state link_state;
+		enum cnxk_bphy_cgx_eth_link_fec fec;
 		struct cnxk_bphy_cgx_msg msg;
 		unsigned int descs;
 
@@ -198,6 +215,12 @@ cnxk_bphy_cgx_dev_selftest(uint16_t dev_id)
 			break;
 		}
 		ret = 0;
+
+		ret = cnxk_bphy_cgx_get_supported_fec(dev_id, i, &fec);
+		if (ret) {
+			RTE_LOG(ERR, PMD, "Failed to get supported FEC\n");
+			break;
+		}
 	}
 
 	rte_rawdev_stop(dev_id);
diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
index f3387f38e3..0737964149 100644
--- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
+++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
@@ -17,6 +17,7 @@ enum cnxk_bphy_cgx_msg_type {
 	CNXK_BPHY_CGX_MSG_TYPE_SET_LINK_STATE,
 	CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
 	CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
+	CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
 };
 
 enum cnxk_bphy_cgx_eth_link_speed {
-- 
2.25.1

[dpdk-dev] [PATCH 4/4] raw/cnxk_bphy: support setting FEC

[Tomasz Duszynski]

Add support for setting FEC for a given LMAC.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
---
 drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c      |  4 ++++
 drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c | 19 +++++++++++++++++++
 drivers/raw/cnxk_bphy/rte_pmd_bphy.h       |  1 +
 3 files changed, 24 insertions(+)

diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
index 693a9cd2d5..ade45ab741 100644
--- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c
@@ -131,6 +131,10 @@ cnxk_bphy_cgx_process_buf(struct cnxk_bphy_cgx *cgx, unsigned int queue,
 		ret = roc_bphy_cgx_fec_supported_get(cgx->rcgx, lmac, fec);
 		rsp = fec;
 		break;
+	case CNXK_BPHY_CGX_MSG_TYPE_SET_FEC:
+		fec = msg->data;
+		ret = roc_bphy_cgx_fec_set(cgx->rcgx, lmac, *fec);
+		break;
 	default:
 		return -EINVAL;
 	}
diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c
index cd3e6b2e97..d96e98661f 100644
--- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c
+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx_test.c
@@ -221,6 +221,25 @@ cnxk_bphy_cgx_dev_selftest(uint16_t dev_id)
 			RTE_LOG(ERR, PMD, "Failed to get supported FEC\n");
 			break;
 		}
+
+		/* set supported fec */
+		msg.type = CNXK_BPHY_CGX_MSG_TYPE_SET_FEC;
+		msg.data = &fec;
+		ret = cnxk_bphy_cgx_enq_msg(dev_id, i, &msg);
+		if (ret) {
+			RTE_LOG(ERR, PMD, "Failed to set FEC to %d\n", fec);
+			break;
+		}
+
+		/* disable fec */
+		fec = CNXK_BPHY_CGX_ETH_LINK_FEC_NONE;
+		msg.type = CNXK_BPHY_CGX_MSG_TYPE_SET_FEC;
+		msg.data = &fec;
+		ret = cnxk_bphy_cgx_enq_msg(dev_id, i, &msg);
+		if (ret) {
+			RTE_LOG(ERR, PMD, "Failed to disable FEC\n");
+			break;
+		}
 	}
 
 	rte_rawdev_stop(dev_id);
diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
index 0737964149..d459c3a862 100644
--- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
+++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
@@ -18,6 +18,7 @@ enum cnxk_bphy_cgx_msg_type {
 	CNXK_BPHY_CGX_MSG_TYPE_START_RXTX,
 	CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX,
 	CNXK_BPHY_CGX_MSG_TYPE_GET_SUPPORTED_FEC,
+	CNXK_BPHY_CGX_MSG_TYPE_SET_FEC,
 };
 
 enum cnxk_bphy_cgx_eth_link_speed {
-- 
2.25.1

Re: [dpdk-dev] [PATCH 0/4] raw/cnxk_bphy: add FEC support

[Thomas Monjalon]

15/07/2021 15:53, Tomasz Duszynski:
> This series adds support for changing current LMAC FEC setting.
> 
> Tomasz Duszynski (4):
>   common/cnxk: support reading BPHY CGX/RPM FEC
>   common/cnxk: support setting BPHY CGX/RPM FEC
>   raw/cnxk_bphy: support reading FEC
>   raw/cnxk_bphy: support setting FEC

Applied, thanks.