From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3FC4AA0C41; Thu, 15 Jul 2021 18:42:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7A6D5412C5; Thu, 15 Jul 2021 18:42:12 +0200 (CEST) Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2054.outbound.protection.outlook.com [40.107.92.54]) by mails.dpdk.org (Postfix) with ESMTP id BE61C41289 for ; Thu, 15 Jul 2021 18:42:10 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kvI/ENspMQjgPN72i2GEKmJNLw+to3CYwBvIda1pLjdkaSjeCq6n8SuzeM8iaaItQgBGXvC3gwmnE1JlSkaMGY8VmzE0sLXyifGgKQY5dWqzGv+9FEr0PSNa0Faap1cerELh9LcFtb1au74D2cSArXz1NOHwzXdYTjY5Fdj6CvsLCpJGoO83mKeyLvW5Dp9ga9atlj1k3PD1ULRpjOB9oukcGFl6wqXDT3KsuZyO/8TEsU6P3idXep0c8hIdgUCDe9yUxUpOjvEJ+iYQCIw7YsqMaog7cSlHO3sgY0U94hJOWD0/rqSWRXZLtlmVere+bfbvBuspmvwUnfS7EjeqkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zYW7FJU8n8KCNsyHBGZ7uIQXlvC37Of+gwZbvNVciA4=; b=YiAc9eKtHUzQnAkxpsMA7GxESwQa/akenygADvoWltpkhPLOiToNWwBMB0Fpgy/XUH+91bFqWtFvgU8udsgRkDfdx9ImvvavZH71yLzfeYVWK6pD9GJ9N5RMSRstVJV/qQyAyX1AT4HEluFPm1nPJ3c99rqRSzxSmpbDbP45KG8ab85QJvJtqi7+zbOR25qHXhY443s3sO3TzvFfVVVye32igifh+lxHXuhZ1f8O3zEDuMo4N4MA6vV44sH7Nov1JsCuX5La4T6BtimbOvYzzqviDy7cSWS2etZ96nLQU75ZlizOaUCWB8HbSMDR6rxGeHl8zni/123hiqIGUmiLfg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=redhat.com smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zYW7FJU8n8KCNsyHBGZ7uIQXlvC37Of+gwZbvNVciA4=; b=IAI31F8TFsTE1PdJsCXjE/I5w2OvzyPm/s3x5XfT2FjKvHjYJfdPUWDGRvyz+pg1A9hjh1DbHj2e8pvA8Wmh8Ml/b538rdCVbKaP3L/n0cuX+LcGzl8yqZusRL/FmOA8ThvXo+rifkj1jLwQKSWNmJQaTxOGwS5Fy4JPBVJY4CVLJwrIzkNOIrX9VEXdD4ZMJtOQDlvnckjVZiTeVb4KLdyqv6jmwuurheJeeVJC+sQAloLkgMOXaScC8qkxHEjXwBUqSrPIL7S1cnbwAcIfkdmjZxC0aQbUnp7awMDSvjx79ciKeuLSo6xzX3qFqfPA+dTsyjVOiGwt3kMvm1utSw== Received: from MW4PR04CA0020.namprd04.prod.outlook.com (2603:10b6:303:69::25) by CY4PR12MB1446.namprd12.prod.outlook.com (2603:10b6:910:10::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4242.22; Thu, 15 Jul 2021 16:42:09 +0000 Received: from CO1NAM11FT066.eop-nam11.prod.protection.outlook.com (2603:10b6:303:69:cafe::8) by MW4PR04CA0020.outlook.office365.com (2603:10b6:303:69::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4331.22 via Frontend Transport; Thu, 15 Jul 2021 16:42:09 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; redhat.com; dkim=none (message not signed) header.d=none;redhat.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT066.mail.protection.outlook.com (10.13.175.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4331.21 via Frontend Transport; Thu, 15 Jul 2021 16:42:09 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 15 Jul 2021 16:42:05 +0000 From: Shiri Kuzin To: CC: , , , Date: Thu, 15 Jul 2021 19:41:14 +0300 Message-ID: <20210715164126.54073-5-shirik@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210715164126.54073-1-shirik@nvidia.com> References: <20210715150817.51485-1-shirik@nvidia.com> <20210715164126.54073-1-shirik@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 546421e6-920d-4aed-0386-08d947af7d13 X-MS-TrafficTypeDiagnostic: CY4PR12MB1446: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2150; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0FJxidbx1GC0vpTUEKjn/4Et/QRPhClWxPOPBVbuqcnDBG0OR1bgFx43rIkEHcvt/MQX/EqRLQK0Dffu6duxaF8diLgydb5MBeAaxJIbGkniiT9oEqBXdXpfakB4wEPTSOIoHAEz27GrCJ3RG71BAyW6YJHLPJgPdcSy7sqvmQg1utndRvSWJOCjx8ryM2Uyck7NCaV7MS9vZbevRvrKzIjBRNyS0Kx2PJecH74tb5MrunpkhlzseXxFmQVRQywd0op+M7fjr81/nI37bod68mjppp5tIifhemLZ5rQVRHGFvsGkTXS7x83+WTm7f6H8FzUzrHuNYf73Kdav2RQQBlVZn//PGe7CTQ/4HpPb9XLZQuD/UnWEOIZDoPcshKE98wSZFhkfJyBKok/Zvor3OFKPgW8nAB5Iu6gJmdp7bGHh8xxmgdaYqRzFpVTsQC8ilkkt7seLiWNd7EhQzJ7bh8Us0a4SIyLc4J7ys2jJM6vP3DOOEcG1NYrp0UVku8Lv/llWOdBc4uR+aOEsFhiWeqE7Scn282drUo4J8nxI3+ni5ty8HBVOz1uxd9gy+CYK/ivAGLgVueD8N9umwvziQl2qR1sR9xHUybp9eHhKDh/z3Oxd9XpS4rs+xBkE8YWC2+AMB3jnftpO4sUqIcektv5f32YNtcRsV6JCKifWiUreJHG/24gVSBqBbUaIZWO2Qy4Srp9AhPpsm4l9x+YZ9z9Wd7dSWnQeErptmQgyriU= X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(346002)(39860400002)(376002)(396003)(136003)(46966006)(36840700001)(70586007)(7636003)(316002)(6286002)(47076005)(36906005)(26005)(70206006)(356005)(1076003)(86362001)(8676002)(83380400001)(2616005)(55016002)(8936002)(36860700001)(186003)(2906002)(7696005)(6916009)(36756003)(5660300002)(16526019)(82740400003)(336012)(34020700004)(478600001)(4326008)(6666004)(426003)(82310400003)(54906003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jul 2021 16:42:09.1753 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 546421e6-920d-4aed-0386-08d947af7d13 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT066.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR12MB1446 Subject: [dpdk-dev] [PATCH v8 04/16] crypto/mlx5: add basic operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The basic dev control operations are configure, close and get info. Extended the existing support of configure and close: -mlx5_crypto_dev_configure- function used to configure device. -mlx5_crypto_dev_close- function used to close a configured device. Added config struct to user private data with the fields socket id, number of queue pairs and feature flags to be disabled. Signed-off-by: Shiri Kuzin Acked-by: Matan Azrad --- drivers/crypto/mlx5/mlx5_crypto.c | 26 +++++++++++++++++++------- drivers/crypto/mlx5/mlx5_crypto.h | 1 + 2 files changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c index 3f0c97d081..a7e44deb9e 100644 --- a/drivers/crypto/mlx5/mlx5_crypto.c +++ b/drivers/crypto/mlx5/mlx5_crypto.c @@ -105,22 +105,27 @@ mlx5_crypto_dev_infos_get(struct rte_cryptodev *dev, } } -static unsigned int -mlx5_crypto_sym_session_get_size(struct rte_cryptodev *dev __rte_unused) -{ - return sizeof(struct mlx5_crypto_session); -} - static int mlx5_crypto_dev_configure(struct rte_cryptodev *dev, - struct rte_cryptodev_config *config __rte_unused) + struct rte_cryptodev_config *config) { struct mlx5_crypto_priv *priv = dev->data->dev_private; + if (config == NULL) { + DRV_LOG(ERR, "Invalid crypto dev configure parameters."); + return -EINVAL; + } + if ((config->ff_disable & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) != 0) { + DRV_LOG(ERR, + "Disabled symmetric crypto feature is not supported."); + return -ENOTSUP; + } if (mlx5_crypto_dek_setup(priv) != 0) { DRV_LOG(ERR, "Dek hash list creation has failed."); return -ENOMEM; } + priv->dev_config = *config; + DRV_LOG(DEBUG, "Device %u was configured.", dev->driver_id); return 0; } @@ -130,9 +135,16 @@ mlx5_crypto_dev_close(struct rte_cryptodev *dev) struct mlx5_crypto_priv *priv = dev->data->dev_private; mlx5_crypto_dek_unset(priv); + DRV_LOG(DEBUG, "Device %u was closed.", dev->driver_id); return 0; } +static unsigned int +mlx5_crypto_sym_session_get_size(struct rte_cryptodev *dev __rte_unused) +{ + return sizeof(struct mlx5_crypto_session); +} + static int mlx5_crypto_sym_session_configure(struct rte_cryptodev *dev, struct rte_crypto_sym_xform *xform, diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h index 167e9e57ad..a0df775407 100644 --- a/drivers/crypto/mlx5/mlx5_crypto.h +++ b/drivers/crypto/mlx5/mlx5_crypto.h @@ -24,6 +24,7 @@ struct mlx5_crypto_priv { uint32_t pdn; /* Protection Domain number. */ struct ibv_pd *pd; struct mlx5_hlist *dek_hlist; /* Dek hash list. */ + struct rte_cryptodev_config dev_config; }; struct mlx5_crypto_dek { -- 2.27.0