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dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by BN8NAM11FT065.mail.protection.outlook.com (10.13.177.63) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4352.24 via Frontend Transport; Wed, 21 Jul 2021 08:31:59 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 21 Jul 2021 08:31:57 +0000 From: Viacheslav Ovsiienko To: CC: , , Date: Wed, 21 Jul 2021 11:31:40 +0300 Message-ID: <20210721083140.7719-1-viacheslavo@nvidia.com> X-Mailer: git-send-email 2.18.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8f12f80a-e332-4dec-9aed-08d94c2201c6 X-MS-TrafficTypeDiagnostic: DM5PR12MB2502: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(8676002)(55016002)(86362001)(450100002)(8936002)(36756003)(4326008)(70206006)(70586007)(336012)(6286002)(508600001)(82310400003)(2616005)(54906003)(83380400001)(2906002)(5660300002)(316002)(26005)(47076005)(426003)(6916009)(1076003)(36860700001)(36906005)(7636003)(356005)(186003)(16526019)(6666004)(7696005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2021 08:31:59.0408 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8f12f80a-e332-4dec-9aed-08d94c2201c6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB2502 Subject: [dpdk-dev] [PATCH] net/mlx5: fix ROCE LAG bond device probing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The ROCE LAG bond device requires neither E-Switch nor SR-IOV configurations. It means the ROCE LAG bond device might be presented as a single port Infiniband device. The mlx5 PMD wrongly recognized standalone ROCE LAG bond device as E-Switch configuration, this triggered the calls of E-Switch ports related API and the latter failed (over the new OFED kernel driver, starting since 5.4.1), causing the overall device probe failure. If there is a single port Infiniband bond device found the E-Switch related flags must be cleared indicating standalone configuration. Also, it is not true anymore the bond device can exist over E-Switch configurations only (as it was claimed for VF LAG bond devices). The related checks are not relevant anymore and removed. Fixes: 790164ce1d2d ("net/mlx5: check kernel support for VF LAG bonding") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index aa5210fa45..e568cc9c48 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -2216,19 +2216,6 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, goto exit; } } -#ifndef HAVE_MLX5DV_DR_DEVX_PORT - if (bd >= 0) { - /* - * This may happen if there is VF LAG kernel support and - * application is compiled with older rdma_core library. - */ - DRV_LOG(ERR, - "No kernel/verbs support for VF LAG bonding found."); - rte_errno = ENOTSUP; - ret = -rte_errno; - goto exit; - } -#endif /* * Now we can determine the maximal * amount of devices to be spawned. @@ -2292,10 +2279,18 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, (list[ns].ifindex, &list[ns].info); } -#ifdef HAVE_MLX5DV_DR_DEVX_PORT if (!ret && bd >= 0) { switch (list[ns].info.name_type) { case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: + if (np == 1) { + /* + * Force standalone bonding + * device for ROCE LAG + * confgiurations. + */ + list[ns].info.master = 0; + list[ns].info.representor = 0; + } if (list[ns].info.port_name == bd) ns++; break; @@ -2312,7 +2307,6 @@ mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev, } continue; } -#endif if (!ret && (list[ns].info.representor ^ list[ns].info.master)) ns++; -- 2.18.1