From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C98C8A0C40; Fri, 30 Jul 2021 18:10:27 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B524440A4B; Fri, 30 Jul 2021 18:10:27 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 676E540141 for ; Fri, 30 Jul 2021 18:10:26 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 16UG5OE8024882 for ; Fri, 30 Jul 2021 09:10:25 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=LLzAoDZn8Gu8fLISei6ZpsrQOLHHmSdAn0FwgZHXbYg=; b=d0Iz8Oqz89Czr9SLDn0NGrWRPhijLjjnMvDlbvwpgGyq1YzVJci0hyh6w2Y+hDvis5hA 2Qk0Md44VHb88/OxCerPP4MXFpUJySSJbyodgywribf536pnne71NSG/Gwp1twkNUOYn btNqaSeYg3VjAlrnF9S7K1rlfFV3R1dUP01ff8bRI4QUY1cXilUIpgXLUUn3M4MJD/nC xYMtVT5UYTGBK2oci7YCXoP1InrXnfhU0NOUGYYEcCOPC16UVFuALf9ziuw8JviBN8kE mZr6H7vFA1LOs2ABJFcHYpLwJKIMLKKQlYeW3GSm3qbQwygh8/6Mkxwd/Y5eA/6zzV9H bw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3a456ttvv9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 30 Jul 2021 09:10:25 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 30 Jul 2021 09:10:23 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 30 Jul 2021 09:10:23 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id 69DFC3F7067; Fri, 30 Jul 2021 09:10:21 -0700 (PDT) From: Harman Kalra To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Harman Kalra Date: Fri, 30 Jul 2021 21:40:08 +0530 Message-ID: <20210730161009.14383-2-hkalra@marvell.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730161009.14383-1-hkalra@marvell.com> References: <20210730161009.14383-1-hkalra@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: F13XXUFk8h0M7k7IAcpwPlyWY4sNNNJM X-Proofpoint-ORIG-GUID: F13XXUFk8h0M7k7IAcpwPlyWY4sNNNJM X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-30_11:2021-07-30, 2021-07-30 signatures=0 Subject: [dpdk-dev] [PATCH 2/2] common/cnxk: update npc mcam range for 98xx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" NPC mcam entry distribution is based on maximum number of PFs and LFs available. Fixing the max no of PFs and LFs available on 98xx to fix the mcam alloc entry range. Signed-off-by: Harman Kalra --- drivers/common/cnxk/roc_npc.c | 2 ++ drivers/common/cnxk/roc_npc_priv.h | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c index aff4eef554..27a7f20226 100644 --- a/drivers/common/cnxk/roc_npc.c +++ b/drivers/common/cnxk/roc_npc.c @@ -108,6 +108,8 @@ roc_npc_get_low_priority_mcam(struct roc_npc *roc_npc) if (roc_model_is_cn10k()) return (npc->mcam_entries - NPC_MCAME_RESVD_10XX - 1); + else if (roc_model_is_cn98xx()) + return (npc->mcam_entries - NPC_MCAME_RESVD_98XX - 1); else return (npc->mcam_entries - NPC_MCAME_RESVD_9XXX - 1); } diff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h index 5b884e3fd4..365701a545 100644 --- a/drivers/common/cnxk/roc_npc_priv.h +++ b/drivers/common/cnxk/roc_npc_priv.h @@ -46,10 +46,12 @@ #define NPC_MCAM_KEY_X4_WORDS 7 /* Number of 64-bit words */ #define NPC_RVUPF_MAX_9XXX 0x10 /* HRM: RVU_PRIV_CONST */ +#define NPC_RVUPF_MAX_98XX 0x18 /* HRM: RVU_PRIV_CONST */ #define NPC_RVUPF_MAX_10XX 0x20 /* HRM: RVU_PRIV_CONST */ #define NPC_NIXLF_MAX 0x80 /* HRM: NIX_AF_CONST2 */ #define NPC_MCAME_PER_PF 3 /* DRV: RSVD_MCAM_ENTRIES_PER_PF */ #define NPC_MCAME_PER_LF 1 /* DRV: RSVD_MCAM_ENTRIES_PER_NIXLF */ +#define NPC_NIXLF_MAX_98XX (2 * NPC_NIXLF_MAX) /*2 NIXLFs */ #define NPC_MCAME_RESVD_9XXX \ (NPC_NIXLF_MAX * NPC_MCAME_PER_LF + \ (NPC_RVUPF_MAX_9XXX - 1) * NPC_MCAME_PER_PF) @@ -58,6 +60,10 @@ (NPC_NIXLF_MAX * NPC_MCAME_PER_LF + \ (NPC_RVUPF_MAX_10XX - 1) * NPC_MCAME_PER_PF) +#define NPC_MCAME_RESVD_98XX \ + (NPC_NIXLF_MAX_98XX * NPC_MCAME_PER_LF + \ + (NPC_RVUPF_MAX_98XX - 1) * NPC_MCAME_PER_PF) + enum npc_err_status { NPC_ERR_PARAM = -1024, NPC_ERR_NO_MEM, -- 2.18.0