From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3A1B7A0C41; Mon, 2 Aug 2021 12:20:25 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 25CD74113F; Mon, 2 Aug 2021 12:20:25 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id 16E3C4113E for ; Mon, 2 Aug 2021 12:20:23 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 908F8D6E; Mon, 2 Aug 2021 03:20:22 -0700 (PDT) Received: from net-arm-n1sdp.shanghai.arm.com (net-arm-n1sdp.shanghai.arm.com [10.169.208.222]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D7EE23F70D; Mon, 2 Aug 2021 03:20:15 -0700 (PDT) From: Joyce Kong To: thomas@monjalon.net, david.marchand@redhat.com, honnappa.nagarahalli@arm.com, ruifeng.wang@arm.com, konstantin.ananyev@intel.com, rsanford@akamai.com, erik.g.carrillo@intel.com, olivier.matz@6wind.com, yipeng1.wang@intel.com, sameh.gobriel@intel.com, bruce.richardson@intel.com, vladimir.medvedkin@intel.com, anatoly.burakov@intel.com, andrew.rybchenko@oktetlabs.ru, jerinj@marvell.com, declan.doherty@intel.com, ciara.power@intel.com, xiaoyun.li@intel.com, nicolas.chautru@intel.com, maryam.tahhan@intel.com, reshma.pattan@intel.com, cristian.dumitrescu@intel.com Cc: dev@dpdk.org, nd@arm.com Date: Mon, 2 Aug 2021 05:18:39 -0500 Message-Id: <20210802101847.3462-5-joyce.kong@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210802101847.3462-1-joyce.kong@arm.com> References: <20210802101847.3462-1-joyce.kong@arm.com> Subject: [dpdk-dev] [PATCH v1 04/12] test/stack_perf: use compiler atomics for lcore sync X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Convert rte_atomic usages to compiler atomic built-ins for lcore sync in stack_perf test cases. Signed-off-by: Joyce Kong Reviewed-by: Ruifeng Wang --- app/test/test_stack_perf.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/app/test/test_stack_perf.c b/app/test/test_stack_perf.c index 4ee40d5d19..1eae00a334 100644 --- a/app/test/test_stack_perf.c +++ b/app/test/test_stack_perf.c @@ -6,7 +6,6 @@ #include #include -#include #include #include #include @@ -24,7 +23,7 @@ */ static volatile unsigned int bulk_sizes[] = {8, MAX_BURST}; -static rte_atomic32_t lcore_barrier; +static uint32_t lcore_barrier; struct lcore_pair { unsigned int c1; @@ -144,9 +143,8 @@ bulk_push_pop(void *p) s = args->s; size = args->sz; - rte_atomic32_sub(&lcore_barrier, 1); - while (rte_atomic32_read(&lcore_barrier) != 0) - rte_pause(); + __atomic_fetch_sub(&lcore_barrier, 1, __ATOMIC_RELAXED); + rte_wait_until_equal_32(&lcore_barrier, 0, __ATOMIC_RELAXED); uint64_t start = rte_rdtsc(); @@ -175,7 +173,7 @@ run_on_core_pair(struct lcore_pair *cores, struct rte_stack *s, unsigned int i; for (i = 0; i < RTE_DIM(bulk_sizes); i++) { - rte_atomic32_set(&lcore_barrier, 2); + __atomic_store_n(&lcore_barrier, 2, __ATOMIC_RELAXED); args[0].sz = args[1].sz = bulk_sizes[i]; args[0].s = args[1].s = s; @@ -208,7 +206,7 @@ run_on_n_cores(struct rte_stack *s, lcore_function_t fn, int n) int cnt = 0; double avg; - rte_atomic32_set(&lcore_barrier, n); + __atomic_store_n(&lcore_barrier, n, __ATOMIC_RELAXED); RTE_LCORE_FOREACH_WORKER(lcore_id) { if (++cnt >= n) @@ -302,7 +300,7 @@ __test_stack_perf(uint32_t flags) struct lcore_pair cores; struct rte_stack *s; - rte_atomic32_init(&lcore_barrier); + __atomic_store_n(&lcore_barrier, 0, __ATOMIC_RELAXED); s = rte_stack_create(STACK_NAME, STACK_SIZE, rte_socket_id(), flags); if (s == NULL) { -- 2.17.1