From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F0DCFA0C41; Mon, 2 Aug 2021 18:04:33 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 893CC41147; Mon, 2 Aug 2021 18:04:33 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id D2F2F40140 for ; Mon, 2 Aug 2021 18:04:31 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 172FtfrT009777; Mon, 2 Aug 2021 09:04:28 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0220; bh=sDKcfFwGCezuSzxlid4KJAjxMhVIQakNLsXHaLAhL+w=; b=A+6JP8wjwcgd44qds+OU5PrJ15GyYSGTsVZTEgbeGxUX5VRucGVK4/W5eSlelvz1ydPh BBUFUhgYA/DB3QDff59AE/waftKZv6yLuPBcemaRT7zX58rVPlT8QwUNWA283xahICh9 cQWnJqlcZXh5/7pSA+2B7o31QD29+AGNx3hpGMOWWjnCUxfD6ccHKjreuEEYksrMRa13 cAXPDg0FlfNhdwMCv3ScrokS77lHYPlrTwwmuubB9+SqmcM9MmQFpLerzxo0xFAwsJvf Iirru+ZDBrE0YefrhlgX57Z8TmzBSx9/0t4yNheuRlqAEh0se20tsFlFtKnoHD7txntZ FQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3a6b46sqbw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 02 Aug 2021 09:04:28 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 2 Aug 2021 09:04:26 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 2 Aug 2021 09:04:26 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id 4D1793F709B; Mon, 2 Aug 2021 09:04:24 -0700 (PDT) From: Harman Kalra To: , , , Ray Kinsella CC: , Harman Kalra Date: Mon, 2 Aug 2021 21:33:52 +0530 Message-ID: <20210802160352.135754-1-hkalra@marvell.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-GUID: y4iXE1PLBuRkl95bW9VbH2fBQzfi7Z2d X-Proofpoint-ORIG-GUID: y4iXE1PLBuRkl95bW9VbH2fBQzfi7Z2d X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-08-02_07:2021-08-02, 2021-08-02 signatures=0 Subject: [dpdk-dev] [PATCH] doc: announce: make rte intr handle internal X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Moving struct rte_intr_handle as an internal structure to avoid any ABI breakages in future. Since this structure defines some static arrays and changing respective macros breaks the ABI. Eg: Currently RTE_MAX_RXTX_INTR_VEC_ID imposes a limit of maximum 512 MSI-X interrupts that can be defined for a PCI device, while PCI specification allows maximum 2048 MSI-X interrupts that can be used. If some PCI device requires more than 512 vectors, either change the RTE_MAX_RXTX_INTR_VEC_ID limit or dynamically allocate based on PCI device MSI-X size on probe time. Either way its an ABI breakage. Discussion thread: https://mails.dpdk.org/archives/dev/2021-March/202959.html Change already included in 21.11 ABI improvement spreadsheet (item 42): https://docs.google.com/spreadsheets/d/1betlC000ua5SsSiJIcC54mCCCJnW6voH5Dqv9UxeyfE/edit#gid=0 Signed-off-by: Harman Kalra --- doc/guides/rel_notes/deprecation.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst index d9c0e65921..e95574b1ec 100644 --- a/doc/guides/rel_notes/deprecation.rst +++ b/doc/guides/rel_notes/deprecation.rst @@ -17,6 +17,9 @@ Deprecation Notices * eal: The function ``rte_eal_remote_launch`` will return new error codes after read or write error on the pipe, instead of calling ``rte_panic``. +* eal: Making ``struct rte_intr_handle`` internal to avoid any ABI breakages + in future. + * rte_atomicNN_xxx: These APIs do not take memory order parameter. This does not allow for writing optimized code for all the CPU architectures supported in DPDK. DPDK has adopted the atomic operations from -- 2.18.0