From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: junfeng.guo@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>
Subject: [dpdk-dev] [PATCH 19/28] net/ice/base: support FDIR for GTPU EH inner IPv6
Date: Tue, 10 Aug 2021 10:51:31 +0800 [thread overview]
Message-ID: <20210810025140.1698163-20-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20210810025140.1698163-1-qi.z.zhang@intel.com>
Supuport FDIR filtering for IPV4_GTPU_EH_IPV6 with inner
IPV6/UDP/TCP fields matching.
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_fdir.c | 352 ++++++++++++++++++++++++++------
drivers/net/ice/base/ice_type.h | 23 ++-
2 files changed, 309 insertions(+), 66 deletions(-)
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index e5ad0f298b..ae512e5695 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -97,6 +97,54 @@ static const u8 ice_fdir_tcp4_gtpu4_pkt[] = {
0x00, 0x00, 0x00, 0x00,
};
+static const u8 ice_fdir_ipv6_gtpu4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x4c, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x9e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x38,
+ 0x24, 0x42, 0x30, 0xff, 0x00, 0x28, 0x00, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x3b, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udp6_gtpu4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x54, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x40,
+ 0x4e, 0x3d, 0x30, 0xff, 0x00, 0x30, 0x00, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x08,
+ 0x11, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
+ 0xff, 0xdc, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_tcp6_gtpu4_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x62, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x4e,
+ 0x59, 0x08, 0x30, 0xff, 0x00, 0x3e, 0x00, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x16,
+ 0x06, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x14, 0x00, 0x50, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02,
+ 0x20, 0x00, 0x8f, 0x7b, 0x00, 0x00, 0x00, 0x00,
+};
+
static const u8 ice_fdir_ipv4_gtpu4_eh_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
@@ -140,6 +188,57 @@ static const u8 ice_fdir_tcp4_gtpu4_eh_pkt[] = {
0x00, 0x00, 0x00, 0x00,
};
+static const u8 ice_fdir_ipv6_gtpu4_eh_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x56, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x94, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x42,
+ 0x1e, 0x9d, 0x34, 0xff, 0x00, 0x32, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x02,
+ 0x3b, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udp6_gtpu4_eh_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x5e, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x8c, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x4a,
+ 0x48, 0x9a, 0x34, 0xff, 0x00, 0x3a, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x0a,
+ 0x11, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
+ 0xff, 0xd8, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_tcp6_gtpu4_eh_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x6a, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x80, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x56,
+ 0x53, 0x6b, 0x34, 0xff, 0x00, 0x46, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x16,
+ 0x06, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02,
+ 0x20, 0x00, 0x8f, 0xdf, 0x00, 0x00, 0x00, 0x00,
+};
+
static const u8 ice_fdir_ipv4_gtpu4_eh_dw_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
@@ -183,6 +282,57 @@ static const u8 ice_fdir_tcp4_gtpu4_eh_dw_pkt[] = {
0x00, 0x00, 0x00, 0x00,
};
+static const u8 ice_fdir_ipv6_gtpu4_eh_dw_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x56, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x94, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x42,
+ 0x1e, 0x9d, 0x34, 0xff, 0x00, 0x32, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x02,
+ 0x3b, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_udp6_gtpu4_eh_dw_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x5e, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x8c, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x4a,
+ 0x48, 0x9a, 0x34, 0xff, 0x00, 0x3a, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x0a,
+ 0x11, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
+ 0xff, 0xd8, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_tcp6_gtpu4_eh_dw_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+ 0x00, 0x6a, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x80, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x56,
+ 0x53, 0x6b, 0x34, 0xff, 0x00, 0x46, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x16,
+ 0x06, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02,
+ 0x20, 0x00, 0x8f, 0xdf, 0x00, 0x00, 0x00, 0x00,
+};
+
static const u8 ice_fdir_ipv4_gtpu4_eh_up_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
@@ -226,67 +376,70 @@ static const u8 ice_fdir_tcp4_gtpu4_eh_up_pkt[] = {
0x00, 0x00, 0x00, 0x00,
};
-static const u8 ice_fdir_icmp4_gtpu4_pkt[] = {
+static const u8 ice_fdir_ipv6_gtpu4_eh_up_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
- 0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00,
- 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00,
- 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x01,
+ 0x00, 0x56, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x94, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x42,
+ 0x1e, 0x8d, 0x34, 0xff, 0x00, 0x32, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x10,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x02,
+ 0x3b, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00,
};
-static const u8 ice_fdir_ipv6_gtpu4_pkt[] = {
+static const u8 ice_fdir_udp6_gtpu4_eh_up_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
- 0x00, 0x4c, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
- 0x7c, 0x9e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x38,
- 0x24, 0x42, 0x30, 0xff, 0x00, 0x28, 0x00, 0x00,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x3b, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x5e, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x8c, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x4a,
+ 0x48, 0x8a, 0x34, 0xff, 0x00, 0x3a, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x10,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x0a,
+ 0x11, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
+ 0xff, 0xd8, 0x00, 0x00,
};
-static const u8 ice_fdir_udp6_gtpu4_pkt[] = {
+static const u8 ice_fdir_tcp6_gtpu4_eh_up_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
- 0x00, 0x54, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
- 0x7c, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x40,
- 0x4e, 0x3d, 0x30, 0xff, 0x00, 0x30, 0x00, 0x00,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x08,
- 0x11, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x6a, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
+ 0x7c, 0x80, 0x7f, 0x00, 0x00, 0x01, 0x7f, 0x00,
+ 0x00, 0x01, 0x08, 0x68, 0x08, 0x68, 0x00, 0x56,
+ 0x53, 0x5b, 0x34, 0xff, 0x00, 0x46, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x01, 0x10,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x16,
+ 0x06, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
- 0xff, 0xdc, 0x00, 0x00,
+ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02,
+ 0x20, 0x00, 0x8f, 0xdf, 0x00, 0x00, 0x00, 0x00,
};
-static const u8 ice_fdir_tcp6_gtpu4_pkt[] = {
+static const u8 ice_fdir_icmp4_gtpu4_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
- 0x00, 0x62, 0x00, 0x01, 0x00, 0x00, 0x40, 0x11,
- 0x7c, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x4e,
- 0x59, 0x08, 0x30, 0xff, 0x00, 0x3e, 0x00, 0x00,
- 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x16,
- 0x06, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00,
+ 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00,
+ 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x01,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x14, 0x00, 0x50, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x02,
- 0x20, 0x00, 0x8f, 0x7b, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
};
static const u8 ice_fdir_ipv6_gtpu6_pkt[] = {
@@ -971,6 +1124,27 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
sizeof(ice_fdir_tcp4_gtpu4_pkt),
ice_fdir_tcp4_gtpu4_pkt,
},
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6,
+ sizeof(ice_fdir_ipv6_gtpu4_pkt),
+ ice_fdir_ipv6_gtpu4_pkt,
+ sizeof(ice_fdir_ipv6_gtpu4_pkt),
+ ice_fdir_ipv6_gtpu4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_UDP,
+ sizeof(ice_fdir_udp6_gtpu4_pkt),
+ ice_fdir_udp6_gtpu4_pkt,
+ sizeof(ice_fdir_udp6_gtpu4_pkt),
+ ice_fdir_udp6_gtpu4_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_TCP,
+ sizeof(ice_fdir_tcp6_gtpu4_pkt),
+ ice_fdir_tcp6_gtpu4_pkt,
+ sizeof(ice_fdir_tcp6_gtpu4_pkt),
+ ice_fdir_tcp6_gtpu4_pkt,
+ },
{
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4,
sizeof(ice_fdir_ipv4_gtpu4_eh_pkt),
@@ -992,6 +1166,27 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
sizeof(ice_fdir_tcp4_gtpu4_eh_pkt),
ice_fdir_tcp4_gtpu4_eh_pkt,
},
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6,
+ sizeof(ice_fdir_ipv6_gtpu4_eh_pkt),
+ ice_fdir_ipv6_gtpu4_eh_pkt,
+ sizeof(ice_fdir_ipv6_gtpu4_eh_pkt),
+ ice_fdir_ipv6_gtpu4_eh_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_UDP,
+ sizeof(ice_fdir_udp6_gtpu4_eh_pkt),
+ ice_fdir_udp6_gtpu4_eh_pkt,
+ sizeof(ice_fdir_udp6_gtpu4_eh_pkt),
+ ice_fdir_udp6_gtpu4_eh_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_TCP,
+ sizeof(ice_fdir_tcp6_gtpu4_eh_pkt),
+ ice_fdir_tcp6_gtpu4_eh_pkt,
+ sizeof(ice_fdir_tcp6_gtpu4_eh_pkt),
+ ice_fdir_tcp6_gtpu4_eh_pkt,
+ },
{
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4,
sizeof(ice_fdir_ipv4_gtpu4_eh_dw_pkt),
@@ -1013,6 +1208,27 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
sizeof(ice_fdir_tcp4_gtpu4_eh_dw_pkt),
ice_fdir_tcp4_gtpu4_eh_dw_pkt,
},
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6,
+ sizeof(ice_fdir_ipv6_gtpu4_eh_dw_pkt),
+ ice_fdir_ipv6_gtpu4_eh_dw_pkt,
+ sizeof(ice_fdir_ipv6_gtpu4_eh_dw_pkt),
+ ice_fdir_ipv6_gtpu4_eh_dw_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_UDP,
+ sizeof(ice_fdir_udp6_gtpu4_eh_dw_pkt),
+ ice_fdir_udp6_gtpu4_eh_dw_pkt,
+ sizeof(ice_fdir_udp6_gtpu4_eh_dw_pkt),
+ ice_fdir_udp6_gtpu4_eh_dw_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_TCP,
+ sizeof(ice_fdir_tcp6_gtpu4_eh_dw_pkt),
+ ice_fdir_tcp6_gtpu4_eh_dw_pkt,
+ sizeof(ice_fdir_tcp6_gtpu4_eh_dw_pkt),
+ ice_fdir_tcp6_gtpu4_eh_dw_pkt,
+ },
{
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4,
sizeof(ice_fdir_ipv4_gtpu4_eh_up_pkt),
@@ -1034,6 +1250,27 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
sizeof(ice_fdir_tcp4_gtpu4_eh_up_pkt),
ice_fdir_tcp4_gtpu4_eh_up_pkt,
},
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6,
+ sizeof(ice_fdir_ipv6_gtpu4_eh_up_pkt),
+ ice_fdir_ipv6_gtpu4_eh_up_pkt,
+ sizeof(ice_fdir_ipv6_gtpu4_eh_up_pkt),
+ ice_fdir_ipv6_gtpu4_eh_up_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_UDP,
+ sizeof(ice_fdir_udp6_gtpu4_eh_up_pkt),
+ ice_fdir_udp6_gtpu4_eh_up_pkt,
+ sizeof(ice_fdir_udp6_gtpu4_eh_up_pkt),
+ ice_fdir_udp6_gtpu4_eh_up_pkt,
+ },
+ {
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_TCP,
+ sizeof(ice_fdir_tcp6_gtpu4_eh_up_pkt),
+ ice_fdir_tcp6_gtpu4_eh_up_pkt,
+ sizeof(ice_fdir_tcp6_gtpu4_eh_up_pkt),
+ ice_fdir_tcp6_gtpu4_eh_up_pkt,
+ },
{
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
sizeof(ice_fdir_icmp4_gtpu4_pkt),
@@ -1048,27 +1285,6 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
sizeof(ice_fdir_ipv4_gtpu4_pkt),
ice_fdir_ipv4_gtpu4_pkt,
},
- {
- ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6,
- sizeof(ice_fdir_ipv6_gtpu4_pkt),
- ice_fdir_ipv6_gtpu4_pkt,
- sizeof(ice_fdir_ipv6_gtpu4_pkt),
- ice_fdir_ipv6_gtpu4_pkt,
- },
- {
- ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_UDP,
- sizeof(ice_fdir_udp6_gtpu4_pkt),
- ice_fdir_udp6_gtpu4_pkt,
- sizeof(ice_fdir_udp6_gtpu4_pkt),
- ice_fdir_udp6_gtpu4_pkt,
- },
- {
- ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_TCP,
- sizeof(ice_fdir_tcp6_gtpu4_pkt),
- ice_fdir_tcp6_gtpu4_pkt,
- sizeof(ice_fdir_tcp6_gtpu4_pkt),
- ice_fdir_tcp6_gtpu4_pkt,
- },
{
ICE_FLTR_PTYPE_NONF_IPV6_GTPU,
sizeof(ice_fdir_ipv6_gtpu6_pkt),
@@ -1777,12 +1993,21 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_UDP:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_TCP:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4_UDP:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_TCP:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4_UDP:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_TCP:
ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt,
ice_fdir_pkt[idx].tun_pkt_len,
ICE_NONDMA_TO_NONDMA);
@@ -2055,6 +2280,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
ice_pkt_insert_u8(loc, ICE_IPV4_NO_MAC_TTL_OFFSET, input->ip.v4.ttl);
break;
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6:
ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
input->ip.v6.src_ip);
ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
@@ -2065,6 +2293,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
input->ip.v6.proto);
break;
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_UDP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_UDP:
ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
input->ip.v6.src_ip);
ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
@@ -2077,6 +2308,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
ice_pkt_insert_u8(loc, ICE_IPV6_NO_MAC_HLIM_OFFSET, input->ip.v6.hlim);
break;
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_TCP:
+ case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_TCP:
ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_DST_ADDR_OFFSET,
input->ip.v6.src_ip);
ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_NO_MAC_SRC_ADDR_OFFSET,
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index f7aa5f6139..b76404f085 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -306,28 +306,37 @@ enum ice_fltr_ptype {
ICE_FLTR_PTYPE_NONF_IPV4_SCTP,
ICE_FLTR_PTYPE_NONF_IPV4_OTHER,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU,
- ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH,
- ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW,
- ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP,
- ICE_FLTR_PTYPE_NONF_IPV6_GTPU,
- ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH,
- ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_DW,
- ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_UP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_UDP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_UDP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4_UDP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_DW_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4_UDP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV4_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_UDP,
+ ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_UP_IPV6_TCP,
+ ICE_FLTR_PTYPE_NONF_IPV6_GTPU,
+ ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH,
+ ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_DW,
+ ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_UP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER,
--
2.26.2
next prev parent reply other threads:[~2021-08-10 2:50 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-10 2:51 [dpdk-dev] [PATCH 00/28] ice: base code update Qi Zhang
2021-08-10 2:51 ` [dpdk-dev] [PATCH 01/28] net/ice/base: add 1588 capability probe Qi Zhang
2021-08-10 4:31 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 02/28] net/ice/base: add low level functions for device clock control Qi Zhang
2021-08-10 4:33 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 03/28] net/ice/base: add ethertype IPv6 check for dummy packet Qi Zhang
2021-08-10 4:34 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 04/28] net/ice/base: change dummy packets with VLAN Qi Zhang
2021-08-10 4:35 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 05/28] net/ice/base: add timestamp masks Qi Zhang
2021-08-10 4:35 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 06/28] net/ice/base: add clock initialization function Qi Zhang
2021-08-10 4:36 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 07/28] net/ice/base: add accessors to get/set the time reference Qi Zhang
2021-08-10 4:37 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 08/28] net/ice/base: print human-friendly PHY types Qi Zhang
2021-08-10 4:37 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 09/28] net/ice/base: implement Vernier calibration logic for E822 devices Qi Zhang
2021-08-10 4:38 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 10/28] net/ice/base: clarify comments on checking PFC mode Qi Zhang
2021-08-10 4:39 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 11/28] net/ice/base: add support for starting PHY in bypass mode Qi Zhang
2021-08-10 4:39 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 12/28] net/ice/base: add E810T check function Qi Zhang
2021-08-10 4:39 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 13/28] net/ice/base: implement firmware debug dump Qi Zhang
2021-08-10 4:40 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 14/28] net/ice/base: add new AQ description Qi Zhang
2021-08-10 4:40 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 15/28] net/ice/base: refine MAC rule adding Qi Zhang
2021-08-10 4:41 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 16/28] net/ice/base: support TC nodes PIR configuration Qi Zhang
2021-08-10 4:41 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 17/28] net/ice/base: support FDIR for GRE tunnel packet Qi Zhang
2021-08-10 4:41 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 18/28] net/ice/base: support RSS " Qi Zhang
2021-08-10 4:42 ` Guo, Junfeng
2021-08-10 2:51 ` Qi Zhang [this message]
2021-08-10 4:43 ` [dpdk-dev] [PATCH 19/28] net/ice/base: support FDIR for GTPU EH inner IPv6 Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 20/28] net/ice/base: support RSS for GTPoGRE Qi Zhang
2021-08-10 4:43 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 21/28] net/ice/base: enable NVM update reset capabilities Qi Zhang
2021-08-10 4:43 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 22/28] net/ice/base: support FDIR for GTPoGRE Qi Zhang
2021-08-10 4:44 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 23/28] net/ice/base: add RSS support for IPv4/L4 checksum Qi Zhang
2021-08-10 4:45 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 24/28] net/ice/base: enable jumbo frame support during HW init Qi Zhang
2021-08-10 4:45 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 25/28] net/ice/base: support FDIR for GTPU UL/DL with QFI fields Qi Zhang
2021-08-10 4:46 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 26/28] net/ice/base: rename and add a setter function Qi Zhang
2021-08-10 4:46 ` Guo, Junfeng
2021-08-10 2:51 ` [dpdk-dev] [PATCH 27/28] net/ice/base: correct spellling of word data Qi Zhang
2021-08-10 4:46 ` Guo, Junfeng
2021-08-13 16:50 ` Ferruh Yigit
2021-08-13 16:53 ` Ferruh Yigit
2021-08-10 2:51 ` [dpdk-dev] [PATCH 28/28] net/ice/base: update Max TCAM/PTG Per Profile Qi Zhang
2021-08-10 4:47 ` Guo, Junfeng
2021-08-11 2:25 ` [dpdk-dev] [PATCH 00/28] ice: base code update Zhang, Qi Z
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