From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D7C16A0C53; Tue, 10 Aug 2021 09:22:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 99EC240E6E; Tue, 10 Aug 2021 09:22:56 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 7C9554068E for ; Tue, 10 Aug 2021 09:22:54 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 17A7AEuH021878 for ; Tue, 10 Aug 2021 00:22:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=5u+IGfWlQXWx37uhM7tjSL8oawzPIldpaiZ4I7/dyNc=; b=lWPDuLdbnxZtyVedV83KKsV2P/zaZXlHC3LXc1ZUUPOy0OilIxCeOiqrmpAIxzUyxfQv 2obOLdEbwNOk97v43HBa1tzWSiO2u8vHRrq9tV5H99OYSM7pvgCZtEVvWEyLf5fjxbDV ByKnIMeGqTe8OSTbgIoju8An2ZsjiCbNwYBV35cUXfCEO7X6gg0KX/DHWooJ/PfJxji2 c3mkdXFm9FH1Cvo7X7CzqrNrTN5Y3VXYX3fj8ddP+6tfJxLZObfw4MiJsAg7eDNTUP/6 OKPPKcs4fjUIzbN33eydeNWo/E0P6LIsvsMzlNqfV6FnvcjVxet4cKARDwQMziQUhRhJ OQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 3aaxfkkw3b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 10 Aug 2021 00:22:53 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 10 Aug 2021 00:22:51 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 10 Aug 2021 00:22:51 -0700 Received: from localhost.localdomain (unknown [10.28.48.102]) by maili.marvell.com (Postfix) with ESMTP id B1A14626774; Tue, 10 Aug 2021 00:22:49 -0700 (PDT) From: Hanumanth Reddy Pothula To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: , Hanumanth Reddy Pothula Date: Tue, 10 Aug 2021 12:51:00 +0530 Message-ID: <20210810072100.4233-1-hpothula@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 6mr2toahe6HBXi-72XJIOGvqQ0L68GPV X-Proofpoint-GUID: 6mr2toahe6HBXi-72XJIOGvqQ0L68GPV X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-08-10_02:2021-08-06, 2021-08-10 signatures=0 Subject: [dpdk-dev] [PATCH] net/octeontx2: configure MTU value correctly X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Update MTU value based on PTP enable status and reserve eight bytes in TX path to accommodate VLAN tags. If PTP is enabled maximum allowed MTU is 9200 otherwise it's 9208. Signed-off-by: Hanumanth Reddy Pothula --- drivers/net/octeontx2/otx2_ethdev_ops.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c index 5a4501208e..552e6bd43d 100644 --- a/drivers/net/octeontx2/otx2_ethdev_ops.c +++ b/drivers/net/octeontx2/otx2_ethdev_ops.c @@ -17,7 +17,8 @@ otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) struct nix_frs_cfg *req; int rc; - frame_size += NIX_TIMESYNC_RX_OFFSET * otx2_ethdev_is_ptp_en(dev); + if (dev->configured && otx2_ethdev_is_ptp_en(dev)) + frame_size += NIX_TIMESYNC_RX_OFFSET; /* Check if MTU is within the allowed range */ if (frame_size < NIX_MIN_FRS || frame_size > NIX_MAX_FRS) @@ -547,6 +548,11 @@ otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo) devinfo->max_vfs = pci_dev->max_vfs; devinfo->max_mtu = devinfo->max_rx_pktlen - NIX_L2_OVERHEAD; devinfo->min_mtu = devinfo->min_rx_bufsize - NIX_L2_OVERHEAD; + if (dev->configured && otx2_ethdev_is_ptp_en(dev)) { + devinfo->max_mtu -= NIX_TIMESYNC_RX_OFFSET; + devinfo->min_mtu -= NIX_TIMESYNC_RX_OFFSET; + devinfo->max_rx_pktlen -= NIX_TIMESYNC_RX_OFFSET; + } devinfo->rx_offload_capa = dev->rx_offload_capa; devinfo->tx_offload_capa = dev->tx_offload_capa; -- 2.25.1