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From: Qiming Chen <chenqiming_huawei@163.com>
To: dev@dpdk.org
Cc: beilei.xing@intel.com, Qiming Chen <chenqiming_huawei@163.com>
Subject: [dpdk-dev] [PATCH] net/i40e: solve vf rxq buf size alignment
Date: Mon, 23 Aug 2021 12:11:05 +0800	[thread overview]
Message-ID: <20210823041105.8006-1-chenqiming_huawei@163.com> (raw)

The RTE_ALIGN macro is aligned upwards. If the buf_size variable is not
aligned with 1 << I40E_RXQ_CTX_DBUFF_SHIFT, the rx_buf_len is larger than
the actual mbuf memory after the operation. When receiving the packet, if
the packet is larger than the configured buf_size, it will cause a memory
stepping event.

The patch uses the RTE_ALIGN_FLOOR down alignment macro to correct the
problem.

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
---
 drivers/net/i40e/i40e_ethdev_vf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c
index 924da8dfb4..5b1c8e76ab 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -1927,7 +1927,7 @@ i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
 					RTE_PKTMBUF_HEADROOM);
 	rxq->hs_mode = i40e_header_split_none;
 	rxq->rx_hdr_len = 0;
-	rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
+	rxq->rx_buf_len = RTE_ALIGN_FLOOR(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
 	len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
 	rxq->max_pkt_len = RTE_MIN(len,
 		dev_data->dev_conf.rxmode.max_rx_pkt_len);
-- 
2.30.1.windows.1


             reply	other threads:[~2021-08-23  4:11 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-23  4:11 Qiming Chen [this message]
2021-09-06  1:49 ` Zhang, Qi Z

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