From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 99729A0C58; Mon, 23 Aug 2021 21:41:50 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F1BCC411EA; Mon, 23 Aug 2021 21:41:06 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id DB8E4411F3 for ; Mon, 23 Aug 2021 21:41:04 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.0.43) with SMTP id 17NDcCBR018249; Mon, 23 Aug 2021 12:41:03 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=MY3ouYdoz7lW0V5tzYxB77Y5RE9xj3GKYLuoNg4NXLM=; b=ILX19PY4AWCoMzaGJSYAcv81Un2BrpXZV12SHwIwzLOREurBU2vvFU7DMnPq2Xu0MNwN vTnEaQQDbmF2PnJBT+ZyI4Z1RjKvtHoKBylZMNQnwoTlaw3b+RyAtjPG8sCJq17CL5eH Xk7v8JgrO21Z9vkHN2jXzxbRrUdLvMYbg5qGPkbfbeU7Ppyp3/U6c2joT28fCSEcjsUa WMZEWwOPo1PF9BqwgEX/vC3HKefdc1SlqH6xSDaO3SxamEASpLY5Cur4VMHcCMq0O+67 SyOYIdg9aGRVjkqaXKr4MOfTONeOHucS/OeVQhiXyijRh79AP/Waip13XzatN3PnfOC0 hQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 3am1fk3ebh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 23 Aug 2021 12:41:03 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 23 Aug 2021 12:41:01 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 23 Aug 2021 12:41:01 -0700 Received: from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176]) by maili.marvell.com (Postfix) with ESMTP id 006665B6924; Mon, 23 Aug 2021 12:40:59 -0700 (PDT) From: To: , Erik Gabriel Carrillo CC: , , Pavan Nikhilesh Date: Tue, 24 Aug 2021 01:10:15 +0530 Message-ID: <20210823194020.1229-11-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210823194020.1229-1-pbhagavatula@marvell.com> References: <20210823194020.1229-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 3QJept9EpnubUnMMN4mKyEkfGljw3sMr X-Proofpoint-ORIG-GUID: 3QJept9EpnubUnMMN4mKyEkfGljw3sMr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-08-23_04,2021-08-23_01,2020-04-07_01 Subject: [dpdk-dev] [RFC 11/15] eventdev: reserve fields in timer object X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Reserve fields in rte_event_timer data structure to address future use cases. Also, remove volatile from rte_event_timer. Signed-off-by: Pavan Nikhilesh --- lib/eventdev/rte_event_timer_adapter.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h index cad6d3b4c5..9499460a61 100644 --- a/lib/eventdev/rte_event_timer_adapter.h +++ b/lib/eventdev/rte_event_timer_adapter.h @@ -475,7 +475,7 @@ struct rte_event_timer { * - op: RTE_EVENT_OP_NEW * - event_type: RTE_EVENT_TYPE_TIMER */ - volatile enum rte_event_timer_state state; + enum rte_event_timer_state state; /**< State of the event timer. */ uint64_t timeout_ticks; /**< Expiry timer ticks expressed in number of *timer_ticks_ns* from @@ -492,6 +492,8 @@ struct rte_event_timer { /**< Memory to store user specific metadata. * The event timer adapter implementation should not modify this area. */ + uint64_t rsvd[2]; + /**< Reserved fields for future use. */ } __rte_cache_aligned; typedef uint16_t (*rte_event_timer_arm_burst_t)( -- 2.17.1