From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5A895A0C4D; Tue, 31 Aug 2021 06:16:29 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 20316410D8; Tue, 31 Aug 2021 06:16:29 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 70519406A2 for ; Tue, 31 Aug 2021 06:16:27 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 17UNUDID017928; Mon, 30 Aug 2021 21:16:24 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=vfmY9JFCjdvocojdrLN7K9dcEX1UgO3rMwnLhXzRpGs=; b=kLhChuOp0UY5JuvqKHIi22RHMusWXC0N8JRXdJwpwqJJt68bBd+u7p3KSGnoeS5UzCfy oRIfF8CYM+Pwvnj1tFlRCDGdSprcuybf/OrVKOeJuf8C/zmmUIdZEGiZciDlG1WewOyi y0uyC2rg3tN9AJ+oOWvJudk5ale5rzoskWvGxzMAjCECoiGkOjw9LwxRy2TB6oGYwU4y BtdG2/11PKNb/nIw+oCA1KfpgZvXDP8BhEjvBpa8Khk5AyfU+DpWIgp23e1JA5xjimqv dkbzQpXGixQUXnFY3pFNaW66DXkaXeO/IivhKx6fajDSGXAHd9tjFCmnUVg/uli33L9O Kw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3as92bgr5s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 30 Aug 2021 21:16:24 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 30 Aug 2021 21:16:21 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 30 Aug 2021 21:16:22 -0700 Received: from localhost.localdomain (unknown [10.28.34.33]) by maili.marvell.com (Postfix) with ESMTP id 7F9915B6938; Mon, 30 Aug 2021 21:16:19 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ray Kinsella CC: , Satheesh Paul Date: Tue, 31 Aug 2021 09:46:14 +0530 Message-ID: <20210831041614.3453698-1-psatheesh@marvell.com> X-Mailer: git-send-email 2.25.4 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: bckey5VudRX38slJF2joM_LnMFuLRD9a X-Proofpoint-GUID: bckey5VudRX38slJF2joM_LnMFuLRD9a X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-08-30_06,2021-08-30_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH] common/cnxk: add ROC API to merge base steering rule X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Satheesh Paul This patch adds an ROC API to merge base steering rule with rules added by VF. Signed-off-by: Satheesh Paul Reviewed-by: Kiran Kumar Kokkilagadda --- drivers/common/cnxk/roc_npc.c | 27 +++++++++++++++++++++++++++ drivers/common/cnxk/roc_npc.h | 5 ++--- drivers/common/cnxk/version.map | 1 + 3 files changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c index aff4eef554..53074bed99 100644 --- a/drivers/common/cnxk/roc_npc.c +++ b/drivers/common/cnxk/roc_npc.c @@ -1136,3 +1136,30 @@ roc_npc_flow_dump(FILE *file, struct roc_npc *roc_npc) } } } + +int +roc_npc_mcam_merge_base_steering_rule(struct roc_npc *roc_npc, + struct roc_npc_flow *flow) +{ + struct npc_mcam_read_base_rule_rsp *base_rule_rsp; + struct npc *npc = roc_npc_to_npc_priv(roc_npc); + struct mcam_entry *base_entry; + int idx, rc; + + if (roc_nix_is_pf(roc_npc->roc_nix)) + return 0; + + (void)mbox_alloc_msg_npc_read_base_steer_rule(npc->mbox); + rc = mbox_process_msg(npc->mbox, (void *)&base_rule_rsp); + if (rc) { + plt_err("Failed to fetch VF's base MCAM entry"); + return rc; + } + base_entry = &base_rule_rsp->entry_data; + for (idx = 0; idx < ROC_NPC_MAX_MCAM_WIDTH_DWORDS; idx++) { + flow->mcam_data[idx] |= base_entry->kw[idx]; + flow->mcam_mask[idx] |= base_entry->kw_mask[idx]; + } + + return 0; +} diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h index bab25fd72e..1f9d29e2dd 100644 --- a/drivers/common/cnxk/roc_npc.h +++ b/drivers/common/cnxk/roc_npc.h @@ -215,15 +215,12 @@ int __roc_api roc_npc_flow_parse(struct roc_npc *roc_npc, const struct roc_npc_action actions[], struct roc_npc_flow *flow); int __roc_api roc_npc_get_low_priority_mcam(struct roc_npc *roc_npc); - int __roc_api roc_npc_mcam_free_counter(struct roc_npc *roc_npc, uint16_t ctr_id); - int __roc_api roc_npc_mcam_read_counter(struct roc_npc *roc_npc, uint32_t ctr_id, uint64_t *count); int __roc_api roc_npc_mcam_clear_counter(struct roc_npc *roc_npc, uint32_t ctr_id); - int __roc_api roc_npc_mcam_free_all_resources(struct roc_npc *roc_npc); void __roc_api roc_npc_flow_dump(FILE *file, struct roc_npc *roc_npc); void __roc_api roc_npc_flow_mcam_dump(FILE *file, struct roc_npc *roc_npc, @@ -234,4 +231,6 @@ int __roc_api roc_npc_mark_actions_sub_return(struct roc_npc *roc_npc, int __roc_api roc_npc_vtag_actions_get(struct roc_npc *roc_npc); int __roc_api roc_npc_vtag_actions_sub_return(struct roc_npc *roc_npc, uint32_t count); +int __roc_api roc_npc_mcam_merge_base_steering_rule(struct roc_npc *roc_npc, + struct roc_npc_flow *flow); #endif /* _ROC_NPC_H_ */ diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 2cbcc4b93a..13231fcf04 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -234,6 +234,7 @@ INTERNAL { roc_npc_mcam_free_all_resources; roc_npc_mcam_free_counter; roc_npc_mcam_free_entry; + roc_npc_mcam_merge_base_steering_rule; roc_npc_mcam_write_entry; roc_npc_mcam_read_counter; roc_npc_profile_name_get; -- 2.25.4