[dpdk-dev] [PATCH 01/27] common/cnxk: update policer MBOX APIs and HW definitions

[dpdk-dev] [PATCH 01/27] common/cnxk: update policer MBOX APIs and HW definitions

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

To support ingress policer on CN10K, MBOX interfaces and HW
definitions are synced.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/hw/nix.h   | 13 ++++++++++---
 drivers/common/cnxk/roc_mbox.h | 34 +++++++++++++++++++++++++++++++++-
 2 files changed, 43 insertions(+), 4 deletions(-)

diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h
index 6b86002ead..53cdfbb142 100644
--- a/drivers/common/cnxk/hw/nix.h
+++ b/drivers/common/cnxk/hw/nix.h
@@ -692,9 +692,16 @@
 #define NIX_RX_BAND_PROF_ACTIONRESULT_DROP (0x1ull) /* [CN10K, .) */
 #define NIX_RX_BAND_PROF_ACTIONRESULT_RED  (0x2ull) /* [CN10K, .) */
 
-#define NIX_RX_BAND_PROF_LAYER_LEAF   (0x0ull) /* [CN10K, .) */
-#define NIX_RX_BAND_PROF_LAYER_MIDDLE (0x1ull) /* [CN10K, .) */
-#define NIX_RX_BAND_PROF_LAYER_TOP    (0x2ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_LEAF    (0x0ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_INVALID (0x1ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_MIDDLE  (0x2ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_TOP     (0x3ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_LAYER_MAX     (0x4ull) /* [CN10K, .) */
+
+#define NIX_RX_BAND_PROF_PC_MODE_VLAN (0x0ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_PC_MODE_DSCP (0x1ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_PC_MODE_GEN  (0x2ull) /* [CN10K, .) */
+#define NIX_RX_BAND_PROF_PC_MODE_RSVD (0x3ull) /* [CN10K, .) */
 
 #define NIX_RX_COLORRESULT_GREEN  (0x0ull) /* [CN10K, .) */
 #define NIX_RX_COLORRESULT_YELLOW (0x1ull) /* [CN10K, .) */
diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h
index b5da931b81..c8b97e9aee 100644
--- a/drivers/common/cnxk/roc_mbox.h
+++ b/drivers/common/cnxk/roc_mbox.h
@@ -234,7 +234,11 @@ struct mbox_msghdr {
 	  nix_inline_ipsec_lf_cfg, msg_rsp)                                    \
 	M(NIX_CN10K_AQ_ENQ, 0x801b, nix_cn10k_aq_enq, nix_cn10k_aq_enq_req,    \
 	  nix_cn10k_aq_enq_rsp)                                                \
-	M(NIX_GET_HW_INFO, 0x801c, nix_get_hw_info, msg_req, nix_hw_info)
+	M(NIX_GET_HW_INFO, 0x801c, nix_get_hw_info, msg_req, nix_hw_info)      \
+	M(NIX_BANDPROF_ALLOC, 0x801d, nix_bandprof_alloc,                      \
+	  nix_bandprof_alloc_req, nix_bandprof_alloc_rsp)                      \
+	M(NIX_BANDPROF_FREE, 0x801e, nix_bandprof_free, nix_bandprof_free_req, \
+	  msg_rsp)
 
 /* Messages initiated by AF (range 0xC00 - 0xDFF) */
 #define MBOX_UP_CGX_MESSAGES                                                   \
@@ -771,6 +775,10 @@ struct nix_cn10k_aq_enq_req {
 		__io struct nix_rsse_s rss;
 		/* Valid when op == WRITE/INIT and ctype == NIX_AQ_CTYPE_MCE */
 		__io struct nix_rx_mce_s mce;
+		/* Valid when op == WRITE/INIT and
+		 * ctype == NIX_AQ_CTYPE_BAND_PROF
+		 */
+		__io struct nix_band_prof_s prof;
 	};
 	/* Mask data when op == WRITE (1=write, 0=don't write) */
 	union {
@@ -784,6 +792,8 @@ struct nix_cn10k_aq_enq_req {
 		__io struct nix_rsse_s rss_mask;
 		/* Valid when op == WRITE and ctype == NIX_AQ_CTYPE_MCE */
 		__io struct nix_rx_mce_s mce_mask;
+		/* Valid when op == WRITE and ctype == NIX_AQ_CTYPE_BAND_PROF */
+		__io struct nix_band_prof_s prof_mask;
 	};
 };
 
@@ -795,6 +805,7 @@ struct nix_cn10k_aq_enq_rsp {
 		struct nix_cq_ctx_s cq;
 		struct nix_rsse_s rss;
 		struct nix_rx_mce_s mce;
+		struct nix_band_prof_s prof;
 	};
 };
 
@@ -1129,6 +1140,27 @@ struct nix_hw_info {
 	uint16_t __io rsvd[15];
 };
 
+struct nix_bandprof_alloc_req {
+	struct mbox_msghdr hdr;
+	/* Count of profiles needed per layer */
+	uint16_t __io prof_count[NIX_RX_BAND_PROF_LAYER_MAX];
+};
+
+struct nix_bandprof_alloc_rsp {
+	struct mbox_msghdr hdr;
+	uint16_t __io prof_count[NIX_RX_BAND_PROF_LAYER_MAX];
+
+#define BANDPROF_PER_PFFUNC 64
+	uint16_t __io prof_idx[NIX_RX_BAND_PROF_LAYER_MAX][BANDPROF_PER_PFFUNC];
+};
+
+struct nix_bandprof_free_req {
+	struct mbox_msghdr hdr;
+	uint8_t __io free_all;
+	uint16_t __io prof_count[NIX_RX_BAND_PROF_LAYER_MAX];
+	uint16_t __io prof_idx[NIX_RX_BAND_PROF_LAYER_MAX][BANDPROF_PER_PFFUNC];
+};
+
 /* SSO mailbox error codes
  * Range 501 - 600.
  */
-- 
2.25.1

[dpdk-dev] [PATCH 02/27] common/cnxk: support RoC API to get level to index

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

CN10K platform supports policer up to 3 level of hierarchy.
Implement RoC API to get corresponding index for given level.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/meson.build    |  1 +
 drivers/common/cnxk/roc_nix.h      | 11 +++++++++++
 drivers/common/cnxk/roc_nix_bpf.c  | 22 ++++++++++++++++++++++
 drivers/common/cnxk/roc_nix_priv.h |  1 +
 drivers/common/cnxk/version.map    |  1 +
 5 files changed, 36 insertions(+)
 create mode 100644 drivers/common/cnxk/roc_nix_bpf.c

diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build
index 6a7849f31c..e5794c53a5 100644
--- a/drivers/common/cnxk/meson.build
+++ b/drivers/common/cnxk/meson.build
@@ -24,6 +24,7 @@ sources = files(
         'roc_mbox.c',
         'roc_model.c',
         'roc_nix.c',
+        'roc_nix_bpf.c',
         'roc_nix_debug.c',
         'roc_nix_fc.c',
         'roc_nix_irq.c',
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 822c1900e2..bbe8416769 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -6,6 +6,8 @@
 #define _ROC_NIX_H_
 
 /* Constants */
+#define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
+
 enum roc_nix_rss_reta_sz {
 	ROC_NIX_RSS_RETA_SZ_64 = 64,
 	ROC_NIX_RSS_RETA_SZ_128 = 128,
@@ -29,6 +31,12 @@ enum roc_nix_vlan_type {
 	ROC_NIX_VLAN_TYPE_OUTER = 0x02,
 };
 
+enum roc_nix_bpf_level_flag {
+	ROC_NIX_BPF_LEVEL_F_LEAF = BIT(0),
+	ROC_NIX_BPF_LEVEL_F_MID = BIT(1),
+	ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
+};
+
 struct roc_nix_vlan_config {
 	uint32_t type;
 	union {
@@ -464,6 +472,9 @@ int __roc_api roc_nix_tm_rsrc_count(struct roc_nix *roc_nix,
 int __roc_api roc_nix_tm_node_name_get(struct roc_nix *roc_nix,
 				       uint32_t node_id, char *buf,
 				       size_t buflen);
+/* Ingress Policer API */
+uint8_t __roc_api
+roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
 /* MAC */
 int __roc_api roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start);
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
new file mode 100644
index 0000000000..b588cc16e4
--- /dev/null
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "roc_api.h"
+#include "roc_priv.h"
+
+uint8_t
+roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
+{
+	uint8_t idx;
+
+	if (level_f & ROC_NIX_BPF_LEVEL_F_LEAF)
+		idx = 0;
+	else if (level_f & ROC_NIX_BPF_LEVEL_F_MID)
+		idx = 1;
+	else if (level_f & ROC_NIX_BPF_LEVEL_F_TOP)
+		idx = 2;
+	else
+		idx = ROC_NIX_BPF_LEVEL_IDX_INVALID;
+	return idx;
+}
diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index 9dc0c88a6f..94040fc744 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -170,6 +170,7 @@ enum nix_err_status {
 	NIX_ERR_INVALID_RANGE,
 	NIX_ERR_INTERNAL,
 	NIX_ERR_OP_NOTSUP,
+	NIX_ERR_HW_NOTSUP,
 	NIX_ERR_QUEUE_INVALID_RANGE,
 	NIX_ERR_AQ_READ_FAILED,
 	NIX_ERR_AQ_WRITE_FAILED,
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 2cbcc4b93a..73b210f91e 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -74,6 +74,7 @@ INTERNAL {
 	roc_model;
 	roc_se_auth_key_set;
 	roc_se_ciph_key_set;
+	roc_nix_bpf_level_to_idx;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
 	roc_nix_cq_init;
-- 
2.25.1

[dpdk-dev] [PATCH 03/27] common/cnxk: support RoC API to get profile count

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement interface to get available profile count for given
nixlf.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |  5 ++++
 drivers/common/cnxk/roc_nix_bpf.c | 46 +++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |  1 +
 3 files changed, 52 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index bbe8416769..e96328005e 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -7,6 +7,7 @@
 
 /* Constants */
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
+#define ROC_NIX_BPF_LEVEL_MAX	      3
 
 enum roc_nix_rss_reta_sz {
 	ROC_NIX_RSS_RETA_SZ_64 = 64,
@@ -473,6 +474,10 @@ int __roc_api roc_nix_tm_node_name_get(struct roc_nix *roc_nix,
 				       uint32_t node_id, char *buf,
 				       size_t buflen);
 /* Ingress Policer API */
+int __roc_api
+roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
+		      uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index b588cc16e4..af9dffa90c 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -5,6 +5,14 @@
 #include "roc_api.h"
 #include "roc_priv.h"
 
+#define NIX_MAX_BPF_COUNT_LEAF_LAYER 64
+#define NIX_MAX_BPF_COUNT_MID_LAYER  8
+#define NIX_MAX_BPF_COUNT_TOP_LAYER  1
+
+#define NIX_BPF_LEVEL_F_MASK                                                   \
+	(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |                  \
+	 ROC_NIX_BPF_LEVEL_F_TOP)
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -20,3 +28,41 @@ roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 		idx = ROC_NIX_BPF_LEVEL_IDX_INVALID;
 	return idx;
 }
+
+int
+roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
+		      uint16_t count[ROC_NIX_BPF_LEVEL_MAX])
+{
+	uint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK;
+	uint8_t leaf_idx, mid_idx, top_idx;
+
+	PLT_SET_USED(roc_nix);
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	if (!mask)
+		return NIX_ERR_PARAM;
+
+	/* Currently No MBOX interface is available to get number
+	 * of bandwidth profiles. So numbers per level are hard coded,
+	 * considering 3 RPM blocks and each block has 4 LMAC's.
+	 * So total 12 physical interfaces are in system. Each interface
+	 * supports following bandwidth profiles.
+	 */
+
+	leaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF);
+	mid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID);
+	top_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP);
+
+	if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		count[leaf_idx] = NIX_MAX_BPF_COUNT_LEAF_LAYER;
+
+	if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		count[mid_idx] = NIX_MAX_BPF_COUNT_MID_LAYER;
+
+	if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		count[top_idx] = NIX_MAX_BPF_COUNT_TOP_LAYER;
+
+	return 0;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 73b210f91e..7cae7dfc74 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -74,6 +74,7 @@ INTERNAL {
 	roc_model;
 	roc_se_auth_key_set;
 	roc_se_ciph_key_set;
+	roc_nix_bpf_count_get;
 	roc_nix_bpf_level_to_idx;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
-- 
2.25.1

[dpdk-dev] [PATCH 04/27] common/cnxk: support RoC API to alloc bandwidth profiles

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement RoC API to allocate HW resources i.e. bandwidth
profiles for policer processing on CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |  11 ++++
 drivers/common/cnxk/roc_nix_bpf.c | 104 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |   1 +
 3 files changed, 116 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index e96328005e..2ce3ebbb5f 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -6,6 +6,7 @@
 #define _ROC_NIX_H_
 
 /* Constants */
+#define ROC_NIX_BPF_PER_PFFUNC	      64
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX	      3
 
@@ -38,6 +39,12 @@ enum roc_nix_bpf_level_flag {
 	ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
 };
 
+struct roc_nix_bpf_objs {
+	uint16_t level;
+	uint16_t count;
+	uint16_t ids[ROC_NIX_BPF_PER_PFFUNC];
+};
+
 struct roc_nix_vlan_config {
 	uint32_t type;
 	union {
@@ -478,6 +485,10 @@ int __roc_api
 roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
 		      uint16_t count[ROC_NIX_BPF_LEVEL_MAX] /* Out */);
 
+int __roc_api roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,
+				uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],
+				struct roc_nix_bpf_objs *profs /* Out */);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index af9dffa90c..06394bda07 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -13,6 +13,19 @@
 	(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |                  \
 	 ROC_NIX_BPF_LEVEL_F_TOP)
 
+static uint8_t sw_to_hw_lvl_map[] = {NIX_RX_BAND_PROF_LAYER_LEAF,
+				     NIX_RX_BAND_PROF_LAYER_MIDDLE,
+				     NIX_RX_BAND_PROF_LAYER_TOP};
+
+static inline struct mbox *
+get_mbox(struct roc_nix *roc_nix)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct dev *dev = &nix->dev;
+
+	return dev->mbox;
+}
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -66,3 +79,94 @@ roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
 
 	return 0;
 }
+
+int
+roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,
+		  uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],
+		  struct roc_nix_bpf_objs *profs)
+{
+	uint8_t mask = lvl_mask & NIX_BPF_LEVEL_F_MASK;
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_bandprof_alloc_req *req;
+	struct nix_bandprof_alloc_rsp *rsp;
+	uint8_t leaf_idx, mid_idx, top_idx;
+	int rc = -ENOSPC, i;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	if (!mask)
+		return NIX_ERR_PARAM;
+
+	leaf_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_LEAF);
+	mid_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_MID);
+	top_idx = roc_nix_bpf_level_to_idx(mask & ROC_NIX_BPF_LEVEL_F_TOP);
+
+	if ((leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+	    (per_lvl_cnt[leaf_idx] > NIX_MAX_BPF_COUNT_LEAF_LAYER))
+		return NIX_ERR_INVALID_RANGE;
+
+	if ((mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+	    (per_lvl_cnt[mid_idx] > NIX_MAX_BPF_COUNT_MID_LAYER))
+		return NIX_ERR_INVALID_RANGE;
+
+	if ((top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) &&
+	    (per_lvl_cnt[top_idx] > NIX_MAX_BPF_COUNT_TOP_LAYER))
+		return NIX_ERR_INVALID_RANGE;
+
+	req = mbox_alloc_msg_nix_bandprof_alloc(mbox);
+	if (req == NULL)
+		goto exit;
+
+	if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		req->prof_count[sw_to_hw_lvl_map[leaf_idx]] =
+			per_lvl_cnt[leaf_idx];
+	}
+
+	if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		req->prof_count[sw_to_hw_lvl_map[mid_idx]] =
+			per_lvl_cnt[mid_idx];
+	}
+
+	if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		req->prof_count[sw_to_hw_lvl_map[top_idx]] =
+			per_lvl_cnt[top_idx];
+	}
+
+	rc = mbox_process_msg(mbox, (void *)&rsp);
+	if (rc)
+		goto exit;
+
+	if (leaf_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		profs[leaf_idx].level = leaf_idx;
+		profs[leaf_idx].count =
+			rsp->prof_count[sw_to_hw_lvl_map[leaf_idx]];
+		for (i = 0; i < profs[leaf_idx].count; i++) {
+			profs[leaf_idx].ids[i] =
+				rsp->prof_idx[sw_to_hw_lvl_map[leaf_idx]][i];
+		}
+	}
+
+	if (mid_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		profs[mid_idx].level = mid_idx;
+		profs[mid_idx].count =
+			rsp->prof_count[sw_to_hw_lvl_map[mid_idx]];
+		for (i = 0; i < profs[mid_idx].count; i++) {
+			profs[mid_idx].ids[i] =
+				rsp->prof_idx[sw_to_hw_lvl_map[mid_idx]][i];
+		}
+	}
+
+	if (top_idx != ROC_NIX_BPF_LEVEL_IDX_INVALID) {
+		profs[top_idx].level = top_idx;
+		profs[top_idx].count =
+			rsp->prof_count[sw_to_hw_lvl_map[top_idx]];
+		for (i = 0; i < profs[top_idx].count; i++) {
+			profs[top_idx].ids[i] =
+				rsp->prof_idx[sw_to_hw_lvl_map[top_idx]][i];
+		}
+	}
+
+exit:
+	return rc;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 7cae7dfc74..b7e1d4e8c8 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -74,6 +74,7 @@ INTERNAL {
 	roc_model;
 	roc_se_auth_key_set;
 	roc_se_ciph_key_set;
+	roc_nix_bpf_alloc;
 	roc_nix_bpf_count_get;
 	roc_nix_bpf_level_to_idx;
 	roc_nix_cq_dump;
-- 
2.25.1

[dpdk-dev] [PATCH 05/27] common/cnxk: support RoC API to free bandwidth profiles

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement RoC interface to free HW bandwidth profiles on
CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |  6 +++++
 drivers/common/cnxk/roc_nix_bpf.c | 40 +++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |  2 ++
 3 files changed, 48 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 2ce3ebbb5f..081b1b7cc9 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -489,6 +489,12 @@ int __roc_api roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,
 				uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX],
 				struct roc_nix_bpf_objs *profs /* Out */);
 
+int __roc_api roc_nix_bpf_free(struct roc_nix *roc_nix,
+			       struct roc_nix_bpf_objs *profs,
+			       uint8_t num_prof);
+
+int __roc_api roc_nix_bpf_free_all(struct roc_nix *roc_nix);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index 06394bda07..41d31bc6cd 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -170,3 +170,43 @@ roc_nix_bpf_alloc(struct roc_nix *roc_nix, uint8_t lvl_mask,
 exit:
 	return rc;
 }
+
+int
+roc_nix_bpf_free(struct roc_nix *roc_nix, struct roc_nix_bpf_objs *profs,
+		 uint8_t num_prof)
+{
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_bandprof_free_req *req;
+	uint8_t level;
+	int i, j;
+
+	if (num_prof >= NIX_RX_BAND_PROF_LAYER_MAX)
+		return NIX_ERR_INVALID_RANGE;
+
+	req = mbox_alloc_msg_nix_bandprof_free(mbox);
+	if (req == NULL)
+		return -ENOSPC;
+
+	for (i = 0; i < num_prof; i++) {
+		level = sw_to_hw_lvl_map[profs[i].level];
+		req->prof_count[level] = profs[i].count;
+		for (j = 0; j < profs[i].count; j++)
+			req->prof_idx[level][j] = profs[i].ids[j];
+	}
+
+	return mbox_process(mbox);
+}
+
+int
+roc_nix_bpf_free_all(struct roc_nix *roc_nix)
+{
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_bandprof_free_req *req;
+
+	req = mbox_alloc_msg_nix_bandprof_free(mbox);
+	if (req == NULL)
+		return -ENOSPC;
+
+	req->free_all = true;
+	return mbox_process(mbox);
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index b7e1d4e8c8..025daf320f 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -76,6 +76,8 @@ INTERNAL {
 	roc_se_ciph_key_set;
 	roc_nix_bpf_alloc;
 	roc_nix_bpf_count_get;
+	roc_nix_bpf_free;
+	roc_nix_bpf_free_all;
 	roc_nix_bpf_level_to_idx;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
-- 
2.25.1

[dpdk-dev] [PATCH 06/27] common/cnxk: support RoC API to configure bandwidth profile

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement RoC API to configure HW bandwidth profile for
CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     | 108 +++++++++++++++
 drivers/common/cnxk/roc_nix_bpf.c | 223 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |   1 +
 3 files changed, 332 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 081b1b7cc9..6b3b3a50e5 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -10,6 +10,54 @@
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX	      3
 
+/** NIX rate limits */
+#define MAX_RATE_DIV_EXP  12
+#define MAX_RATE_EXPONENT 0xf
+#define MAX_RATE_MANTISSA 0xff
+
+#define NIX_METER_RATE_CONST 2000000ULL
+
+/* NIX rate calculation in Bits/Sec
+ *	PIR_ADD = ((256 + NIX_*_PIR[RATE_MANTISSA])
+ *		<< NIX_*_PIR[RATE_EXPONENT]) / 256
+ *	PIR = (2E6 * PIR_ADD / (1 << NIX_*_PIR[RATE_DIVIDER_EXPONENT]))
+ *
+ *	CIR_ADD = ((256 + NIX_*_CIR[RATE_MANTISSA])
+ *		<< NIX_*_CIR[RATE_EXPONENT]) / 256
+ *	CIR = (2E6 * CIR_ADD / (CCLK_TICKS << NIX_*_CIR[RATE_DIVIDER_EXPONENT]))
+ */
+#define METER_RATE(exponent, mantissa, div_exp)                                \
+	((NIX_METER_RATE_CONST * ((256 + (mantissa)) << (exponent))) /         \
+	 (((1ull << (div_exp)) * 256)))
+
+/* Meter rate limits in Bits/Sec */
+#define ROC_NIX_BPF_RATE_MIN METER_RATE(0, 0, MAX_RATE_DIV_EXP)
+#define ROC_NIX_BPF_RATE_MAX METER_RATE(MAX_RATE_EXPONENT, MAX_RATE_MANTISSA, 0)
+
+#define NIX_LENGTH_ADJUST_MIN ((int)-NIX_MIN_HW_FRS + 1)
+#define NIX_LENGTH_ADJUST_MAX 255
+
+/** NIX burst limits */
+#define MAX_BURST_EXPONENT 0xf
+#define MAX_BURST_MANTISSA 0xff
+
+/* NIX burst calculation
+ *	PIR_BURST = ((256 + NIX_*_PIR[BURST_MANTISSA])
+ *		<< (NIX_*_PIR[BURST_EXPONENT] + 1))
+ *			/ 256
+ *
+ *	CIR_BURST = ((256 + NIX_*_CIR[BURST_MANTISSA])
+ *		<< (NIX_*_CIR[BURST_EXPONENT] + 1))
+ *			/ 256
+ */
+#define METER_BURST(exponent, mantissa)                                        \
+	(((256 + (mantissa)) << ((exponent) + 1)) / 256)
+
+/** Meter burst limits */
+#define ROC_NIX_BPF_BURST_MIN METER_BURST(0, 0)
+#define ROC_NIX_BPF_BURST_MAX                                                  \
+	METER_BURST(MAX_BURST_EXPONENT, MAX_BURST_MANTISSA)
+
 enum roc_nix_rss_reta_sz {
 	ROC_NIX_RSS_RETA_SZ_64 = 64,
 	ROC_NIX_RSS_RETA_SZ_128 = 128,
@@ -39,6 +87,62 @@ enum roc_nix_bpf_level_flag {
 	ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
 };
 
+enum roc_nix_bpf_color {
+	ROC_NIX_BPF_COLOR_GREEN,
+	ROC_NIX_BPF_COLOR_YELLOW,
+	ROC_NIX_BPF_COLOR_RED,
+	ROC_NIX_BPF_COLOR_MAX
+};
+
+enum roc_nix_bpf_algo {
+	ROC_NIX_BPF_ALGO_NONE,
+	ROC_NIX_BPF_ALGO_2698,
+	ROC_NIX_BPF_ALGO_4115,
+	ROC_NIX_BPF_ALGO_2697
+};
+
+enum roc_nix_bpf_lmode { ROC_NIX_BPF_LMODE_BYTE, ROC_NIX_BPF_LMODE_PACKET };
+
+enum roc_nix_bpf_action {
+	ROC_NIX_BPF_ACTION_PASS,
+	ROC_NIX_BPF_ACTION_DROP,
+	ROC_NIX_BPF_ACTION_RED
+};
+
+struct roc_nix_bpf_cfg {
+	enum roc_nix_bpf_algo alg;
+	enum roc_nix_bpf_lmode lmode;
+	union {
+		/* Valid when *alg* is set to ROC_NIX_BPF_ALGO_2697. */
+		struct {
+			uint64_t cir;
+			uint64_t cbs;
+			uint64_t ebs;
+		} algo2697;
+
+		/* Valid when *alg* is set to ROC_NIX_BPF_ALGO_2698. */
+		struct {
+			uint64_t cir;
+			uint64_t pir;
+			uint64_t cbs;
+			uint64_t pbs;
+		} algo2698;
+
+		/* Valid when *alg* is set to ROC_NIX_BPF_ALGO_4115. */
+		struct {
+			uint64_t cir;
+			uint64_t eir;
+			uint64_t cbs;
+			uint64_t ebs;
+		} algo4115;
+	};
+
+	enum roc_nix_bpf_action action[ROC_NIX_BPF_COLOR_MAX];
+
+	/* Reserved for future config*/
+	uint32_t rsvd[3];
+};
+
 struct roc_nix_bpf_objs {
 	uint16_t level;
 	uint16_t count;
@@ -495,6 +599,10 @@ int __roc_api roc_nix_bpf_free(struct roc_nix *roc_nix,
 
 int __roc_api roc_nix_bpf_free_all(struct roc_nix *roc_nix);
 
+int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
+				 enum roc_nix_bpf_level_flag lvl_flag,
+				 struct roc_nix_bpf_cfg *cfg);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index 41d31bc6cd..39b44ef1cd 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -26,6 +26,103 @@ get_mbox(struct roc_nix *roc_nix)
 	return dev->mbox;
 }
 
+static inline uint64_t
+meter_rate_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p,
+		  uint64_t *div_exp_p)
+{
+	uint64_t div_exp, exponent, mantissa;
+
+	/* Boundary checks */
+	if (value < ROC_NIX_BPF_RATE_MIN || value > ROC_NIX_BPF_RATE_MAX)
+		return 0;
+
+	if (value <= METER_RATE(0, 0, 0)) {
+		/* Calculate rate div_exp and mantissa using
+		 * the following formula:
+		 *
+		 * value = (2E6 * (256 + mantissa)
+		 *              / ((1 << div_exp) * 256))
+		 */
+		div_exp = 0;
+		exponent = 0;
+		mantissa = MAX_RATE_MANTISSA;
+
+		while (value < (NIX_METER_RATE_CONST / (1 << div_exp)))
+			div_exp += 1;
+
+		while (value < ((NIX_METER_RATE_CONST * (256 + mantissa)) /
+				((1 << div_exp) * 256)))
+			mantissa -= 1;
+	} else {
+		/* Calculate rate exponent and mantissa using
+		 * the following formula:
+		 *
+		 * value = (2E6 * ((256 + mantissa) << exponent)) / 256
+		 *
+		 */
+		div_exp = 0;
+		exponent = MAX_RATE_EXPONENT;
+		mantissa = MAX_RATE_MANTISSA;
+
+		while (value < (NIX_METER_RATE_CONST * (1 << exponent)))
+			exponent -= 1;
+
+		while (value < ((NIX_METER_RATE_CONST *
+				 ((256 + mantissa) << exponent)) /
+				256))
+			mantissa -= 1;
+	}
+
+	if (div_exp > MAX_RATE_DIV_EXP || exponent > MAX_RATE_EXPONENT ||
+	    mantissa > MAX_RATE_MANTISSA)
+		return 0;
+
+	if (div_exp_p)
+		*div_exp_p = div_exp;
+	if (exponent_p)
+		*exponent_p = exponent;
+	if (mantissa_p)
+		*mantissa_p = mantissa;
+
+	/* Calculate real rate value */
+	return METER_RATE(exponent, mantissa, div_exp);
+}
+
+static inline uint64_t
+meter_burst_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p)
+{
+	uint64_t exponent, mantissa;
+
+	if (value < ROC_NIX_BPF_BURST_MIN || value > ROC_NIX_BPF_BURST_MAX)
+		return 0;
+
+	/* Calculate burst exponent and mantissa using
+	 * the following formula:
+	 *
+	 * value = (((256 + mantissa) << (exponent + 1)
+	 / 256)
+	 *
+	 */
+	exponent = MAX_BURST_EXPONENT;
+	mantissa = MAX_BURST_MANTISSA;
+
+	while (value < (1ull << (exponent + 1)))
+		exponent -= 1;
+
+	while (value < ((256 + mantissa) << (exponent + 1)) / 256)
+		mantissa -= 1;
+
+	if (exponent > MAX_BURST_EXPONENT || mantissa > MAX_BURST_MANTISSA)
+		return 0;
+
+	if (exponent_p)
+		*exponent_p = exponent;
+	if (mantissa_p)
+		*mantissa_p = mantissa;
+
+	return METER_BURST(exponent, mantissa);
+}
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -210,3 +307,129 @@ roc_nix_bpf_free_all(struct roc_nix *roc_nix)
 	req->free_all = true;
 	return mbox_process(mbox);
 }
+
+int
+roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
+		   enum roc_nix_bpf_level_flag lvl_flag,
+		   struct roc_nix_bpf_cfg *cfg)
+{
+	uint64_t exponent_p = 0, mantissa_p = 0, div_exp_p = 0;
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_cn10k_aq_enq_req *aq;
+	uint8_t level_idx;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	if (!cfg)
+		return NIX_ERR_PARAM;
+
+	level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+	if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		return NIX_ERR_PARAM;
+
+	aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+	if (aq == NULL)
+		return -ENOSPC;
+	aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | id;
+	aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+	aq->op = NIX_AQ_INSTOP_WRITE;
+
+	switch (cfg->alg) {
+	case ROC_NIX_BPF_ALGO_2697:
+		meter_rate_to_nix(cfg->algo2697.cir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.cir_mantissa = mantissa_p;
+		aq->prof.cir_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo2697.cbs, &exponent_p, &mantissa_p);
+		aq->prof.cbs_mantissa = mantissa_p;
+		aq->prof.cbs_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo2697.ebs, &exponent_p, &mantissa_p);
+		aq->prof.pebs_mantissa = mantissa_p;
+		aq->prof.pebs_exponent = exponent_p;
+
+		aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa);
+		aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa);
+		aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa);
+		aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent);
+		aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent);
+		aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent);
+		break;
+
+	case ROC_NIX_BPF_ALGO_2698:
+		meter_rate_to_nix(cfg->algo2698.cir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.cir_mantissa = mantissa_p;
+		aq->prof.cir_exponent = exponent_p;
+
+		meter_rate_to_nix(cfg->algo2698.pir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.peir_mantissa = mantissa_p;
+		aq->prof.peir_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo2698.cbs, &exponent_p, &mantissa_p);
+		aq->prof.cbs_mantissa = mantissa_p;
+		aq->prof.cbs_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo2698.pbs, &exponent_p, &mantissa_p);
+		aq->prof.pebs_mantissa = mantissa_p;
+		aq->prof.pebs_exponent = exponent_p;
+
+		aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa);
+		aq->prof_mask.peir_mantissa = ~(aq->prof_mask.peir_mantissa);
+		aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa);
+		aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa);
+		aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent);
+		aq->prof_mask.peir_exponent = ~(aq->prof_mask.peir_exponent);
+		aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent);
+		aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent);
+		break;
+
+	case ROC_NIX_BPF_ALGO_4115:
+		meter_rate_to_nix(cfg->algo4115.cir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.cir_mantissa = mantissa_p;
+		aq->prof.cir_exponent = exponent_p;
+
+		meter_rate_to_nix(cfg->algo4115.eir, &exponent_p, &mantissa_p,
+				  &div_exp_p);
+		aq->prof.peir_mantissa = mantissa_p;
+		aq->prof.peir_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo4115.cbs, &exponent_p, &mantissa_p);
+		aq->prof.cbs_mantissa = mantissa_p;
+		aq->prof.cbs_exponent = exponent_p;
+
+		meter_burst_to_nix(cfg->algo4115.ebs, &exponent_p, &mantissa_p);
+		aq->prof.pebs_mantissa = mantissa_p;
+		aq->prof.pebs_exponent = exponent_p;
+
+		aq->prof_mask.cir_mantissa = ~(aq->prof_mask.cir_mantissa);
+		aq->prof_mask.peir_mantissa = ~(aq->prof_mask.peir_mantissa);
+		aq->prof_mask.cbs_mantissa = ~(aq->prof_mask.cbs_mantissa);
+		aq->prof_mask.pebs_mantissa = ~(aq->prof_mask.pebs_mantissa);
+
+		aq->prof_mask.cir_exponent = ~(aq->prof_mask.cir_exponent);
+		aq->prof_mask.peir_exponent = ~(aq->prof_mask.peir_exponent);
+		aq->prof_mask.cbs_exponent = ~(aq->prof_mask.cbs_exponent);
+		aq->prof_mask.pebs_exponent = ~(aq->prof_mask.pebs_exponent);
+		break;
+
+	default:
+		return NIX_ERR_PARAM;
+	}
+
+	aq->prof.lmode = cfg->lmode;
+	aq->prof.gc_action = cfg->action[ROC_NIX_BPF_COLOR_GREEN];
+	aq->prof.yc_action = cfg->action[ROC_NIX_BPF_COLOR_YELLOW];
+	aq->prof.rc_action = cfg->action[ROC_NIX_BPF_COLOR_RED];
+
+	aq->prof_mask.lmode = ~(aq->prof_mask.lmode);
+	aq->prof_mask.gc_action = ~(aq->prof_mask.gc_action);
+	aq->prof_mask.yc_action = ~(aq->prof_mask.yc_action);
+	aq->prof_mask.rc_action = ~(aq->prof_mask.rc_action);
+
+	return mbox_process(mbox);
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 025daf320f..849cbeed22 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -75,6 +75,7 @@ INTERNAL {
 	roc_se_auth_key_set;
 	roc_se_ciph_key_set;
 	roc_nix_bpf_alloc;
+	roc_nix_bpf_config;
 	roc_nix_bpf_count_get;
 	roc_nix_bpf_free;
 	roc_nix_bpf_free_all;
-- 
2.25.1

[dpdk-dev] [PATCH 07/27] common/cnxk: support RoC API to toggle profile state

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement RoC API to enable or disable HW bandwidth profiles
on CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |  4 ++++
 drivers/common/cnxk/roc_nix_bpf.c | 36 +++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |  1 +
 3 files changed, 41 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 6b3b3a50e5..478426ecc9 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -262,6 +262,7 @@ struct roc_nix_stats_queue {
 struct roc_nix_rq {
 	/* Input parameters */
 	uint16_t qid;
+	uint16_t bpf_id;
 	uint64_t aura_handle;
 	bool ipsech_ena;
 	uint16_t first_skip;
@@ -603,6 +604,9 @@ int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
 				 enum roc_nix_bpf_level_flag lvl_flag,
 				 struct roc_nix_bpf_cfg *cfg);
 
+int __roc_api roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id,
+				  struct roc_nix_rq *rq, bool enable);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index 39b44ef1cd..fed6c03e9c 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -433,3 +433,39 @@ roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
 
 	return mbox_process(mbox);
 }
+
+int
+roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id, struct roc_nix_rq *rq,
+		    bool enable)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_cn10k_aq_enq_req *aq;
+	int rc;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	if (rq->qid >= nix->nb_rx_queues)
+		return NIX_ERR_QUEUE_INVALID_RANGE;
+
+	aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+	if (aq == NULL)
+		return -ENOSPC;
+	aq->qidx = rq->qid;
+	aq->ctype = NIX_AQ_CTYPE_RQ;
+	aq->op = NIX_AQ_INSTOP_WRITE;
+
+	aq->rq.policer_ena = enable;
+	if (enable)
+		aq->rq.band_prof_id = id;
+
+	rc = mbox_process(mbox);
+	if (rc)
+		goto exit;
+
+	rq->bpf_id = id;
+
+exit:
+	return rc;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 849cbeed22..abde92ed09 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -77,6 +77,7 @@ INTERNAL {
 	roc_nix_bpf_alloc;
 	roc_nix_bpf_config;
 	roc_nix_bpf_count_get;
+	roc_nix_bpf_ena_dis;
 	roc_nix_bpf_free;
 	roc_nix_bpf_free_all;
 	roc_nix_bpf_level_to_idx;
-- 
2.25.1

[dpdk-dev] [PATCH 08/27] common/cnxk: support RoC API to dump bandwidth profile

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement RoC API to dump bandwidth profile on CN10K
platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h      |  3 ++
 drivers/common/cnxk/roc_nix_bpf.c  | 86 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/roc_platform.h |  1 +
 drivers/common/cnxk/version.map    |  1 +
 4 files changed, 91 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 478426ecc9..19c376e9c4 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -607,6 +607,9 @@ int __roc_api roc_nix_bpf_config(struct roc_nix *roc_nix, uint16_t id,
 int __roc_api roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id,
 				  struct roc_nix_rq *rq, bool enable);
 
+int __roc_api roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,
+			       enum roc_nix_bpf_level_flag lvl_flag);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index fed6c03e9c..2b2be20491 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -123,6 +123,60 @@ meter_burst_to_nix(uint64_t value, uint64_t *exponent_p, uint64_t *mantissa_p)
 	return METER_BURST(exponent, mantissa);
 }
 
+static inline void
+nix_lf_bpf_dump(__io struct nix_band_prof_s *bpf)
+{
+	plt_dump("W0: cir_mantissa  \t\t\t%d\nW0: pebs_mantissa \t\t\t0x%03x",
+		 bpf->cir_mantissa, bpf->pebs_mantissa);
+	plt_dump("W0: peir_matissa \t\t\t\t%d\nW0: cbs_exponent \t\t\t%d",
+		 bpf->peir_mantissa, bpf->cbs_exponent);
+	plt_dump("W0: cir_exponent \t\t\t%d\nW0: pebs_exponent \t\t\t%d",
+		 bpf->cir_exponent, bpf->pebs_exponent);
+	plt_dump("W0: peir_exponent \t\t\t%d\n", bpf->peir_exponent);
+	plt_dump("W0: tnl_ena \t\t\t%d\n", bpf->tnl_ena);
+	plt_dump("W0: icolor \t\t\t%d\n", bpf->icolor);
+	plt_dump("W0: pc_mode \t\t\t%d\n", bpf->pc_mode);
+	plt_dump("W1: hl_en \t\t%d\nW1: band_prof_id \t\t%d", bpf->hl_en,
+		 bpf->band_prof_id);
+	plt_dump("W1: meter_algo \t\t%d\nW1: rc_action \t\t%d", bpf->meter_algo,
+		 bpf->rc_action);
+	plt_dump("W1: yc_action \t\t\t%d\nW1: gc_action \t\t\t%d",
+		 bpf->yc_action, bpf->gc_action);
+	plt_dump("W1: adjust_mantissa\t\t\t%d\nW1: adjust_exponent \t\t\t%d",
+		 bpf->adjust_mantissa, bpf->adjust_exponent);
+	plt_dump("W1: rdiv \t\t\t%d\n", bpf->rdiv);
+	plt_dump("W1: l_select \t\t%d\nW2: lmode \t\t%d", bpf->l_sellect,
+		 bpf->lmode);
+	plt_dump("W1: cbs_mantissa \t\t\t%d\n", bpf->cbs_mantissa);
+	plt_dump("W2: tsa \t\t\t0x%" PRIx64 "\n", (uint64_t)bpf->ts);
+	plt_dump("W3: c_accum \t\t%d\nW3: pe_accum \t\t%d", bpf->c_accum,
+		 bpf->pe_accum);
+	plt_dump("W4: green_pkt_pass \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->green_pkt_pass);
+	plt_dump("W5: yellow_pkt_pass \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->yellow_pkt_pass);
+	plt_dump("W6: red_pkt_pass \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->red_pkt_pass);
+	plt_dump("W7: green_octs_pass \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->green_octs_pass);
+	plt_dump("W8: yellow_octs_pass \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->yellow_octs_pass);
+	plt_dump("W9: red_octs_pass \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->red_octs_pass);
+	plt_dump("W10: green_pkt_drop \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->green_pkt_drop);
+	plt_dump("W11: yellow_pkt_drop \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->yellow_pkt_drop);
+	plt_dump("W12: red_pkt_drop \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->red_pkt_drop);
+	plt_dump("W13: green_octs_drop \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->green_octs_drop);
+	plt_dump("W14: yellow_octs_drop \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->yellow_octs_drop);
+	plt_dump("W15: red_octs_drop \t\t\t0x%" PRIx64 "",
+		 (uint64_t)bpf->red_octs_drop);
+}
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -469,3 +523,35 @@ roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id, struct roc_nix_rq *rq,
 exit:
 	return rc;
 }
+
+int
+roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,
+		 enum roc_nix_bpf_level_flag lvl_flag)
+{
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_cn10k_aq_enq_rsp *rsp;
+	struct nix_cn10k_aq_enq_req *aq;
+	uint8_t level_idx;
+	int rc;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+	if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		return NIX_ERR_PARAM;
+
+	aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+	if (aq == NULL)
+		return -ENOSPC;
+	aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id);
+	aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+	aq->op = NIX_AQ_INSTOP_READ;
+	rc = mbox_process_msg(mbox, (void *)&rsp);
+	if (!rc) {
+		plt_dump("============= band prof id =%d ===============", id);
+		nix_lf_bpf_dump(&rsp->prof);
+	}
+
+	return rc;
+}
diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index 285b24b82d..69b7c49d8b 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -155,6 +155,7 @@ extern int cnxk_logtype_tm;
 #define plt_info(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args)
 #define plt_warn(fmt, args...) RTE_LOG(WARNING, PMD, fmt "\n", ##args)
 #define plt_print(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args)
+#define plt_dump(fmt, ...)      fprintf(stderr, fmt "\n", ##__VA_ARGS__)
 
 /**
  * Log debug message if given subsystem logging is enabled.
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index abde92ed09..a201f6a755 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -77,6 +77,7 @@ INTERNAL {
 	roc_nix_bpf_alloc;
 	roc_nix_bpf_config;
 	roc_nix_bpf_count_get;
+	roc_nix_bpf_dump;
 	roc_nix_bpf_ena_dis;
 	roc_nix_bpf_free;
 	roc_nix_bpf_free_all;
-- 
2.25.1

[dpdk-dev] [PATCH 09/27] common/cnxk: support RoC API to setup precolor table

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

For initial coloring of input packet, CN10K platform maintains
precolor table for VLAN, DSCP and Generic. Implement RoC
interface to setup pre color table.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |  20 ++++
 drivers/common/cnxk/roc_nix_bpf.c | 188 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |   1 +
 3 files changed, 209 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 19c376e9c4..36f6a35c50 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -87,6 +87,15 @@ enum roc_nix_bpf_level_flag {
 	ROC_NIX_BPF_LEVEL_F_TOP = BIT(2),
 };
 
+enum roc_nix_bpf_pc_mode {
+	ROC_NIX_BPF_PC_MODE_VLAN_INNER,
+	ROC_NIX_BPF_PC_MODE_VLAN_OUTER,
+	ROC_NIX_BPF_PC_MODE_DSCP_INNER,
+	ROC_NIX_BPF_PC_MODE_DSCP_OUTER,
+	ROC_NIX_BPF_PC_MODE_GEN_INNER,
+	ROC_NIX_BPF_PC_MODE_GEN_OUTER
+};
+
 enum roc_nix_bpf_color {
 	ROC_NIX_BPF_COLOR_GREEN,
 	ROC_NIX_BPF_COLOR_YELLOW,
@@ -149,6 +158,13 @@ struct roc_nix_bpf_objs {
 	uint16_t ids[ROC_NIX_BPF_PER_PFFUNC];
 };
 
+struct roc_nix_bpf_precolor {
+#define ROC_NIX_BPF_PRE_COLOR_MAX 64
+	uint8_t count;
+	enum roc_nix_bpf_pc_mode mode;
+	enum roc_nix_bpf_color color[ROC_NIX_BPF_PRE_COLOR_MAX];
+};
+
 struct roc_nix_vlan_config {
 	uint32_t type;
 	union {
@@ -610,6 +626,10 @@ int __roc_api roc_nix_bpf_ena_dis(struct roc_nix *roc_nix, uint16_t id,
 int __roc_api roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,
 			       enum roc_nix_bpf_level_flag lvl_flag);
 
+int __roc_api roc_nix_bpf_pre_color_tbl_setup(
+	struct roc_nix *roc_nix, uint16_t id,
+	enum roc_nix_bpf_level_flag lvl_flag, struct roc_nix_bpf_precolor *tbl);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index 2b2be20491..aae6f0ec77 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -9,6 +9,10 @@
 #define NIX_MAX_BPF_COUNT_MID_LAYER  8
 #define NIX_MAX_BPF_COUNT_TOP_LAYER  1
 
+#define NIX_BPF_PRECOLOR_GEN_TABLE_SIZE	 16
+#define NIX_BPF_PRECOLOR_VLAN_TABLE_SIZE 16
+#define NIX_BPF_PRECOLOR_DSCP_TABLE_SIZE 64
+
 #define NIX_BPF_LEVEL_F_MASK                                                   \
 	(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |                  \
 	 ROC_NIX_BPF_LEVEL_F_TOP)
@@ -177,6 +181,103 @@ nix_lf_bpf_dump(__io struct nix_band_prof_s *bpf)
 		 (uint64_t)bpf->red_octs_drop);
 }
 
+static inline void
+nix_precolor_conv_table_write(struct roc_nix *roc_nix, uint64_t val,
+			      uint32_t off)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+	int64_t *addr;
+
+	addr = PLT_PTR_ADD(nix->base, off);
+	plt_write64(val, addr);
+}
+
+static uint8_t
+nix_precolor_vlan_table_update(struct roc_nix *roc_nix,
+			       struct roc_nix_bpf_precolor *tbl)
+{
+	uint64_t val = 0, i;
+	uint8_t tn_ena;
+	uint32_t off;
+
+	for (i = 0; i < tbl->count; i++)
+		val |= (((uint64_t)tbl->color[i]) << (2 * i));
+
+	if (tbl->mode == ROC_NIX_BPF_PC_MODE_VLAN_INNER) {
+		off = NIX_LF_RX_VLAN1_COLOR_CONV;
+		tn_ena = true;
+	} else {
+		off = NIX_LF_RX_VLAN0_COLOR_CONV;
+		tn_ena = false;
+	}
+
+	nix_precolor_conv_table_write(roc_nix, val, off);
+	return tn_ena;
+}
+
+static uint8_t
+nix_precolor_inner_dscp_table_update(struct roc_nix *roc_nix,
+				     struct roc_nix_bpf_precolor *tbl)
+{
+	uint64_t val_lo = 0, val_hi = 0, i, j;
+
+	for (i = 0, j = 0; i < (tbl->count / 2); i++, j++)
+		val_lo |= (((uint64_t)tbl->color[i]) << (2 * j));
+
+	for (j = 0; i < tbl->count; i++, j++)
+		val_hi |= (((uint64_t)tbl->color[i]) << (2 * j));
+
+	nix_precolor_conv_table_write(roc_nix, val_lo,
+				      NIX_LF_RX_IIP_COLOR_CONV_LO);
+	nix_precolor_conv_table_write(roc_nix, val_hi,
+				      NIX_LF_RX_IIP_COLOR_CONV_HI);
+
+	return true;
+}
+
+static uint8_t
+nix_precolor_outer_dscp_table_update(struct roc_nix *roc_nix,
+				     struct roc_nix_bpf_precolor *tbl)
+{
+	uint64_t val_lo = 0, val_hi = 0, i, j;
+
+	for (i = 0, j = 0; i < (tbl->count / 2); i++, j++)
+		val_lo |= (((uint64_t)tbl->color[i]) << (2 * j));
+
+	for (j = 0; i < tbl->count; i++, j++)
+		val_hi |= (((uint64_t)tbl->color[i]) << (2 * j));
+
+	nix_precolor_conv_table_write(roc_nix, val_lo,
+				      NIX_LF_RX_OIP_COLOR_CONV_LO);
+	nix_precolor_conv_table_write(roc_nix, val_hi,
+				      NIX_LF_RX_OIP_COLOR_CONV_HI);
+
+	return false;
+}
+
+static uint8_t
+nix_precolor_gen_table_update(struct roc_nix *roc_nix,
+			      struct roc_nix_bpf_precolor *tbl)
+{
+	uint64_t val = 0, i;
+	uint8_t tn_ena;
+	uint32_t off;
+
+	for (i = 0; i < tbl->count; i++)
+		val |= (((uint64_t)tbl->color[i]) << (2 * i));
+
+	if (tbl->mode == ROC_NIX_BPF_PC_MODE_GEN_INNER) {
+		off = NIX_LF_RX_GEN_COLOR_CONVX(1);
+		tn_ena = true;
+	} else {
+		off = NIX_LF_RX_GEN_COLOR_CONVX(0);
+		tn_ena = false;
+	}
+
+	nix_precolor_conv_table_write(roc_nix, val, off);
+	return tn_ena;
+}
+
 uint8_t
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 {
@@ -555,3 +656,90 @@ roc_nix_bpf_dump(struct roc_nix *roc_nix, uint16_t id,
 
 	return rc;
 }
+
+int
+roc_nix_bpf_pre_color_tbl_setup(struct roc_nix *roc_nix, uint16_t id,
+				enum roc_nix_bpf_level_flag lvl_flag,
+				struct roc_nix_bpf_precolor *tbl)
+{
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_cn10k_aq_enq_req *aq;
+	uint8_t pc_mode, tn_ena;
+	uint8_t level_idx;
+	int rc;
+
+	if (!tbl || !tbl->count)
+		return NIX_ERR_PARAM;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+	if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		return NIX_ERR_PARAM;
+
+	switch (tbl->mode) {
+	case ROC_NIX_BPF_PC_MODE_VLAN_INNER:
+	case ROC_NIX_BPF_PC_MODE_VLAN_OUTER:
+		if (tbl->count != NIX_BPF_PRECOLOR_VLAN_TABLE_SIZE) {
+			plt_err("Table size must be %d",
+				NIX_BPF_PRECOLOR_VLAN_TABLE_SIZE);
+			rc = NIX_ERR_PARAM;
+			goto exit;
+		}
+		tn_ena = nix_precolor_vlan_table_update(roc_nix, tbl);
+		pc_mode = NIX_RX_BAND_PROF_PC_MODE_VLAN;
+		break;
+	case ROC_NIX_BPF_PC_MODE_DSCP_INNER:
+		if (tbl->count != NIX_BPF_PRECOLOR_DSCP_TABLE_SIZE) {
+			plt_err("Table size must be %d",
+				NIX_BPF_PRECOLOR_DSCP_TABLE_SIZE);
+			rc = NIX_ERR_PARAM;
+			goto exit;
+		}
+		tn_ena = nix_precolor_inner_dscp_table_update(roc_nix, tbl);
+		pc_mode = NIX_RX_BAND_PROF_PC_MODE_DSCP;
+		break;
+	case ROC_NIX_BPF_PC_MODE_DSCP_OUTER:
+		if (tbl->count != NIX_BPF_PRECOLOR_DSCP_TABLE_SIZE) {
+			plt_err("Table size must be %d",
+				NIX_BPF_PRECOLOR_DSCP_TABLE_SIZE);
+			rc = NIX_ERR_PARAM;
+			goto exit;
+		}
+		tn_ena = nix_precolor_outer_dscp_table_update(roc_nix, tbl);
+		pc_mode = NIX_RX_BAND_PROF_PC_MODE_DSCP;
+		break;
+	case ROC_NIX_BPF_PC_MODE_GEN_INNER:
+	case ROC_NIX_BPF_PC_MODE_GEN_OUTER:
+		if (tbl->count != NIX_BPF_PRECOLOR_GEN_TABLE_SIZE) {
+			plt_err("Table size must be %d",
+				NIX_BPF_PRECOLOR_GEN_TABLE_SIZE);
+			rc = NIX_ERR_PARAM;
+			goto exit;
+		}
+		tn_ena = nix_precolor_gen_table_update(roc_nix, tbl);
+		pc_mode = NIX_RX_BAND_PROF_PC_MODE_GEN;
+		break;
+	default:
+		rc = NIX_ERR_PARAM;
+		goto exit;
+	}
+
+	/* Update corresponding bandwidth profile too */
+	aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+	if (aq == NULL)
+		return -ENOSPC;
+	aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | id;
+	aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+	aq->op = NIX_AQ_INSTOP_WRITE;
+	aq->prof.pc_mode = pc_mode;
+	aq->prof.tnl_ena = tn_ena;
+	aq->prof_mask.pc_mode = ~(aq->prof_mask.pc_mode);
+	aq->prof_mask.tnl_ena = ~(aq->prof_mask.tnl_ena);
+
+	return mbox_process(mbox);
+
+exit:
+	return rc;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index a201f6a755..984c239766 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -82,6 +82,7 @@ INTERNAL {
 	roc_nix_bpf_free;
 	roc_nix_bpf_free_all;
 	roc_nix_bpf_level_to_idx;
+	roc_nix_bpf_pre_color_tbl_setup;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
 	roc_nix_cq_init;
-- 
2.25.1

[dpdk-dev] [PATCH 10/27] common/cnxk: support RoC API to connect bandwidth profiles

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

To maintain chain of bandwidth profiles, they needs to be
connected. Implement RoC API to connect two bandwidth profiles
at different levels.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |  6 ++++++
 drivers/common/cnxk/roc_nix_bpf.c | 36 +++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |  1 +
 3 files changed, 43 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 36f6a35c50..08795cd76a 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -7,6 +7,7 @@
 
 /* Constants */
 #define ROC_NIX_BPF_PER_PFFUNC	      64
+#define ROC_NIX_BPF_ID_INVALID	      0xFFFF
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX	      3
 
@@ -630,6 +631,11 @@ int __roc_api roc_nix_bpf_pre_color_tbl_setup(
 	struct roc_nix *roc_nix, uint16_t id,
 	enum roc_nix_bpf_level_flag lvl_flag, struct roc_nix_bpf_precolor *tbl);
 
+/* Use ROC_NIX_BPF_ID_INVALID as dst_id to disconnect */
+int __roc_api roc_nix_bpf_connect(struct roc_nix *roc_nix,
+				  enum roc_nix_bpf_level_flag lvl_flag,
+				  uint16_t src_id, uint16_t dst_id);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index aae6f0ec77..e75440dc6f 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -743,3 +743,39 @@ roc_nix_bpf_pre_color_tbl_setup(struct roc_nix *roc_nix, uint16_t id,
 exit:
 	return rc;
 }
+
+int
+roc_nix_bpf_connect(struct roc_nix *roc_nix,
+		    enum roc_nix_bpf_level_flag lvl_flag, uint16_t src_id,
+		    uint16_t dst_id)
+{
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_cn10k_aq_enq_req *aq;
+	uint8_t level_idx;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+	if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		return NIX_ERR_PARAM;
+
+	aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+	if (aq == NULL)
+		return -ENOSPC;
+	aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14) | src_id;
+	aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+	aq->op = NIX_AQ_INSTOP_WRITE;
+
+	if (dst_id == ROC_NIX_BPF_ID_INVALID) {
+		aq->prof.hl_en = false;
+		aq->prof_mask.hl_en = ~(aq->prof_mask.hl_en);
+	} else {
+		aq->prof.hl_en = true;
+		aq->prof.band_prof_id = dst_id;
+		aq->prof_mask.hl_en = ~(aq->prof_mask.hl_en);
+		aq->prof_mask.band_prof_id = ~(aq->prof_mask.band_prof_id);
+	}
+
+	return mbox_process(mbox);
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 984c239766..ef60615446 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -76,6 +76,7 @@ INTERNAL {
 	roc_se_ciph_key_set;
 	roc_nix_bpf_alloc;
 	roc_nix_bpf_config;
+	roc_nix_bpf_connect;
 	roc_nix_bpf_count_get;
 	roc_nix_bpf_dump;
 	roc_nix_bpf_ena_dis;
-- 
2.25.1

[dpdk-dev] [PATCH 11/27] common/cnxk: support RoC API to get stats to index

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

CN10K platform supports different stats for HW bandwidth profiles.
Implement RoC API to get index for given stats type.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     | 18 ++++++++++++++++
 drivers/common/cnxk/roc_nix_bpf.c | 34 +++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |  1 +
 3 files changed, 53 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 08795cd76a..663d064e23 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -10,6 +10,7 @@
 #define ROC_NIX_BPF_ID_INVALID	      0xFFFF
 #define ROC_NIX_BPF_LEVEL_IDX_INVALID 0xFF
 #define ROC_NIX_BPF_LEVEL_MAX	      3
+#define ROC_NIX_BPF_STATS_MAX	      12
 
 /** NIX rate limits */
 #define MAX_RATE_DIV_EXP  12
@@ -119,6 +120,21 @@ enum roc_nix_bpf_action {
 	ROC_NIX_BPF_ACTION_RED
 };
 
+enum roc_nix_bpf_stats {
+	ROC_NIX_BPF_GREEN_PKT_F_PASS = BIT_ULL(0),
+	ROC_NIX_BPF_GREEN_OCTS_F_PASS = BIT_ULL(1),
+	ROC_NIX_BPF_GREEN_PKT_F_DROP = BIT_ULL(2),
+	ROC_NIX_BPF_GREEN_OCTS_F_DROP = BIT_ULL(3),
+	ROC_NIX_BPF_YELLOW_PKT_F_PASS = BIT_ULL(4),
+	ROC_NIX_BPF_YELLOW_OCTS_F_PASS = BIT_ULL(5),
+	ROC_NIX_BPF_YELLOW_PKT_F_DROP = BIT_ULL(6),
+	ROC_NIX_BPF_YELLOW_OCTS_F_DROP = BIT_ULL(7),
+	ROC_NIX_BPF_RED_PKT_F_PASS = BIT_ULL(8),
+	ROC_NIX_BPF_RED_OCTS_F_PASS = BIT_ULL(9),
+	ROC_NIX_BPF_RED_PKT_F_DROP = BIT_ULL(10),
+	ROC_NIX_BPF_RED_OCTS_F_DROP = BIT_ULL(11),
+};
+
 struct roc_nix_bpf_cfg {
 	enum roc_nix_bpf_algo alg;
 	enum roc_nix_bpf_lmode lmode;
@@ -639,6 +655,8 @@ int __roc_api roc_nix_bpf_connect(struct roc_nix *roc_nix,
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
+uint8_t __roc_api roc_nix_bpf_stats_to_idx(enum roc_nix_bpf_stats lvl_flag);
+
 /* MAC */
 int __roc_api roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start);
 int __roc_api roc_nix_mac_link_event_start_stop(struct roc_nix *roc_nix,
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index e75440dc6f..639822be62 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -294,6 +294,40 @@ roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag level_f)
 	return idx;
 }
 
+uint8_t
+roc_nix_bpf_stats_to_idx(enum roc_nix_bpf_stats level_f)
+{
+	uint8_t idx;
+
+	if (level_f & ROC_NIX_BPF_GREEN_PKT_F_PASS)
+		idx = 0;
+	else if (level_f & ROC_NIX_BPF_GREEN_OCTS_F_PASS)
+		idx = 1;
+	else if (level_f & ROC_NIX_BPF_GREEN_PKT_F_DROP)
+		idx = 2;
+	else if (level_f & ROC_NIX_BPF_GREEN_OCTS_F_DROP)
+		idx = 3;
+	else if (level_f & ROC_NIX_BPF_YELLOW_PKT_F_PASS)
+		idx = 4;
+	else if (level_f & ROC_NIX_BPF_YELLOW_OCTS_F_PASS)
+		idx = 5;
+	else if (level_f & ROC_NIX_BPF_YELLOW_PKT_F_DROP)
+		idx = 6;
+	else if (level_f & ROC_NIX_BPF_YELLOW_OCTS_F_DROP)
+		idx = 7;
+	else if (level_f & ROC_NIX_BPF_RED_PKT_F_PASS)
+		idx = 8;
+	else if (level_f & ROC_NIX_BPF_RED_OCTS_F_PASS)
+		idx = 9;
+	else if (level_f & ROC_NIX_BPF_RED_PKT_F_DROP)
+		idx = 10;
+	else if (level_f & ROC_NIX_BPF_RED_OCTS_F_DROP)
+		idx = 11;
+	else
+		idx = ROC_NIX_BPF_STATS_MAX;
+	return idx;
+}
+
 int
 roc_nix_bpf_count_get(struct roc_nix *roc_nix, uint8_t lvl_mask,
 		      uint16_t count[ROC_NIX_BPF_LEVEL_MAX])
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index ef60615446..d3d99cf65e 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -84,6 +84,7 @@ INTERNAL {
 	roc_nix_bpf_free_all;
 	roc_nix_bpf_level_to_idx;
 	roc_nix_bpf_pre_color_tbl_setup;
+	roc_nix_bpf_stats_to_idx;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
 	roc_nix_cq_init;
-- 
2.25.1

[dpdk-dev] [PATCH 12/27] common/cnxk: support RoC API to read profile statistics

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

CN10K platform provides statistics per bandwidth profile and
per nixlf. Implement RoC API to read stats for given bandwidth
profile.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |   9 ++
 drivers/common/cnxk/roc_nix_bpf.c | 197 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |   2 +
 3 files changed, 208 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 663d064e23..94f9bc5442 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -652,6 +652,15 @@ int __roc_api roc_nix_bpf_connect(struct roc_nix *roc_nix,
 				  enum roc_nix_bpf_level_flag lvl_flag,
 				  uint16_t src_id, uint16_t dst_id);
 
+int __roc_api
+roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,
+		       enum roc_nix_bpf_level_flag lvl_flag,
+		       uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);
+
+int __roc_api
+roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,
+			  uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index 639822be62..c4a7a14dbe 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -17,6 +17,9 @@
 	(ROC_NIX_BPF_LEVEL_F_LEAF | ROC_NIX_BPF_LEVEL_F_MID |                  \
 	 ROC_NIX_BPF_LEVEL_F_TOP)
 
+#define NIX_RD_STATS(val)  plt_read64(nix->base + NIX_LF_RX_STATX(val))
+#define NIX_RST_STATS(val) plt_write64(0, nix->base + NIX_LF_RX_STATX(val))
+
 static uint8_t sw_to_hw_lvl_map[] = {NIX_RX_BAND_PROF_LAYER_LEAF,
 				     NIX_RX_BAND_PROF_LAYER_MIDDLE,
 				     NIX_RX_BAND_PROF_LAYER_TOP};
@@ -813,3 +816,197 @@ roc_nix_bpf_connect(struct roc_nix *roc_nix,
 
 	return mbox_process(mbox);
 }
+
+int
+roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,
+		       enum roc_nix_bpf_level_flag lvl_flag,
+		       uint64_t stats[ROC_NIX_BPF_STATS_MAX])
+{
+	uint8_t yellow_pkt_pass, yellow_octs_pass, yellow_pkt_drop;
+	uint8_t green_octs_drop, yellow_octs_drop, red_octs_drop;
+	uint8_t green_pkt_pass, green_octs_pass, green_pkt_drop;
+	uint8_t red_pkt_pass, red_octs_pass, red_pkt_drop;
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_cn10k_aq_enq_rsp *rsp;
+	struct nix_cn10k_aq_enq_req *aq;
+	uint8_t level_idx;
+	int rc;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+	if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		return NIX_ERR_PARAM;
+
+	aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+	if (aq == NULL)
+		return -ENOSPC;
+	aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id);
+	aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+	aq->op = NIX_AQ_INSTOP_READ;
+	rc = mbox_process_msg(mbox, (void *)&rsp);
+	if (rc)
+		return rc;
+
+	green_pkt_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_PKT_F_PASS);
+	green_octs_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS);
+	green_pkt_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_PKT_F_DROP);
+	green_octs_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP);
+	yellow_pkt_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS);
+	yellow_octs_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS);
+	yellow_pkt_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP);
+	yellow_octs_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP);
+	red_pkt_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_PKT_F_PASS);
+	red_octs_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_OCTS_F_PASS);
+	red_pkt_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_PKT_F_DROP);
+	red_octs_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_OCTS_F_DROP);
+
+	if (green_pkt_pass != ROC_NIX_BPF_STATS_MAX)
+		stats[green_pkt_pass] = rsp->prof.green_pkt_pass;
+
+	if (green_octs_pass != ROC_NIX_BPF_STATS_MAX)
+		stats[green_octs_pass] = rsp->prof.green_octs_pass;
+
+	if (green_pkt_drop != ROC_NIX_BPF_STATS_MAX)
+		stats[green_pkt_drop] = rsp->prof.green_pkt_drop;
+
+	if (green_octs_drop != ROC_NIX_BPF_STATS_MAX)
+		stats[green_octs_drop] = rsp->prof.green_octs_pass;
+
+	if (yellow_pkt_pass != ROC_NIX_BPF_STATS_MAX)
+		stats[yellow_pkt_pass] = rsp->prof.yellow_pkt_pass;
+
+	if (yellow_octs_pass != ROC_NIX_BPF_STATS_MAX)
+		stats[yellow_octs_pass] = rsp->prof.yellow_octs_pass;
+
+	if (yellow_pkt_drop != ROC_NIX_BPF_STATS_MAX)
+		stats[yellow_pkt_drop] = rsp->prof.yellow_pkt_drop;
+
+	if (yellow_octs_drop != ROC_NIX_BPF_STATS_MAX)
+		stats[yellow_octs_drop] = rsp->prof.yellow_octs_drop;
+
+	if (red_pkt_pass != ROC_NIX_BPF_STATS_MAX)
+		stats[red_pkt_pass] = rsp->prof.red_pkt_pass;
+
+	if (red_octs_pass != ROC_NIX_BPF_STATS_MAX)
+		stats[red_octs_pass] = rsp->prof.red_octs_pass;
+
+	if (red_pkt_drop != ROC_NIX_BPF_STATS_MAX)
+		stats[red_pkt_drop] = rsp->prof.red_pkt_drop;
+
+	if (red_octs_drop != ROC_NIX_BPF_STATS_MAX)
+		stats[red_octs_drop] = rsp->prof.red_octs_drop;
+
+	return 0;
+}
+
+int
+roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,
+			  uint64_t stats[ROC_NIX_BPF_STATS_MAX])
+{
+	uint8_t yellow_pkt_pass, yellow_octs_pass, yellow_pkt_drop;
+	uint8_t green_octs_drop, yellow_octs_drop, red_octs_drop;
+	uint8_t green_pkt_pass, green_octs_pass, green_pkt_drop;
+	uint8_t red_pkt_pass, red_octs_pass, red_pkt_drop;
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+
+	green_pkt_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_PKT_F_PASS);
+	green_octs_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS);
+	green_pkt_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_PKT_F_DROP);
+	green_octs_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP);
+	yellow_pkt_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS);
+	yellow_octs_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS);
+	yellow_pkt_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP);
+	yellow_octs_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP);
+	red_pkt_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_PKT_F_PASS);
+	red_octs_pass =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_OCTS_F_PASS);
+	red_pkt_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_PKT_F_DROP);
+	red_octs_drop =
+		roc_nix_bpf_stats_to_idx(mask & ROC_NIX_BPF_RED_OCTS_F_DROP);
+
+	if (green_pkt_pass != ROC_NIX_BPF_STATS_MAX) {
+		stats[green_pkt_pass] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_GC_OCTS_PASSED);
+	}
+
+	if (green_octs_pass != ROC_NIX_BPF_STATS_MAX) {
+		stats[green_octs_pass] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_YC_PKTS_PASSED);
+	}
+
+	if (green_pkt_drop != ROC_NIX_BPF_STATS_MAX) {
+		stats[green_pkt_drop] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_GC_OCTS_DROP);
+	}
+
+	if (green_octs_drop != ROC_NIX_BPF_STATS_MAX) {
+		stats[green_octs_drop] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_YC_PKTS_DROP);
+	}
+
+	if (yellow_pkt_pass != ROC_NIX_BPF_STATS_MAX) {
+		stats[yellow_pkt_pass] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_GC_PKTS_PASSED);
+	}
+
+	if (yellow_octs_pass != ROC_NIX_BPF_STATS_MAX) {
+		stats[yellow_octs_pass] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_RC_OCTS_PASSED);
+	}
+
+	if (yellow_pkt_drop != ROC_NIX_BPF_STATS_MAX) {
+		stats[yellow_pkt_drop] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_GC_PKTS_DROP);
+	}
+
+	if (yellow_octs_drop != ROC_NIX_BPF_STATS_MAX) {
+		stats[yellow_octs_drop] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_RC_OCTS_DROP);
+	}
+
+	if (red_pkt_pass != ROC_NIX_BPF_STATS_MAX) {
+		stats[red_pkt_pass] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_YC_OCTS_PASSED);
+	}
+
+	if (red_octs_pass != ROC_NIX_BPF_STATS_MAX) {
+		stats[red_octs_pass] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_RC_PKTS_PASSED);
+	}
+
+	if (red_pkt_drop != ROC_NIX_BPF_STATS_MAX) {
+		stats[red_pkt_drop] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_YC_OCTS_DROP);
+	}
+
+	if (red_octs_drop != ROC_NIX_BPF_STATS_MAX) {
+		stats[red_octs_drop] =
+			NIX_RD_STATS(NIX_STAT_LF_RX_RX_RC_PKTS_DROP);
+	}
+
+	return 0;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index d3d99cf65e..eb4ff5011b 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -83,7 +83,9 @@ INTERNAL {
 	roc_nix_bpf_free;
 	roc_nix_bpf_free_all;
 	roc_nix_bpf_level_to_idx;
+	roc_nix_bpf_lf_stats_read;
 	roc_nix_bpf_pre_color_tbl_setup;
+	roc_nix_bpf_stats_read;
 	roc_nix_bpf_stats_to_idx;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
-- 
2.25.1

[dpdk-dev] [PATCH 13/27] common/cnxk: support RoC API to reset profile stats

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement RoC API to reset stats per bandwidth profile
or per nixlf.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_nix.h     |   7 ++
 drivers/common/cnxk/roc_nix_bpf.c | 113 ++++++++++++++++++++++++++++++
 drivers/common/cnxk/version.map   |   2 +
 3 files changed, 122 insertions(+)

diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index 94f9bc5442..03228bc5ea 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -657,10 +657,17 @@ roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,
 		       enum roc_nix_bpf_level_flag lvl_flag,
 		       uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);
 
+int __roc_api roc_nix_bpf_stats_reset(struct roc_nix *roc_nix, uint16_t id,
+				      uint64_t mask,
+				      enum roc_nix_bpf_level_flag lvl_flag);
+
 int __roc_api
 roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,
 			  uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);
 
+int __roc_api roc_nix_bpf_lf_stats_reset(struct roc_nix *roc_nix,
+					 uint64_t mask);
+
 uint8_t __roc_api
 roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);
 
diff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c
index c4a7a14dbe..31fa42316b 100644
--- a/drivers/common/cnxk/roc_nix_bpf.c
+++ b/drivers/common/cnxk/roc_nix_bpf.c
@@ -913,6 +913,86 @@ roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,
 	return 0;
 }
 
+int
+roc_nix_bpf_stats_reset(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,
+			enum roc_nix_bpf_level_flag lvl_flag)
+{
+	struct mbox *mbox = get_mbox(roc_nix);
+	struct nix_cn10k_aq_enq_req *aq;
+	uint8_t level_idx;
+
+	if (roc_model_is_cn9k())
+		return NIX_ERR_HW_NOTSUP;
+
+	level_idx = roc_nix_bpf_level_to_idx(lvl_flag);
+	if (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)
+		return NIX_ERR_PARAM;
+
+	aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+	if (aq == NULL)
+		return -ENOSPC;
+	aq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id);
+	aq->ctype = NIX_AQ_CTYPE_BAND_PROF;
+	aq->op = NIX_AQ_INSTOP_WRITE;
+
+	if (mask & ROC_NIX_BPF_GREEN_PKT_F_PASS) {
+		aq->prof.green_pkt_pass = 0;
+		aq->prof_mask.green_pkt_pass = ~(aq->prof_mask.green_pkt_pass);
+	}
+	if (mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS) {
+		aq->prof.green_octs_pass = 0;
+		aq->prof_mask.green_octs_pass =
+			~(aq->prof_mask.green_octs_pass);
+	}
+	if (mask & ROC_NIX_BPF_GREEN_PKT_F_DROP) {
+		aq->prof.green_pkt_drop = 0;
+		aq->prof_mask.green_pkt_drop = ~(aq->prof_mask.green_pkt_drop);
+	}
+	if (mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP) {
+		aq->prof.green_octs_drop = 0;
+		aq->prof_mask.green_octs_drop =
+			~(aq->prof_mask.green_octs_drop);
+	}
+	if (mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS) {
+		aq->prof.yellow_pkt_pass = 0;
+		aq->prof_mask.yellow_pkt_pass =
+			~(aq->prof_mask.yellow_pkt_pass);
+	}
+	if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS) {
+		aq->prof.yellow_octs_pass = 0;
+		aq->prof_mask.yellow_octs_pass =
+			~(aq->prof_mask.yellow_octs_pass);
+	}
+	if (mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP) {
+		aq->prof.yellow_pkt_drop = 0;
+		aq->prof_mask.yellow_pkt_drop =
+			~(aq->prof_mask.yellow_pkt_drop);
+	}
+	if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP) {
+		aq->prof.yellow_octs_drop = 0;
+		aq->prof_mask.yellow_octs_drop =
+			~(aq->prof_mask.yellow_octs_drop);
+	}
+	if (mask & ROC_NIX_BPF_RED_PKT_F_PASS) {
+		aq->prof.red_pkt_pass = 0;
+		aq->prof_mask.red_pkt_pass = ~(aq->prof_mask.red_pkt_pass);
+	}
+	if (mask & ROC_NIX_BPF_RED_OCTS_F_PASS) {
+		aq->prof.red_octs_pass = 0;
+		aq->prof_mask.red_octs_pass = ~(aq->prof_mask.red_octs_pass);
+	}
+	if (mask & ROC_NIX_BPF_RED_PKT_F_DROP) {
+		aq->prof.red_pkt_drop = 0;
+		aq->prof_mask.red_pkt_drop = ~(aq->prof_mask.red_pkt_drop);
+	}
+	if (mask & ROC_NIX_BPF_RED_OCTS_F_DROP) {
+		aq->prof.red_octs_drop = 0;
+		aq->prof_mask.red_octs_drop = ~(aq->prof_mask.red_octs_drop);
+	}
+
+	return mbox_process(mbox);
+}
+
 int
 roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,
 			  uint64_t stats[ROC_NIX_BPF_STATS_MAX])
@@ -1010,3 +1090,36 @@ roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,
 
 	return 0;
 }
+
+int
+roc_nix_bpf_lf_stats_reset(struct roc_nix *roc_nix, uint64_t mask)
+{
+	struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+
+	if (mask & ROC_NIX_BPF_GREEN_PKT_F_PASS)
+		NIX_RST_STATS(ROC_NIX_BPF_GREEN_PKT_F_PASS);
+	if (mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS)
+		NIX_RST_STATS(ROC_NIX_BPF_GREEN_OCTS_F_PASS);
+	if (mask & ROC_NIX_BPF_GREEN_PKT_F_DROP)
+		NIX_RST_STATS(ROC_NIX_BPF_GREEN_PKT_F_DROP);
+	if (mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP)
+		NIX_RST_STATS(ROC_NIX_BPF_GREEN_OCTS_F_DROP);
+	if (mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS)
+		NIX_RST_STATS(ROC_NIX_BPF_YELLOW_PKT_F_PASS);
+	if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS)
+		NIX_RST_STATS(ROC_NIX_BPF_YELLOW_OCTS_F_PASS);
+	if (mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP)
+		NIX_RST_STATS(ROC_NIX_BPF_YELLOW_PKT_F_DROP);
+	if (mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP)
+		NIX_RST_STATS(ROC_NIX_BPF_YELLOW_OCTS_F_DROP);
+	if (mask & ROC_NIX_BPF_RED_PKT_F_PASS)
+		NIX_RST_STATS(ROC_NIX_BPF_RED_PKT_F_PASS);
+	if (mask & ROC_NIX_BPF_RED_OCTS_F_PASS)
+		NIX_RST_STATS(ROC_NIX_BPF_RED_OCTS_F_PASS);
+	if (mask & ROC_NIX_BPF_RED_PKT_F_DROP)
+		NIX_RST_STATS(ROC_NIX_BPF_RED_PKT_F_DROP);
+	if (mask & ROC_NIX_BPF_RED_OCTS_F_DROP)
+		NIX_RST_STATS(ROC_NIX_BPF_RED_OCTS_F_DROP);
+
+	return 0;
+}
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index eb4ff5011b..ab8f917b5c 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -84,8 +84,10 @@ INTERNAL {
 	roc_nix_bpf_free_all;
 	roc_nix_bpf_level_to_idx;
 	roc_nix_bpf_lf_stats_read;
+	roc_nix_bpf_lf_stats_reset;
 	roc_nix_bpf_pre_color_tbl_setup;
 	roc_nix_bpf_stats_read;
+	roc_nix_bpf_stats_reset;
 	roc_nix_bpf_stats_to_idx;
 	roc_nix_cq_dump;
 	roc_nix_cq_fini;
-- 
2.25.1

[dpdk-dev] [PATCH 14/27] common/cnxk: support meter in action list

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Meter action is added in supported action list.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/common/cnxk/roc_npc.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h
index bab25fd72e..0853889a32 100644
--- a/drivers/common/cnxk/roc_npc.h
+++ b/drivers/common/cnxk/roc_npc.h
@@ -58,7 +58,7 @@ struct roc_npc_flow_item_raw {
 	const uint8_t *pattern; /**< Byte string to look for. */
 };
 
-#define ROC_NPC_MAX_ACTION_COUNT 12
+#define ROC_NPC_MAX_ACTION_COUNT 17
 
 enum roc_npc_action_type {
 	ROC_NPC_ACTION_TYPE_END = (1 << 0),
@@ -77,6 +77,7 @@ enum roc_npc_action_type {
 	ROC_NPC_ACTION_TYPE_VLAN_INSERT = (1 << 13),
 	ROC_NPC_ACTION_TYPE_VLAN_ETHTYPE_INSERT = (1 << 14),
 	ROC_NPC_ACTION_TYPE_VLAN_PCP_INSERT = (1 << 15),
+	ROC_NPC_ACTION_TYPE_METER = (1 << 16),
 };
 
 struct roc_npc_action {
@@ -110,6 +111,10 @@ struct roc_npc_action_of_set_vlan_pcp {
 	uint8_t vlan_pcp; /**< VLAN priority. */
 };
 
+struct roc_npc_action_meter {
+	uint32_t mtr_id; /**< Meter id to be applied. > */
+};
+
 struct roc_npc_attr {
 	uint32_t priority;	/**< Rule priority level within group. */
 	uint32_t ingress : 1;	/**< Rule applies to ingress traffic. */
-- 
2.25.1

[dpdk-dev] [PATCH 15/27] net/cnxk: support meter ops get API

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

To enable support for ingress meter, supported operations
are exposed for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev.c     |  1 +
 drivers/net/cnxk/cn10k_ethdev.h     |  2 ++
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 18 ++++++++++++++++++
 drivers/net/cnxk/meson.build        |  1 +
 4 files changed, 22 insertions(+)
 create mode 100644 drivers/net/cnxk/cn10k_ethdev_mtr.c

diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
index 7caec6cf14..8c1f6a4408 100644
--- a/drivers/net/cnxk/cn10k_ethdev.c
+++ b/drivers/net/cnxk/cn10k_ethdev.c
@@ -457,6 +457,7 @@ nix_eth_dev_ops_override(void)
 	cnxk_eth_dev_ops.dev_ptypes_set = cn10k_nix_ptypes_set;
 	cnxk_eth_dev_ops.timesync_enable = cn10k_nix_timesync_enable;
 	cnxk_eth_dev_ops.timesync_disable = cn10k_nix_timesync_disable;
+	cnxk_eth_dev_ops.mtr_ops_get = cn10k_nix_mtr_ops_get;
 }
 
 static void
diff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h
index 8b6e0f2b3f..117aa2a62d 100644
--- a/drivers/net/cnxk/cn10k_ethdev.h
+++ b/drivers/net/cnxk/cn10k_ethdev.h
@@ -38,4 +38,6 @@ struct cn10k_eth_rxq {
 void cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev);
 void cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev);
 
+/* MTR */
+int cn10k_nix_mtr_ops_get(struct rte_eth_dev *dev, void *ops);
 #endif /* __CN10K_ETHDEV_H__ */
diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
new file mode 100644
index 0000000000..9b46032858
--- /dev/null
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include "cn10k_ethdev.h"
+#include <rte_mtr_driver.h>
+
+const struct rte_mtr_ops nix_mtr_ops = {
+};
+
+int
+cn10k_nix_mtr_ops_get(struct rte_eth_dev *dev, void *ops)
+{
+	RTE_SET_USED(dev);
+
+	*(const void **)ops = &nix_mtr_ops;
+	return 0;
+}
diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build
index d4cdd1744a..91afc1de4c 100644
--- a/drivers/net/cnxk/meson.build
+++ b/drivers/net/cnxk/meson.build
@@ -35,6 +35,7 @@ sources += files(
 # CN10K
 sources += files(
         'cn10k_ethdev.c',
+        'cn10k_ethdev_mtr.c',
         'cn10k_rte_flow.c',
         'cn10k_rx.c',
         'cn10k_rx_mseg.c',
-- 
2.25.1

[dpdk-dev] [PATCH 16/27] net/cnxk: support ops to get meter capabilities

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement ethdev operation to get meter capabilities for
CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 48 +++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 9b46032858..bf97bf4a71 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -5,7 +5,55 @@
 #include "cn10k_ethdev.h"
 #include <rte_mtr_driver.h>
 
+#define NIX_MTR_COUNT_MAX      73 /* 64(leaf) + 8(mid) + 1(top) */
+#define NIX_MTR_COUNT_PER_FLOW 3  /* 1(leaf) + 1(mid) + 1(top) */
+
+static struct rte_mtr_capabilities mtr_capa = {
+	.n_max = NIX_MTR_COUNT_MAX,
+	.n_shared_max = NIX_MTR_COUNT_PER_FLOW,
+	/* .identical = , */
+	.shared_identical = true,
+	/* .shared_n_flows_per_mtr_max = ,*/
+	.chaining_n_mtrs_per_flow_max = NIX_MTR_COUNT_PER_FLOW,
+	.chaining_use_prev_mtr_color_supported = true,
+	.chaining_use_prev_mtr_color_enforced = true,
+	.meter_srtcm_rfc2697_n_max = NIX_MTR_COUNT_MAX,
+	.meter_trtcm_rfc2698_n_max = NIX_MTR_COUNT_MAX,
+	.meter_trtcm_rfc4115_n_max = NIX_MTR_COUNT_MAX,
+	.meter_rate_max = ROC_NIX_BPF_RATE_MAX,
+	.meter_policy_n_max = NIX_MTR_COUNT_MAX,
+	.color_aware_srtcm_rfc2697_supported = true,
+	.color_aware_trtcm_rfc2698_supported = true,
+	.color_aware_trtcm_rfc4115_supported = true,
+	.srtcm_rfc2697_byte_mode_supported = true,
+	.srtcm_rfc2697_packet_mode_supported = true,
+	.trtcm_rfc2698_byte_mode_supported = true,
+	.trtcm_rfc2698_packet_mode_supported = true,
+	.trtcm_rfc4115_byte_mode_supported = true,
+	.trtcm_rfc4115_packet_mode_supported = true,
+	.stats_mask = RTE_MTR_STATS_N_PKTS_GREEN | RTE_MTR_STATS_N_PKTS_YELLOW |
+		      RTE_MTR_STATS_N_PKTS_RED | RTE_MTR_STATS_N_PKTS_DROPPED |
+		      RTE_MTR_STATS_N_BYTES_GREEN |
+		      RTE_MTR_STATS_N_BYTES_YELLOW | RTE_MTR_STATS_N_BYTES_RED |
+		      RTE_MTR_STATS_N_BYTES_DROPPED};
+
+static int
+cn10k_nix_mtr_capabilities_get(struct rte_eth_dev *dev,
+			       struct rte_mtr_capabilities *capa,
+			       struct rte_mtr_error *error)
+{
+	RTE_SET_USED(dev);
+
+	if (!capa)
+		return -rte_mtr_error_set(error, EINVAL,
+					  RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+					  "NULL input parameter");
+	*capa = mtr_capa;
+	return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
+	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH 17/27] net/cnxk: support ops to create meter profile

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to add meter profile for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 104 ++++++++++++++++++++++++++++
 drivers/net/cnxk/cnxk_ethdev.h      |  13 ++++
 2 files changed, 117 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index bf97bf4a71..404431fb8c 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -37,6 +37,71 @@ static struct rte_mtr_capabilities mtr_capa = {
 		      RTE_MTR_STATS_N_BYTES_YELLOW | RTE_MTR_STATS_N_BYTES_RED |
 		      RTE_MTR_STATS_N_BYTES_DROPPED};
 
+static struct cn10k_flow_meter_profile *
+nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t profile_id)
+{
+	struct cn10k_mtr_profiles *fmps = &dev->mtr_profiles;
+	struct cn10k_flow_meter_profile *fmp;
+
+	TAILQ_FOREACH(fmp, fmps, next)
+		if (profile_id == fmp->id)
+			return fmp;
+
+	return NULL;
+}
+
+static int
+nix_mtr_profile_validate(struct cnxk_eth_dev *dev, uint32_t profile_id,
+			 struct rte_mtr_meter_profile *profile,
+			 struct rte_mtr_error *error)
+{
+	int rc = 0;
+
+	PLT_SET_USED(dev);
+
+	if (profile == NULL)
+		return -rte_mtr_error_set(error, EINVAL,
+					  RTE_MTR_ERROR_TYPE_METER_PROFILE,
+					  NULL, "Meter profile is null.");
+
+	if (profile_id == UINT32_MAX)
+		return -rte_mtr_error_set(error, EINVAL,
+					  RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+					  NULL, "Meter profile id not valid.");
+
+	switch (profile->alg) {
+	case RTE_MTR_SRTCM_RFC2697:
+		if (profile->srtcm_rfc2697.cir > mtr_capa.meter_rate_max)
+			rc = -rte_mtr_error_set(error, EINVAL,
+				RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+				"CIR exceeds max meter rate");
+		break;
+
+	case RTE_MTR_TRTCM_RFC2698:
+		if (profile->trtcm_rfc2698.pir > mtr_capa.meter_rate_max)
+			rc = -rte_mtr_error_set(error, EINVAL,
+				RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+				"PIR exceeds max meter rate");
+		break;
+
+	case RTE_MTR_TRTCM_RFC4115:
+		if ((profile->trtcm_rfc4115.cir + profile->trtcm_rfc4115.eir) >
+		    mtr_capa.meter_rate_max)
+			rc = -rte_mtr_error_set(error, EINVAL,
+				RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+				"PIR + EIR exceeds max rate");
+		break;
+
+	default:
+		rc = -rte_mtr_error_set(error, EINVAL,
+					RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL,
+					"alg is invalid");
+		break;
+	}
+
+	return rc;
+}
+
 static int
 cn10k_nix_mtr_capabilities_get(struct rte_eth_dev *dev,
 			       struct rte_mtr_capabilities *capa,
@@ -52,8 +117,47 @@ cn10k_nix_mtr_capabilities_get(struct rte_eth_dev *dev,
 	return 0;
 }
 
+static int
+cn10k_nix_mtr_profile_add(struct rte_eth_dev *eth_dev, uint32_t profile_id,
+			  struct rte_mtr_meter_profile *profile,
+			  struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_mtr_profiles *fmps = &dev->mtr_profiles;
+	struct cn10k_flow_meter_profile *fmp;
+	int ret;
+
+	/* Check input params. */
+	ret = nix_mtr_profile_validate(dev, profile_id, profile, error);
+	if (ret)
+		return ret;
+
+	fmp = nix_mtr_profile_find(dev, profile_id);
+	if (fmp) {
+		rte_mtr_error_set(error, EEXIST,
+				  RTE_MTR_ERROR_TYPE_METER_PROFILE_ID, NULL,
+				  "Profile already exist");
+		return 0;
+	}
+
+	fmp = plt_zmalloc(sizeof(struct cn10k_flow_meter_profile), ROC_ALIGN);
+	if (fmp == NULL)
+		return -rte_mtr_error_set(error, ENOMEM,
+					  RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,
+					  "Meter profile memory "
+					  "alloc failed.");
+
+	fmp->id = profile_id;
+	fmp->profile = *profile;
+
+	TAILQ_INSERT_TAIL(fmps, fmp, next);
+
+	return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
+	.meter_profile_add = cn10k_nix_mtr_profile_add,
 };
 
 int
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 2528b3cdaa..5d7cf58a24 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -13,6 +13,7 @@
 #include <rte_mbuf.h>
 #include <rte_mbuf_pool_ops.h>
 #include <rte_mempool.h>
+#include <rte_mtr_driver.h>
 #include <rte_time.h>
 
 #include "roc_api.h"
@@ -144,6 +145,15 @@ struct cnxk_timesync_info {
 	uint64_t *tx_tstamp;
 } __plt_cache_aligned;
 
+struct cn10k_flow_meter_profile {
+	TAILQ_ENTRY(cn10k_flow_meter_profile) next;
+	struct rte_mtr_meter_profile profile; /**< Profile detail. */
+	uint32_t ref_cnt;		      /**< Use count. */
+	uint32_t id;			      /**< Profile id. */
+};
+
+TAILQ_HEAD(cn10k_mtr_profiles, cn10k_flow_meter_profile);
+
 struct cnxk_eth_dev {
 	/* ROC NIX */
 	struct roc_nix nix;
@@ -211,6 +221,9 @@ struct cnxk_eth_dev {
 	double clk_freq_mult;
 	uint64_t clk_delta;
 
+	/* Ingress policer */
+	struct cn10k_mtr_profiles mtr_profiles;
+
 	/* Rx burst for cleanup(Only Primary) */
 	eth_rx_burst_t rx_pkt_burst_no_offload;
 
-- 
2.25.1

[dpdk-dev] [PATCH 18/27] net/cnxk: support ops to delete meter profile

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to delete meter profile for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 30 +++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 404431fb8c..480ce8fd73 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -155,9 +155,39 @@ cn10k_nix_mtr_profile_add(struct rte_eth_dev *eth_dev, uint32_t profile_id,
 	return 0;
 }
 
+static int
+cn10k_nix_mtr_profile_delete(struct rte_eth_dev *eth_dev, uint32_t profile_id,
+			     struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter_profile *fmp;
+
+	if (profile_id == UINT32_MAX)
+		return -rte_mtr_error_set(error, EINVAL,
+					  RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+					  NULL, "Meter profile id not valid.");
+
+	fmp = nix_mtr_profile_find(dev, profile_id);
+	if (fmp == NULL)
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+					  &profile_id,
+					  "Meter profile is invalid.");
+
+	if (fmp->ref_cnt)
+		return -rte_mtr_error_set(error, EBUSY,
+					  RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+					  NULL, "Meter profile is in use.");
+
+	TAILQ_REMOVE(&dev->mtr_profiles, fmp, next);
+	plt_free(fmp);
+	return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
+	.meter_profile_delete = cn10k_nix_mtr_profile_delete,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH 19/27] net/cnxk: support ops to validate meter policy

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to validate meter policy for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 63 +++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 480ce8fd73..8374f40681 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -184,10 +184,73 @@ cn10k_nix_mtr_profile_delete(struct rte_eth_dev *eth_dev, uint32_t profile_id,
 	return 0;
 }
 
+static int
+cn10k_nix_mtr_policy_validate(struct rte_eth_dev *dev,
+			      struct rte_mtr_meter_policy_params *policy,
+			      struct rte_mtr_error *error)
+{
+	enum rte_flow_action_type supported_action[] = {
+		RTE_FLOW_ACTION_TYPE_END, RTE_FLOW_ACTION_TYPE_QUEUE,
+		RTE_FLOW_ACTION_TYPE_DROP, RTE_FLOW_ACTION_TYPE_RSS,
+		RTE_FLOW_ACTION_TYPE_METER};
+	bool supported[RTE_COLORS] = {false, false, false};
+	uint32_t i;
+
+	RTE_SET_USED(dev);
+
+	if (!policy)
+		return 0; /* Nothing to be validated */
+
+	for (i = 0; i < RTE_DIM(supported_action); i++) {
+		if (policy->actions[RTE_COLOR_GREEN]->type ==
+		    supported_action[i]) {
+			supported[RTE_COLOR_GREEN] = true;
+			break;
+		}
+	}
+
+	if (!supported[RTE_COLOR_GREEN]) {
+		return -rte_mtr_error_set(error, ENOTSUP,
+					  RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
+					  "Green: action is not supported");
+	}
+
+	for (i = 0; i < RTE_DIM(supported_action); i++) {
+		if (policy->actions[RTE_COLOR_YELLOW]->type ==
+		    supported_action[i]) {
+			supported[RTE_COLOR_YELLOW] = true;
+			break;
+		}
+	}
+
+	if (!supported[RTE_COLOR_YELLOW]) {
+		return -rte_mtr_error_set(error, ENOTSUP,
+					  RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
+					  "Yellow: action is not supported");
+	}
+
+	for (i = 0; i < RTE_DIM(supported_action); i++) {
+		if (policy->actions[RTE_COLOR_RED]->type ==
+		    supported_action[i]) {
+			supported[RTE_COLOR_RED] = true;
+			break;
+		}
+	}
+
+	if (!supported[RTE_COLOR_RED]) {
+		return -rte_mtr_error_set(error, ENOTSUP,
+					  RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
+					  "Red: action is not supported");
+	}
+
+	return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
 	.meter_profile_delete = cn10k_nix_mtr_profile_delete,
+	.meter_policy_validate = cn10k_nix_mtr_policy_validate,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH 20/27] net/cnxk: support ops to create meter policy

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to add meter policy for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 47 +++++++++++++++++++++++++++++
 drivers/net/cnxk/cnxk_ethdev.h      | 12 ++++++++
 2 files changed, 59 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 8374f40681..854d30dc20 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -50,6 +50,18 @@ nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t profile_id)
 	return NULL;
 }
 
+static struct cn10k_flow_meter_policy *
+nix_mtr_policy_find(struct cnxk_eth_dev *dev, uint32_t meter_policy_id)
+{
+	struct cn10k_mtr_policy *fmps = &dev->mtr_policy;
+	struct cn10k_flow_meter_policy *fmp;
+
+	TAILQ_FOREACH(fmp, fmps, next)
+		if (meter_policy_id == fmp->id)
+			return fmp;
+	return NULL;
+}
+
 static int
 nix_mtr_profile_validate(struct cnxk_eth_dev *dev, uint32_t profile_id,
 			 struct rte_mtr_meter_profile *profile,
@@ -246,11 +258,46 @@ cn10k_nix_mtr_policy_validate(struct rte_eth_dev *dev,
 	return 0;
 }
 
+static int
+cn10k_nix_mtr_policy_add(struct rte_eth_dev *eth_dev, uint32_t policy_id,
+			 struct rte_mtr_meter_policy_params *policy,
+			 struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_mtr_policy *fmps = &dev->mtr_policy;
+	struct cn10k_flow_meter_policy *fmp;
+	int rc;
+
+	fmp = nix_mtr_policy_find(dev, policy_id);
+	if (fmp) {
+		plt_info("Policy already exist");
+		return 0;
+	}
+
+	fmp = plt_zmalloc(sizeof(struct cn10k_flow_meter_policy), ROC_ALIGN);
+	if (fmp == NULL) {
+		return -rte_mtr_error_set(error, ENOMEM,
+					  RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,
+					  "Memory allocation failure");
+	} else {
+		rc = cn10k_nix_mtr_policy_validate(eth_dev, policy, error);
+		if (rc)
+			return rc;
+	}
+
+	fmp->id = policy_id;
+	fmp->policy = *policy;
+	TAILQ_INSERT_TAIL(fmps, fmp, next);
+
+	return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
 	.meter_profile_delete = cn10k_nix_mtr_profile_delete,
 	.meter_policy_validate = cn10k_nix_mtr_policy_validate,
+	.meter_policy_add = cn10k_nix_mtr_policy_add,
 };
 
 int
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 5d7cf58a24..3811360b75 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -145,6 +145,16 @@ struct cnxk_timesync_info {
 	uint64_t *tx_tstamp;
 } __plt_cache_aligned;
 
+
+struct cn10k_flow_meter_policy {
+	TAILQ_ENTRY(cn10k_flow_meter_policy) next;
+	/**< Pointer to the next flow meter structure. */
+	uint32_t id;	 /**< Policy id */
+	uint32_t mtr_id; /** Meter id */
+	struct rte_mtr_meter_policy_params policy;
+	uint32_t ref_cnt;
+};
+
 struct cn10k_flow_meter_profile {
 	TAILQ_ENTRY(cn10k_flow_meter_profile) next;
 	struct rte_mtr_meter_profile profile; /**< Profile detail. */
@@ -153,6 +163,7 @@ struct cn10k_flow_meter_profile {
 };
 
 TAILQ_HEAD(cn10k_mtr_profiles, cn10k_flow_meter_profile);
+TAILQ_HEAD(cn10k_mtr_policy, cn10k_flow_meter_policy);
 
 struct cnxk_eth_dev {
 	/* ROC NIX */
@@ -223,6 +234,7 @@ struct cnxk_eth_dev {
 
 	/* Ingress policer */
 	struct cn10k_mtr_profiles mtr_profiles;
+	struct cn10k_mtr_policy mtr_policy;
 
 	/* Rx burst for cleanup(Only Primary) */
 	eth_rx_burst_t rx_pkt_burst_no_offload;
-- 
2.25.1

[dpdk-dev] [PATCH 21/27] net/cnxk: support ops to delete meter policy

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to delete meter policy for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 854d30dc20..7273b88046 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -292,12 +292,38 @@ cn10k_nix_mtr_policy_add(struct rte_eth_dev *eth_dev, uint32_t policy_id,
 	return 0;
 }
 
+static int
+cn10k_nix_mtr_policy_delete(struct rte_eth_dev *eth_dev, uint32_t policy_id,
+			    struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter_policy *fmp;
+
+	fmp = nix_mtr_policy_find(dev, policy_id);
+	if (fmp == NULL) {
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_METER_POLICY_ID,
+					  NULL, "No policy found");
+	}
+
+	if (fmp->ref_cnt)
+		return -rte_mtr_error_set(error, EBUSY,
+					  RTE_MTR_ERROR_TYPE_METER_POLICY_ID,
+					  NULL, "Meter policy is in use.");
+
+	TAILQ_REMOVE(&dev->mtr_policy, fmp, next);
+	plt_free(fmp);
+
+	return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
 	.meter_profile_delete = cn10k_nix_mtr_profile_delete,
 	.meter_policy_validate = cn10k_nix_mtr_policy_validate,
 	.meter_policy_add = cn10k_nix_mtr_policy_add,
+	.meter_policy_delete = cn10k_nix_mtr_policy_delete,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH 22/27] net/cnxk: support ops to create meter

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to create meter instance for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 75 +++++++++++++++++++++++++++++
 drivers/net/cnxk/cnxk_ethdev.h      | 20 ++++++++
 2 files changed, 95 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 7273b88046..dbf74249c7 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -37,6 +37,18 @@ static struct rte_mtr_capabilities mtr_capa = {
 		      RTE_MTR_STATS_N_BYTES_YELLOW | RTE_MTR_STATS_N_BYTES_RED |
 		      RTE_MTR_STATS_N_BYTES_DROPPED};
 
+static struct cn10k_flow_meter *
+nix_mtr_find(struct cnxk_eth_dev *dev, uint32_t meter_id)
+{
+	struct cn10k_mtr *fms = &dev->mtr;
+	struct cn10k_flow_meter *fm;
+
+	TAILQ_FOREACH(fm, fms, next)
+		if (meter_id == fm->id)
+			return fm;
+	return NULL;
+}
+
 static struct cn10k_flow_meter_profile *
 nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t profile_id)
 {
@@ -317,6 +329,68 @@ cn10k_nix_mtr_policy_delete(struct rte_eth_dev *eth_dev, uint32_t policy_id,
 	return 0;
 }
 
+static int
+cn10k_nix_mtr_create(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+		     struct rte_mtr_params *params, int shared,
+		     struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter_profile *profile;
+	struct cn10k_flow_meter_policy *policy;
+	struct cn10k_mtr *fm = &dev->mtr;
+	struct cn10k_flow_meter *mtr;
+
+	RTE_SET_USED(shared);
+
+	if (params == NULL)
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+					  "Meter params are invalid.");
+
+	profile = nix_mtr_profile_find(dev, params->meter_profile_id);
+	if (profile == NULL)
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_METER_PROFILE_ID,
+					  &params->meter_profile_id,
+					  "Meter profile is invalid.");
+
+	policy = nix_mtr_policy_find(dev, params->meter_policy_id);
+	if (policy == NULL)
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_METER_POLICY_ID,
+					  &params->meter_policy_id,
+					  "Meter policy is invalid.");
+
+	mtr = nix_mtr_find(dev, mtr_id);
+	if (mtr == NULL) {
+		mtr = plt_zmalloc(sizeof(struct cn10k_flow_meter), ROC_ALIGN);
+		if (mtr == NULL) {
+			return -rte_mtr_error_set(error, ENOMEM,
+				RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,
+				"Meter memory alloc failed.");
+		} else {
+			mtr->id = mtr_id;
+			mtr->profile = profile;
+			mtr->policy = policy;
+			mtr->params = *params;
+			mtr->bpf_id = ROC_NIX_BPF_ID_INVALID;
+			mtr->prev_id = ROC_NIX_BPF_ID_INVALID;
+			mtr->next_id = ROC_NIX_BPF_ID_INVALID;
+			mtr->is_prev = false;
+			mtr->is_next = false;
+			mtr->level = ROC_NIX_BPF_LEVEL_IDX_INVALID;
+		}
+	} else {
+		plt_info("Meter already exist");
+		return 0;
+	}
+
+	profile->ref_cnt++;
+	policy->ref_cnt++;
+	TAILQ_INSERT_TAIL(fm, mtr, next);
+	return 0;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -324,6 +398,7 @@ const struct rte_mtr_ops nix_mtr_ops = {
 	.meter_policy_validate = cn10k_nix_mtr_policy_validate,
 	.meter_policy_add = cn10k_nix_mtr_policy_add,
 	.meter_policy_delete = cn10k_nix_mtr_policy_delete,
+	.create = cn10k_nix_mtr_create,
 };
 
 int
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 3811360b75..c8ddcab8f1 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -145,6 +145,24 @@ struct cnxk_timesync_info {
 	uint64_t *tx_tstamp;
 } __plt_cache_aligned;
 
+struct cn10k_flow_meter {
+	TAILQ_ENTRY(cn10k_flow_meter) next;
+	/**< Pointer to the next flow meter structure. */
+	uint32_t id; /**< Usr mtr id. */
+	struct cn10k_flow_meter_profile *profile;
+	struct cn10k_flow_meter_policy *policy;
+	uint32_t bpf_id; /**< Hw mtr id. */
+	uint32_t rq_num;
+	uint32_t *rq_id;
+	uint16_t level;
+	uint32_t prev_id; /**< Prev mtr id for chaining */
+	uint32_t next_id; /**< Next mtr id for chaining */
+	bool is_prev;
+	bool is_next;
+	struct rte_mtr_params params;
+	struct roc_nix_bpf_objs profs;
+	uint32_t ref_cnt;
+};
 
 struct cn10k_flow_meter_policy {
 	TAILQ_ENTRY(cn10k_flow_meter_policy) next;
@@ -164,6 +182,7 @@ struct cn10k_flow_meter_profile {
 
 TAILQ_HEAD(cn10k_mtr_profiles, cn10k_flow_meter_profile);
 TAILQ_HEAD(cn10k_mtr_policy, cn10k_flow_meter_policy);
+TAILQ_HEAD(cn10k_mtr, cn10k_flow_meter);
 
 struct cnxk_eth_dev {
 	/* ROC NIX */
@@ -235,6 +254,7 @@ struct cnxk_eth_dev {
 	/* Ingress policer */
 	struct cn10k_mtr_profiles mtr_profiles;
 	struct cn10k_mtr_policy mtr_policy;
+	struct cn10k_mtr mtr;
 
 	/* Rx burst for cleanup(Only Primary) */
 	eth_rx_burst_t rx_pkt_burst_no_offload;
-- 
2.25.1

[dpdk-dev] [PATCH 23/27] net/cnxk: support ops to delete meter

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to delete meter instance for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 82 +++++++++++++++++++++++++++++
 1 file changed, 82 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index dbf74249c7..6b19e34361 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -8,6 +8,10 @@
 #define NIX_MTR_COUNT_MAX      73 /* 64(leaf) + 8(mid) + 1(top) */
 #define NIX_MTR_COUNT_PER_FLOW 3  /* 1(leaf) + 1(mid) + 1(top) */
 
+static const enum roc_nix_bpf_level_flag lvl_map[] = {ROC_NIX_BPF_LEVEL_F_LEAF,
+						      ROC_NIX_BPF_LEVEL_F_MID,
+						      ROC_NIX_BPF_LEVEL_F_TOP};
+
 static struct rte_mtr_capabilities mtr_capa = {
 	.n_max = NIX_MTR_COUNT_MAX,
 	.n_shared_max = NIX_MTR_COUNT_PER_FLOW,
@@ -391,6 +395,83 @@ cn10k_nix_mtr_create(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
 	return 0;
 }
 
+static int
+cn10k_nix_mtr_destroy(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+		      struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct roc_nix_bpf_objs profs = {0};
+	struct cn10k_mtr *fm = &dev->mtr;
+	struct roc_nix *nix = &dev->nix;
+	struct cn10k_flow_meter *mtr;
+	int rc = 0;
+
+	mtr = nix_mtr_find(dev, mtr_id);
+	if (mtr == NULL) {
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_MTR_ID, &mtr_id,
+					  "Meter id is invalid.");
+	} else {
+		if (!mtr->ref_cnt) {
+			switch (lvl_map[mtr->level]) {
+			case ROC_NIX_BPF_LEVEL_F_LEAF:
+				if (mtr->is_next) {
+					rc = roc_nix_bpf_connect(nix,
+						ROC_NIX_BPF_LEVEL_F_LEAF,
+						mtr_id,
+						ROC_NIX_BPF_ID_INVALID);
+				}
+				break;
+			case ROC_NIX_BPF_LEVEL_F_MID:
+				if (mtr->is_prev) {
+					rc = roc_nix_bpf_connect(nix,
+						ROC_NIX_BPF_LEVEL_F_LEAF,
+						mtr->prev_id,
+						ROC_NIX_BPF_ID_INVALID);
+				}
+				if (mtr->is_next) {
+					rc = roc_nix_bpf_connect(nix,
+						ROC_NIX_BPF_LEVEL_F_MID, mtr_id,
+						ROC_NIX_BPF_ID_INVALID);
+				}
+				break;
+			case ROC_NIX_BPF_LEVEL_F_TOP:
+				if (mtr->is_prev) {
+					rc = roc_nix_bpf_connect(nix,
+						ROC_NIX_BPF_LEVEL_F_MID,
+						mtr->prev_id,
+						ROC_NIX_BPF_ID_INVALID);
+				}
+				break;
+			default:
+				return -rte_mtr_error_set(error, EINVAL,
+						  RTE_MTR_ERROR_TYPE_MTR_ID,
+						  NULL, "Invalid meter level");
+			}
+
+			if (rc)
+				goto exit;
+
+			profs.level = mtr->level;
+			profs.count = 1;
+			profs.ids[0] = mtr->bpf_id;
+			rc = roc_nix_bpf_free(nix, &profs, 1);
+			if (rc)
+				goto exit;
+
+			TAILQ_REMOVE(fm, mtr, next);
+			plt_free(fm);
+		} else {
+			return -rte_mtr_error_set(error, EADDRINUSE,
+						  RTE_MTR_ERROR_TYPE_MTR_ID,
+						  &mtr_id, "Meter id in use.");
+		}
+	}
+
+exit:
+	return rc;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -399,6 +480,7 @@ const struct rte_mtr_ops nix_mtr_ops = {
 	.meter_policy_add = cn10k_nix_mtr_policy_add,
 	.meter_policy_delete = cn10k_nix_mtr_policy_delete,
 	.create = cn10k_nix_mtr_create,
+	.destroy = cn10k_nix_mtr_destroy,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH 24/27] net/cnxk: support ops to enable/disable meter

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to enable or disable meter instance for
CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 60 +++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 6b19e34361..d873608104 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -472,6 +472,64 @@ cn10k_nix_mtr_destroy(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
 	return rc;
 }
 
+static int
+cn10k_nix_mtr_enable(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+		     struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct roc_nix *nix = &dev->nix;
+	struct cn10k_flow_meter *mtr;
+	struct roc_nix_rq *rq;
+	uint32_t i;
+	int rc = 0;
+
+	mtr = nix_mtr_find(dev, mtr_id);
+	if (mtr == NULL) {
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+					  "Meter id is invalid.");
+	}
+
+	if (mtr->level != 0)
+		return 0;
+
+	for (i = 0; i < mtr->rq_num; i++) {
+		rq = &dev->rqs[mtr->rq_id[i]];
+		rc |= roc_nix_bpf_ena_dis(nix, mtr->bpf_id, rq, true);
+	}
+
+	return rc;
+}
+
+static int
+cn10k_nix_mtr_disable(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+		      struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct roc_nix *nix = &dev->nix;
+	struct cn10k_flow_meter *mtr;
+	struct roc_nix_rq *rq;
+	uint32_t i;
+	int rc = 0;
+
+	mtr = nix_mtr_find(dev, mtr_id);
+	if (mtr == NULL) {
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+					  "Meter id is invalid.");
+	}
+
+	if (mtr->level != 0)
+		return 0;
+
+	for (i = 0; i < mtr->rq_num; i++) {
+		rq = &dev->rqs[mtr->rq_id[i]];
+		rc |= roc_nix_bpf_ena_dis(nix, mtr->bpf_id, rq, false);
+	}
+
+	return rc;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -481,6 +539,8 @@ const struct rte_mtr_ops nix_mtr_ops = {
 	.meter_policy_delete = cn10k_nix_mtr_policy_delete,
 	.create = cn10k_nix_mtr_create,
 	.destroy = cn10k_nix_mtr_destroy,
+	.meter_enable = cn10k_nix_mtr_enable,
+	.meter_disable = cn10k_nix_mtr_disable,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH 25/27] net/cnxk: support ops to update precolor DSCP table

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to update DSCP table for pre-coloring for
incoming packet per nixlf for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 43 +++++++++++++++++++++++++++++
 drivers/net/cnxk/cnxk_ethdev.h      |  1 +
 2 files changed, 44 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index d873608104..743f2e6975 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -530,6 +530,48 @@ cn10k_nix_mtr_disable(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
 	return rc;
 }
 
+static int
+cn10k_nix_mtr_dscp_table_update(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+				enum rte_color *dscp_table,
+				struct rte_mtr_error *error)
+{
+	enum roc_nix_bpf_color nix_dscp_tbl[ROC_NIX_BPF_PRE_COLOR_MAX];
+	enum roc_nix_bpf_color color_map[] = {ROC_NIX_BPF_COLOR_GREEN,
+					      ROC_NIX_BPF_COLOR_YELLOW,
+					      ROC_NIX_BPF_COLOR_RED};
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	uint8_t lvl_flag = ROC_NIX_BPF_LEVEL_F_LEAF;
+	struct roc_nix_bpf_precolor table;
+	struct roc_nix *nix = &dev->nix;
+	int rc, i;
+
+	if (!dscp_table) {
+		for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+			nix_dscp_tbl[i] = ROC_NIX_BPF_COLOR_GREEN;
+	} else {
+		for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+			nix_dscp_tbl[i] = color_map[dscp_table[i]];
+	}
+
+	table.count = ROC_NIX_BPF_PRE_COLOR_MAX;
+	table.mode = ROC_NIX_BPF_PC_MODE_DSCP_OUTER;
+	for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+		table.color[i] = nix_dscp_tbl[i];
+
+	rc = roc_nix_bpf_pre_color_tbl_setup(nix, mtr_id, lvl_flag, &table);
+	if (rc) {
+		rte_mtr_error_set(error, rc, RTE_MTR_ERROR_TYPE_UNSPECIFIED,
+				  NULL, NULL);
+		goto exit;
+	}
+
+	for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+		dev->precolor_tbl[i] = nix_dscp_tbl[i];
+
+exit:
+	return rc;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -541,6 +583,7 @@ const struct rte_mtr_ops nix_mtr_ops = {
 	.destroy = cn10k_nix_mtr_destroy,
 	.meter_enable = cn10k_nix_mtr_enable,
 	.meter_disable = cn10k_nix_mtr_disable,
+	.meter_dscp_table_update = cn10k_nix_mtr_dscp_table_update,
 };
 
 int
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index c8ddcab8f1..55b1a56a8b 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -252,6 +252,7 @@ struct cnxk_eth_dev {
 	uint64_t clk_delta;
 
 	/* Ingress policer */
+	enum roc_nix_bpf_color precolor_tbl[ROC_NIX_BPF_PRE_COLOR_MAX];
 	struct cn10k_mtr_profiles mtr_profiles;
 	struct cn10k_mtr_policy mtr_policy;
 	struct cn10k_mtr mtr;
-- 
2.25.1

[dpdk-dev] [PATCH 26/27] net/cnxk: support ops to read/update meter stats

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Implement API to read and update stats corresponding to
given meter instance for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 drivers/net/cnxk/cn10k_ethdev_mtr.c | 141 ++++++++++++++++++++++++++++
 1 file changed, 141 insertions(+)

diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 743f2e6975..76e3adcfb1 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -8,6 +8,21 @@
 #define NIX_MTR_COUNT_MAX      73 /* 64(leaf) + 8(mid) + 1(top) */
 #define NIX_MTR_COUNT_PER_FLOW 3  /* 1(leaf) + 1(mid) + 1(top) */
 
+#define NIX_BPF_STATS_MASK_ALL                                                 \
+	{                                                                      \
+		ROC_NIX_BPF_GREEN_PKT_F_PASS | ROC_NIX_BPF_GREEN_OCTS_F_PASS | \
+			ROC_NIX_BPF_GREEN_PKT_F_DROP |                         \
+			ROC_NIX_BPF_GREEN_OCTS_F_DROP |                        \
+			ROC_NIX_BPF_YELLOW_PKT_F_PASS |                        \
+			ROC_NIX_BPF_YELLOW_OCTS_F_PASS |                       \
+			ROC_NIX_BPF_YELLOW_PKT_F_DROP |                        \
+			ROC_NIX_BPF_YELLOW_OCTS_F_DROP |                       \
+			ROC_NIX_BPF_RED_PKT_F_PASS |                           \
+			ROC_NIX_BPF_RED_OCTS_F_PASS |                          \
+			ROC_NIX_BPF_RED_PKT_F_DROP |                           \
+			ROC_NIX_BPF_RED_OCTS_F_DROP                            \
+	}
+
 static const enum roc_nix_bpf_level_flag lvl_map[] = {ROC_NIX_BPF_LEVEL_F_LEAF,
 						      ROC_NIX_BPF_LEVEL_F_MID,
 						      ROC_NIX_BPF_LEVEL_F_TOP};
@@ -572,6 +587,130 @@ cn10k_nix_mtr_dscp_table_update(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
 	return rc;
 }
 
+static int
+cn10k_nix_mtr_stats_update(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+			   uint64_t stats_mask, struct rte_mtr_error *error)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter *mtr;
+
+	if (!stats_mask)
+		return -rte_mtr_error_set(error, EINVAL,
+					  RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+					  "no bit is set to stats mask");
+
+	mtr = nix_mtr_find(dev, mtr_id);
+	if (mtr == NULL) {
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+					  "Meter object not found");
+	}
+
+	mtr->params.stats_mask = stats_mask;
+	return 0;
+}
+
+static int
+cn10k_nix_mtr_stats_read(struct rte_eth_dev *eth_dev, uint32_t mtr_id,
+			 struct rte_mtr_stats *stats, uint64_t *stats_mask,
+			 int clear, struct rte_mtr_error *error)
+{
+	uint8_t yellow_pkt_pass, yellow_octs_pass, yellow_pkt_drop;
+	uint8_t green_octs_drop, yellow_octs_drop, red_octs_drop;
+	uint8_t green_pkt_pass, green_octs_pass, green_pkt_drop;
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	uint8_t red_pkt_pass, red_octs_pass, red_pkt_drop;
+	uint64_t bpf_stats[ROC_NIX_BPF_STATS_MAX] = {0};
+	uint8_t lvl_flag = ROC_NIX_BPF_LEVEL_F_LEAF;
+	/* Need to fix for runtime mask value */
+	uint64_t mask = NIX_BPF_STATS_MASK_ALL;
+	struct roc_nix *nix = &dev->nix;
+	struct cn10k_flow_meter *mtr;
+	int rc;
+
+	if (!stats)
+		return -rte_mtr_error_set(error, EINVAL,
+					  RTE_MTR_ERROR_TYPE_MTR_PARAMS, NULL,
+					  "stats pointer is NULL");
+
+	mtr = nix_mtr_find(dev, mtr_id);
+	if (mtr == NULL) {
+		return -rte_mtr_error_set(error, ENOENT,
+					  RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
+					  "Meter object not found");
+	}
+
+	rc = roc_nix_bpf_stats_read(nix, mtr_id, mask, lvl_flag, bpf_stats);
+	if (rc) {
+		rte_mtr_error_set(error, rc, RTE_MTR_ERROR_TYPE_UNSPECIFIED,
+				  NULL, NULL);
+		goto exit;
+	}
+
+	green_pkt_pass = roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_GREEN_PKT_F_PASS);
+	green_octs_pass =
+		roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_GREEN_OCTS_F_PASS);
+	green_pkt_drop = roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_GREEN_PKT_F_DROP);
+	green_octs_drop =
+		roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_GREEN_OCTS_F_DROP);
+	yellow_pkt_pass =
+		roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_YELLOW_PKT_F_PASS);
+	yellow_octs_pass =
+		roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_YELLOW_OCTS_F_PASS);
+	yellow_pkt_drop =
+		roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_YELLOW_PKT_F_DROP);
+	yellow_octs_drop =
+		roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_YELLOW_OCTS_F_DROP);
+	red_pkt_pass = roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_RED_PKT_F_PASS);
+	red_octs_pass = roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_RED_OCTS_F_PASS);
+	red_pkt_drop = roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_RED_PKT_F_DROP);
+	red_octs_drop = roc_nix_bpf_stats_to_idx(ROC_NIX_BPF_RED_OCTS_F_DROP);
+
+	if (mtr->params.stats_mask & RTE_MTR_STATS_N_PKTS_GREEN)
+		stats->n_pkts[RTE_COLOR_GREEN] = bpf_stats[green_pkt_pass];
+
+	if (mtr->params.stats_mask & RTE_MTR_STATS_N_PKTS_YELLOW)
+		stats->n_pkts[RTE_COLOR_YELLOW] = bpf_stats[yellow_pkt_pass];
+
+	if (mtr->params.stats_mask & RTE_MTR_STATS_N_PKTS_RED)
+		stats->n_pkts[RTE_COLOR_RED] = bpf_stats[red_pkt_pass];
+
+	if (mtr->params.stats_mask & RTE_MTR_STATS_N_BYTES_GREEN)
+		stats->n_bytes[RTE_COLOR_GREEN] = bpf_stats[green_octs_pass];
+
+	if (mtr->params.stats_mask & RTE_MTR_STATS_N_BYTES_YELLOW)
+		stats->n_bytes[RTE_COLOR_YELLOW] = bpf_stats[yellow_octs_pass];
+
+	if (mtr->params.stats_mask & RTE_MTR_STATS_N_BYTES_RED)
+		stats->n_bytes[RTE_COLOR_RED] = bpf_stats[red_octs_pass];
+
+	if (mtr->params.stats_mask & RTE_MTR_STATS_N_PKTS_DROPPED)
+		stats->n_pkts_dropped = bpf_stats[green_pkt_drop] +
+					bpf_stats[yellow_pkt_drop] +
+					bpf_stats[red_pkt_drop];
+
+	if (mtr->params.stats_mask & RTE_MTR_STATS_N_BYTES_DROPPED)
+		stats->n_bytes_dropped = bpf_stats[green_octs_drop] +
+					 bpf_stats[yellow_octs_drop] +
+					 bpf_stats[red_octs_drop];
+
+	if (stats_mask)
+		*stats_mask = mtr->params.stats_mask;
+
+	if (clear) {
+		rc = roc_nix_bpf_stats_reset(nix, mtr_id, mask, lvl_flag);
+		if (rc) {
+			rte_mtr_error_set(error, rc,
+					  RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,
+					  NULL);
+			goto exit;
+		}
+	}
+
+exit:
+	return rc;
+}
+
 const struct rte_mtr_ops nix_mtr_ops = {
 	.capabilities_get = cn10k_nix_mtr_capabilities_get,
 	.meter_profile_add = cn10k_nix_mtr_profile_add,
@@ -584,6 +723,8 @@ const struct rte_mtr_ops nix_mtr_ops = {
 	.meter_enable = cn10k_nix_mtr_enable,
 	.meter_disable = cn10k_nix_mtr_disable,
 	.meter_dscp_table_update = cn10k_nix_mtr_dscp_table_update,
+	.stats_update = cn10k_nix_mtr_stats_update,
+	.stats_read = cn10k_nix_mtr_stats_read,
 };
 
 int
-- 
2.25.1

[dpdk-dev] [PATCH 27/27] net/cnxk: support meter action to flow create

[skori]

From: Sunil Kumar Kori <skori@marvell.com>

Meters are configured per flow using rte_flow_create API.
Implement support for meter action applied on the flow.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 doc/guides/nics/features/cnxk.ini    |   1 +
 doc/guides/nics/features/cnxk_vf.ini |   1 +
 drivers/net/cnxk/cn10k_ethdev_mtr.c  | 270 +++++++++++++++++++++++++++
 drivers/net/cnxk/cnxk_ethdev.h       |  10 +
 drivers/net/cnxk/cnxk_rte_flow.c     | 251 +++++++++++++++++++++++++
 5 files changed, 533 insertions(+)

diff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini
index 5d456257bd..7bbce7dafc 100644
--- a/doc/guides/nics/features/cnxk.ini
+++ b/doc/guides/nics/features/cnxk.ini
@@ -78,6 +78,7 @@ count                = Y
 drop                 = Y
 flag                 = Y
 mark                 = Y
+meter                = Y
 of_pop_vlan          = Y
 of_push_vlan         = Y
 of_set_vlan_pcp      = Y
diff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini
index 7b4299f0be..89802a27f9 100644
--- a/doc/guides/nics/features/cnxk_vf.ini
+++ b/doc/guides/nics/features/cnxk_vf.ini
@@ -70,6 +70,7 @@ count                = Y
 drop                 = Y
 flag                 = Y
 mark                 = Y
+meter                = Y
 of_pop_vlan          = Y
 of_push_vlan         = Y
 of_set_vlan_pcp      = Y
diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c
index 76e3adcfb1..f38d55cf99 100644
--- a/drivers/net/cnxk/cn10k_ethdev_mtr.c
+++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c
@@ -735,3 +735,273 @@ cn10k_nix_mtr_ops_get(struct rte_eth_dev *dev, void *ops)
 	*(const void **)ops = &nix_mtr_ops;
 	return 0;
 }
+
+int
+nix_mtr_validate(struct rte_eth_dev *eth_dev, uint32_t id)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter_profile *profile;
+	struct cn10k_flow_meter_policy *policy;
+	struct cn10k_flow_meter *mtr;
+
+	mtr = nix_mtr_find(dev, id);
+	if (mtr == NULL)
+		return -EINVAL;
+
+	profile = nix_mtr_profile_find(dev, mtr->params.meter_profile_id);
+	if (profile == NULL)
+		return -EINVAL;
+
+	policy = nix_mtr_policy_find(dev, mtr->params.meter_policy_id);
+	if (policy == NULL)
+		return -EINVAL;
+
+	return 0;
+}
+
+int
+nix_mtr_policy_act_get(struct rte_eth_dev *eth_dev, uint32_t id,
+		       struct rte_flow_action actions[RTE_COLORS])
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter_policy *policy;
+	struct cn10k_flow_meter *mtr;
+
+	mtr = nix_mtr_find(dev, id);
+	if (mtr == NULL)
+		return -EINVAL;
+
+	policy = nix_mtr_policy_find(dev, mtr->params.meter_policy_id);
+	if (policy == NULL)
+		return -EINVAL;
+
+	actions[RTE_COLOR_GREEN] = *policy->policy.actions[RTE_COLOR_GREEN];
+	actions[RTE_COLOR_YELLOW] = *policy->policy.actions[RTE_COLOR_YELLOW];
+	actions[RTE_COLOR_RED] = *policy->policy.actions[RTE_COLOR_RED];
+
+	return 0;
+}
+
+int
+nix_mtr_rq_update(struct rte_eth_dev *eth_dev, uint32_t id, uint32_t queue_num,
+		  const uint16_t *queue)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter *mtr;
+	uint32_t i;
+
+	mtr = nix_mtr_find(dev, id);
+	if (mtr == NULL)
+		return -EINVAL;
+
+	mtr->rq_id = plt_zmalloc(queue_num * sizeof(uint32_t), ROC_ALIGN);
+	if (mtr->rq_id == NULL)
+		return -ENOMEM;
+
+	mtr->rq_num = queue_num;
+	for (i = 0; i < queue_num; i++)
+		mtr->rq_id[i] = queue[i];
+
+	return 0;
+}
+
+int
+nix_mtr_chain_update(struct rte_eth_dev *eth_dev, uint32_t cur_id,
+		     uint32_t prev_id, uint32_t next_id)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter *mtr;
+
+	mtr = nix_mtr_find(dev, cur_id);
+	if (mtr == NULL)
+		return -EINVAL;
+
+	switch (lvl_map[mtr->level]) {
+	case ROC_NIX_BPF_LEVEL_F_LEAF:
+		mtr->prev_id = ROC_NIX_BPF_ID_INVALID;
+		mtr->next_id = next_id;
+		mtr->is_prev = false;
+		mtr->is_next = true;
+		break;
+	case ROC_NIX_BPF_LEVEL_F_MID:
+		mtr->prev_id = prev_id;
+		mtr->next_id = next_id;
+		mtr->is_prev = true;
+		mtr->is_next = true;
+		break;
+	case ROC_NIX_BPF_LEVEL_F_TOP:
+		mtr->prev_id = prev_id;
+		mtr->next_id = ROC_NIX_BPF_ID_INVALID;
+		mtr->is_prev = true;
+		mtr->is_next = false;
+		break;
+	default:
+		plt_err("Invalid meter level");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+int
+nix_mtr_level_update(struct rte_eth_dev *eth_dev, uint32_t id, uint32_t level)
+{
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct cn10k_flow_meter *mtr;
+
+	mtr = nix_mtr_find(dev, id);
+	if (mtr == NULL)
+		return -EINVAL;
+
+	mtr->level = level;
+	return 0;
+}
+
+static void
+nix_mtr_config_map(struct cn10k_flow_meter *mtr, struct roc_nix_bpf_cfg *cfg)
+{
+	enum roc_nix_bpf_algo alg_map[] = {
+		ROC_NIX_BPF_ALGO_NONE, ROC_NIX_BPF_ALGO_2697,
+		ROC_NIX_BPF_ALGO_2698, ROC_NIX_BPF_ALGO_4115};
+	struct cn10k_flow_meter_profile *profile = mtr->profile;
+	struct cn10k_flow_meter_policy *policy = mtr->policy;
+
+	cfg->alg = alg_map[profile->profile.alg];
+	cfg->lmode = profile->profile.packet_mode;
+
+	switch (cfg->alg) {
+	case ROC_NIX_BPF_ALGO_2697:
+		cfg->algo2697.cir = profile->profile.srtcm_rfc2697.cir;
+		cfg->algo2697.cbs = profile->profile.srtcm_rfc2697.cbs;
+		cfg->algo2697.ebs = profile->profile.srtcm_rfc2697.ebs;
+		break;
+	case ROC_NIX_BPF_ALGO_2698:
+		cfg->algo2698.cir = profile->profile.trtcm_rfc2698.cir;
+		cfg->algo2698.pir = profile->profile.trtcm_rfc2698.pir;
+		cfg->algo2698.cbs = profile->profile.trtcm_rfc2698.cbs;
+		cfg->algo2698.pbs = profile->profile.trtcm_rfc2698.pbs;
+		break;
+	case ROC_NIX_BPF_ALGO_4115:
+		cfg->algo4115.cir = profile->profile.trtcm_rfc4115.cir;
+		cfg->algo4115.eir = profile->profile.trtcm_rfc4115.eir;
+		cfg->algo4115.cbs = profile->profile.trtcm_rfc4115.cbs;
+		cfg->algo4115.ebs = profile->profile.trtcm_rfc4115.ebs;
+		break;
+	default:
+		break;
+	}
+
+	cfg->action[ROC_NIX_BPF_COLOR_GREEN] = ROC_NIX_BPF_ACTION_PASS;
+	cfg->action[ROC_NIX_BPF_COLOR_YELLOW] = ROC_NIX_BPF_ACTION_PASS;
+	cfg->action[ROC_NIX_BPF_COLOR_RED] = ROC_NIX_BPF_ACTION_PASS;
+
+	if (policy->policy.actions[RTE_COLOR_GREEN]->type ==
+	    RTE_FLOW_ACTION_TYPE_DROP)
+		cfg->action[ROC_NIX_BPF_COLOR_GREEN] = ROC_NIX_BPF_ACTION_DROP;
+
+	if (policy->policy.actions[RTE_COLOR_YELLOW]->type ==
+	    RTE_FLOW_ACTION_TYPE_DROP)
+		cfg->action[ROC_NIX_BPF_COLOR_YELLOW] = ROC_NIX_BPF_ACTION_DROP;
+
+	if (policy->policy.actions[RTE_COLOR_RED]->type ==
+	    RTE_FLOW_ACTION_TYPE_DROP)
+		cfg->action[ROC_NIX_BPF_COLOR_RED] = ROC_NIX_BPF_ACTION_DROP;
+}
+
+static void
+nix_dscp_table_map(struct cn10k_flow_meter *mtr,
+		   struct roc_nix_bpf_precolor *tbl)
+{
+	enum roc_nix_bpf_color color_map[] = {ROC_NIX_BPF_COLOR_GREEN,
+					      ROC_NIX_BPF_COLOR_YELLOW,
+					      ROC_NIX_BPF_COLOR_RED};
+	int i;
+
+	tbl->count = ROC_NIX_BPF_PRE_COLOR_MAX;
+	tbl->mode = ROC_NIX_BPF_PC_MODE_DSCP_OUTER;
+
+	for (i = 0; i < ROC_NIX_BPF_PRE_COLOR_MAX; i++)
+		tbl->color[i] = color_map[mtr->params.dscp_table[i]];
+}
+
+int
+nix_mtr_configure(struct rte_eth_dev *eth_dev, uint32_t id)
+{
+	struct cn10k_flow_meter *mtr[ROC_NIX_BPF_LEVEL_MAX] = {0};
+	struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+	struct roc_nix_bpf_objs profs[ROC_NIX_BPF_LEVEL_MAX];
+	uint8_t idx0 = ROC_NIX_BPF_LEVEL_IDX_INVALID;
+	uint8_t idx1 = ROC_NIX_BPF_LEVEL_IDX_INVALID;
+	uint8_t idx2 = ROC_NIX_BPF_LEVEL_IDX_INVALID;
+	uint16_t per_lvl_cnt[ROC_NIX_BPF_LEVEL_MAX];
+	struct roc_nix *nix = &dev->nix;
+	struct roc_nix_bpf_precolor tbl;
+	struct roc_nix_bpf_cfg cfg;
+	struct roc_nix_rq *rq;
+	uint8_t lvl_mask;
+	uint32_t i;
+	int rc;
+
+	mtr[0] = nix_mtr_find(dev, id);
+	if (mtr[0] == NULL)
+		return -EINVAL;
+
+	idx0 = roc_nix_bpf_level_to_idx(lvl_map[mtr[0]->level]);
+	lvl_mask = ROC_NIX_BPF_LEVEL_F_LEAF;
+	per_lvl_cnt[idx0] = 1;
+
+	if (mtr[0]->is_next) {
+		mtr[1] = nix_mtr_find(dev, mtr[0]->next_id);
+		if (mtr[1] == NULL)
+			return -EINVAL;
+
+		idx1 = roc_nix_bpf_level_to_idx(lvl_map[mtr[1]->level]);
+		lvl_mask |= ROC_NIX_BPF_LEVEL_F_MID;
+		per_lvl_cnt[idx1] = 1;
+	}
+
+	if (mtr[1] && mtr[1]->is_next) {
+		mtr[2] = nix_mtr_find(dev, mtr[1]->next_id);
+		if (mtr[2] == NULL)
+			return -EINVAL;
+
+		idx2 = roc_nix_bpf_level_to_idx(lvl_map[mtr[2]->level]);
+		lvl_mask |= ROC_NIX_BPF_LEVEL_F_TOP;
+		per_lvl_cnt[idx2] = 1;
+	}
+
+	rc = roc_nix_bpf_alloc(nix, lvl_mask, per_lvl_cnt, profs);
+	if (rc)
+		return rc;
+
+	mtr[0]->bpf_id = profs[idx0].ids[0];
+
+	if (mtr[0]->is_next)
+		mtr[1]->bpf_id = profs[idx1].ids[0];
+
+	if (mtr[1]->is_next)
+		mtr[2]->bpf_id = profs[idx2].ids[0];
+
+	for (i = 0; i < ROC_NIX_BPF_LEVEL_MAX; i++) {
+		memset(&cfg, 0, sizeof(struct roc_nix_bpf_cfg));
+		nix_mtr_config_map(mtr[i], &cfg);
+		rc = roc_nix_bpf_config(nix, mtr[i]->bpf_id,
+					lvl_map[mtr[i]->level], &cfg);
+
+		memset(&tbl, 0, sizeof(struct roc_nix_bpf_cfg));
+		nix_dscp_table_map(mtr[i], &tbl);
+		rc = roc_nix_bpf_pre_color_tbl_setup(nix, mtr[i]->bpf_id,
+						     lvl_map[mtr[i]->level],
+						     &tbl);
+
+		if (mtr[i]->params.meter_enable) {
+			for (i = 0; mtr[i]->rq_num; i++) {
+				rq = &dev->rqs[mtr[i]->rq_id[i]];
+				rc = roc_nix_bpf_ena_dis(nix, mtr[i]->bpf_id,
+							 rq, true);
+			}
+		}
+	}
+
+	return rc;
+}
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 55b1a56a8b..764e6296c4 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -432,6 +432,16 @@ int cnxk_nix_dev_get_reg(struct rte_eth_dev *eth_dev,
 
 /* Other private functions */
 int nix_recalc_mtu(struct rte_eth_dev *eth_dev);
+int nix_mtr_validate(struct rte_eth_dev *dev, uint32_t id);
+int nix_mtr_policy_act_get(struct rte_eth_dev *eth_dev, uint32_t id,
+			   struct rte_flow_action actions[RTE_COLORS]);
+int nix_mtr_rq_update(struct rte_eth_dev *eth_dev, uint32_t id,
+		      uint32_t queue_num, const uint16_t *queue);
+int nix_mtr_chain_update(struct rte_eth_dev *eth_dev, uint32_t cur_id,
+			 uint32_t prev_id, uint32_t next_id);
+int nix_mtr_level_update(struct rte_eth_dev *eth_dev, uint32_t id,
+			 uint32_t level);
+int nix_mtr_configure(struct rte_eth_dev *eth_dev, uint32_t id);
 
 /* Inlines */
 static __rte_always_inline uint64_t
diff --git a/drivers/net/cnxk/cnxk_rte_flow.c b/drivers/net/cnxk/cnxk_rte_flow.c
index 32c1b5dee5..7e3db9458b 100644
--- a/drivers/net/cnxk/cnxk_rte_flow.c
+++ b/drivers/net/cnxk/cnxk_rte_flow.c
@@ -92,6 +92,243 @@ npc_rss_action_validate(struct rte_eth_dev *eth_dev,
 	return 0;
 }
 
+static int
+npc_mtr_green_color_action_validate(struct rte_eth_dev *eth_dev, uint32_t id,
+				    const struct rte_flow_action actions[],
+				    struct rte_flow_action *green_act,
+				    uint32_t *prev_id, uint32_t *next_id)
+{
+	const struct rte_flow_action_queue *q2_conf =
+		(const struct rte_flow_action_queue *)green_act->conf;
+	const struct rte_flow_action_rss *rss2_conf =
+		(const struct rte_flow_action_rss *)green_act->conf;
+	const struct rte_flow_action_meter *mtr_conf;
+	const struct rte_flow_action_queue *q1_conf;
+	const struct rte_flow_action_rss *rss1_conf;
+	int i;
+
+	if (green_act->type == RTE_FLOW_ACTION_TYPE_QUEUE)
+		nix_mtr_rq_update(eth_dev, id, 1, &q2_conf->index);
+
+	for (i = 0; actions[i].type != RTE_FLOW_ACTION_TYPE_END; i++) {
+		if (green_act->type == RTE_FLOW_ACTION_TYPE_QUEUE &&
+		    actions[i].type == RTE_FLOW_ACTION_TYPE_QUEUE) {
+			q1_conf =
+				(const struct rte_flow_action_queue *)actions[i]
+					.conf;
+
+			if (q1_conf->index != q2_conf->index)
+				return -EINVAL;
+		}
+	}
+
+	if (green_act->type == RTE_FLOW_ACTION_TYPE_RSS) {
+		nix_mtr_rq_update(eth_dev, id, rss2_conf->queue_num,
+				  rss2_conf->queue);
+	}
+
+	for (i = 0; actions[i].type != RTE_FLOW_ACTION_TYPE_END; i++) {
+		if (green_act->type == RTE_FLOW_ACTION_TYPE_RSS &&
+		    actions[i].type == RTE_FLOW_ACTION_TYPE_RSS) {
+			rss1_conf =
+				(const struct rte_flow_action_rss *)actions[i]
+					.conf;
+
+			if (memcmp(rss1_conf, rss2_conf,
+				   sizeof(struct rte_flow_action_rss)))
+				return -EINVAL;
+		}
+	}
+
+	if (green_act->type == RTE_FLOW_ACTION_TYPE_METER) {
+		mtr_conf =
+			(const struct rte_flow_action_meter *)green_act->conf;
+		*next_id = mtr_conf->mtr_id;
+		nix_mtr_level_update(eth_dev, id, 0);
+		nix_mtr_chain_update(eth_dev, id, *prev_id, *next_id);
+		*prev_id = id;
+	}
+
+	return 0;
+}
+
+static int
+npc_mtr_yellow_color_action_validate(struct rte_eth_dev *eth_dev, uint32_t id,
+				     const struct rte_flow_action actions[],
+				     struct rte_flow_action *yellow_act,
+				     uint32_t *prev_id, uint32_t *next_id)
+{
+	const struct rte_flow_action_queue *q2_conf =
+		(const struct rte_flow_action_queue *)yellow_act->conf;
+	const struct rte_flow_action_rss *rss2_conf =
+		(const struct rte_flow_action_rss *)yellow_act->conf;
+	const struct rte_flow_action_meter *mtr_conf;
+	const struct rte_flow_action_rss *rss1_conf;
+	const struct rte_flow_action_queue *q1_conf;
+	int i;
+
+	if (yellow_act->type == RTE_FLOW_ACTION_TYPE_QUEUE)
+		nix_mtr_rq_update(eth_dev, id, 1, &q2_conf->index);
+
+	for (i = 0; actions[i].type != RTE_FLOW_ACTION_TYPE_END; i++) {
+		if (yellow_act->type == RTE_FLOW_ACTION_TYPE_QUEUE &&
+		    actions[i].type == RTE_FLOW_ACTION_TYPE_QUEUE) {
+			q1_conf = (const struct rte_flow_action_queue *)
+					  yellow_act->conf;
+
+			if (q1_conf->index != q2_conf->index)
+				return -EINVAL;
+		}
+	}
+
+	if (yellow_act->type == RTE_FLOW_ACTION_TYPE_RSS) {
+		nix_mtr_rq_update(eth_dev, id, rss2_conf->queue_num,
+				  rss2_conf->queue);
+	}
+
+	for (i = 0; actions[i].type != RTE_FLOW_ACTION_TYPE_END; i++) {
+		if (yellow_act->type == RTE_FLOW_ACTION_TYPE_RSS &&
+		    actions[i].type == RTE_FLOW_ACTION_TYPE_RSS) {
+			rss1_conf =
+				(const struct rte_flow_action_rss *)actions[i]
+					.conf;
+
+			if (memcmp(rss1_conf, rss2_conf,
+				   sizeof(struct rte_flow_action_rss)))
+				return -EINVAL;
+		}
+	}
+
+	*next_id = 0xffff;
+	if (yellow_act->type == RTE_FLOW_ACTION_TYPE_METER) {
+		mtr_conf =
+			(const struct rte_flow_action_meter *)yellow_act->conf;
+		*next_id = mtr_conf->mtr_id;
+		nix_mtr_level_update(eth_dev, id, 0);
+		nix_mtr_chain_update(eth_dev, id, *prev_id, *next_id);
+		*prev_id = id;
+		return true;
+	}
+
+	return 0;
+}
+
+static int
+npc_mtr_red_color_action_validate(struct rte_eth_dev *eth_dev, uint32_t id,
+				  const struct rte_flow_action actions[],
+				  struct rte_flow_action *red_act,
+				  uint32_t *prev_id, uint32_t *next_id)
+{
+	const struct rte_flow_action_queue *q2_conf =
+		(const struct rte_flow_action_queue *)red_act->conf;
+	const struct rte_flow_action_rss *rss2_conf =
+		(const struct rte_flow_action_rss *)red_act->conf;
+	const struct rte_flow_action_meter *mtr_conf;
+	const struct rte_flow_action_rss *rss1_conf;
+	const struct rte_flow_action_queue *q1_conf;
+	int i;
+
+	if (red_act->type == RTE_FLOW_ACTION_TYPE_QUEUE)
+		nix_mtr_rq_update(eth_dev, id, 1, &q2_conf->index);
+
+	for (i = 0; actions[i].type != RTE_FLOW_ACTION_TYPE_END; i++) {
+		if (red_act->type == RTE_FLOW_ACTION_TYPE_QUEUE &&
+		    actions[i].type == RTE_FLOW_ACTION_TYPE_QUEUE) {
+			q1_conf = (const struct rte_flow_action_queue *)
+					  red_act->conf;
+
+			if (q1_conf->index != q2_conf->index)
+				return -EINVAL;
+		}
+	}
+
+	if (red_act->type == RTE_FLOW_ACTION_TYPE_RSS) {
+		nix_mtr_rq_update(eth_dev, id, rss2_conf->queue_num,
+				  rss2_conf->queue);
+	}
+
+	for (i = 0; actions[i].type != RTE_FLOW_ACTION_TYPE_END; i++) {
+		if (red_act->type == RTE_FLOW_ACTION_TYPE_RSS &&
+		    actions[i].type == RTE_FLOW_ACTION_TYPE_RSS) {
+			rss1_conf =
+				(const struct rte_flow_action_rss *)actions[i]
+					.conf;
+
+			if (memcmp(rss1_conf, rss2_conf,
+				   sizeof(struct rte_flow_action_rss)))
+				return -EINVAL;
+		}
+	}
+
+	*next_id = 0xffff;
+	if (red_act->type == RTE_FLOW_ACTION_TYPE_METER) {
+		mtr_conf = (const struct rte_flow_action_meter *)red_act->conf;
+		*next_id = mtr_conf->mtr_id;
+		nix_mtr_level_update(eth_dev, id, 0);
+		nix_mtr_chain_update(eth_dev, id, *prev_id, *next_id);
+		*prev_id = id;
+		return true;
+	}
+
+	return 0;
+}
+
+static int
+npc_mtr_configure(struct rte_eth_dev *eth_dev,
+		  const struct rte_flow_action actions[], int *is_mtr)
+{
+	uint32_t mtr_id, prev_mtr_id = 0xffff, next_mtr_id = 0xffff;
+	const struct rte_flow_action_meter *mtr_conf;
+	struct rte_flow_action mtr_acts[RTE_COLORS];
+	bool is_mtr_act = false;
+	int rc = -EINVAL, i;
+
+	for (i = 0; actions[i].type != RTE_FLOW_ACTION_TYPE_END; i++) {
+		if (actions[i].type == RTE_FLOW_ACTION_TYPE_METER) {
+			mtr_conf = (const struct rte_flow_action_meter
+					    *)(actions->conf);
+			mtr_id = mtr_conf->mtr_id;
+			is_mtr_act = true;
+			*is_mtr = 1;
+			break;
+		}
+	}
+
+	if (!is_mtr_act)
+		return rc;
+
+	prev_mtr_id = mtr_id;
+	next_mtr_id = mtr_id;
+	while (next_mtr_id != 0xffff) {
+		rc = nix_mtr_validate(eth_dev, next_mtr_id);
+		if (rc)
+			return rc;
+
+		rc = nix_mtr_policy_act_get(eth_dev, next_mtr_id, mtr_acts);
+		if (rc)
+			return rc;
+
+		rc = npc_mtr_green_color_action_validate(eth_dev, mtr_id,
+			actions, &mtr_acts[RTE_COLOR_GREEN], &prev_mtr_id,
+			&next_mtr_id);
+		if (rc)
+			return rc;
+
+		rc = npc_mtr_yellow_color_action_validate(eth_dev, mtr_id,
+			actions, &mtr_acts[RTE_COLOR_YELLOW], &prev_mtr_id,
+			&next_mtr_id);
+		if (rc)
+			return rc;
+
+		rc = npc_mtr_red_color_action_validate(eth_dev, mtr_id, actions,
+			&mtr_acts[RTE_COLOR_RED], &prev_mtr_id, &next_mtr_id);
+		if (rc)
+			return rc;
+	}
+
+	return nix_mtr_configure(eth_dev, mtr_id);
+}
+
 static void
 npc_rss_flowkey_get(struct cnxk_eth_dev *eth_dev,
 		    const struct roc_npc_action *rss_action,
@@ -195,6 +432,10 @@ cnxk_map_actions(struct rte_eth_dev *eth_dev, const struct rte_flow_attr *attr,
 				ROC_NPC_ACTION_TYPE_VLAN_PCP_INSERT;
 			in_actions[i].conf = actions->conf;
 			break;
+		case RTE_FLOW_ACTION_TYPE_METER:
+			in_actions[i].type = ROC_NPC_ACTION_TYPE_METER;
+			in_actions[i].conf = actions->conf;
+			break;
 		default:
 			plt_npc_dbg("Action is not supported = %d",
 				    actions->type);
@@ -281,6 +522,7 @@ cnxk_flow_create(struct rte_eth_dev *eth_dev, const struct rte_flow_attr *attr,
 	struct roc_npc_attr in_attr;
 	struct roc_npc_flow *flow;
 	int errcode = 0;
+	int is_mtr = 0;
 	int rc;
 
 	rc = cnxk_map_flow_data(eth_dev, attr, pattern, actions, &in_attr,
@@ -292,6 +534,15 @@ cnxk_flow_create(struct rte_eth_dev *eth_dev, const struct rte_flow_attr *attr,
 		return NULL;
 	}
 
+	if (roc_model_is_cn10k()) {
+		rc = npc_mtr_configure(eth_dev, actions, &is_mtr);
+		if (rc && is_mtr) {
+			rte_flow_error_set(error, 0, RTE_FLOW_ERROR_TYPE_ACTION,
+					   NULL, "Failed to configure mtr ");
+			return NULL;
+		}
+	}
+
 	flow = roc_npc_flow_create(npc, &in_attr, in_pattern, in_actions,
 				   &errcode);
 	if (errcode != 0) {
-- 
2.25.1